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Cypress Semiconductor CY7C1312KV18-300BZXC NO WARRANTY
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1312KV18-300BZXC	Tray	8		1	1 $11.13 10 $11.13 100 $11.13 1000 $11.13 10000 $11.13	Buy Now
Flip Electronics	CY7C1312KV18-300BZXC		380			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Cypress Semiconductor CY7C1312KV18-250BZI NO WARRANTY
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1312KV18-250BZI	Tray	4		1	1 $10.32 10 $10.32 100 $10.32 1000 $10.32 10000 $10.32	Buy Now
Onlinecomponents.com	CY7C1312KV18-250BZI		408			1 - 10 $36.75 100 $11.82 1000 $10.5 10000 $10.5	Buy Now
Bristol Electronics	CY7C1312KV18-250BZI		50			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Rochester Electronics	CY7C1312KV18-250BZI		15		1	1 $28.92 10 $28.92 100 $27.18 1000 $24.58 10000 $24.58	Buy Now
Flip Electronics	CY7C1312KV18-250BZI		2,867			1 - 10 - 100 - 1000 - 10000 -	Get Quote

IBS Electronics	CY7C1312KV18-250BZI		408		23	1 - 10 - 100 $39.104 1000 $39.104 10000 $39.104	Buy Now
Infineon Technologies AG CY7C1312KV18-250BZXC IC SRAM 18MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1312KV18-250BZXC	Tray	2		1	1 $37.21 10 $37.21 100 $37.21 1000 $37.21 10000 $37.21	Buy Now
Mouser Electronics	CY7C1312KV18-250BZXC					1 - 10 - 100 - 1000 $29.76 10000 $29.76	Get Quote
Cypress Semiconductor CY7C1312KV18-300BZXI NO WARRANTY
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1312KV18-300BZXI	Tray	1		1	1 $11.11 10 $11.11 100 $11.11 1000 $11.11 10000 $11.11	Buy Now
Flip Electronics	CY7C1312KV18-300BZXI		352			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Infineon Technologies AG CY7C1312BV18-250BZC IC SRAM 18MBIT PAR 165FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	CY7C1312BV18-250BZC	Tray			136	1 - 10 - 100 - 1000 $33.86537 10000 $33.86537	Buy Now
Avnet Americas	CY7C1312BV18-250BZC	Tray		4 Weeks	11	1 $35.47 10 $35.47 100 $31.75 1000 $28.71 10000 $28.71	Buy Now

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CY7C1312 Datasheets (63)

Part	Manufacturer	Description	Datasheet Type	PDF
CY7C131-25JC	Cypress Semiconductor	1K x 8 Dual-Port Static Ram	Original	PDF
CY7C131-25JC	Cypress Semiconductor	1024 x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25JC	Cypress Semiconductor	Multiple Array MatriX High-Density EPLDs	Scan	PDF
CY7C131-25JC	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25JI	Cypress Semiconductor	1K x 8 Dual-Port Static Ram	Original	PDF
CY7C131-25JI	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25JXC	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Original	PDF
CY7C131-25JXC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 8KBIT 25NS 52PLCC	Original	PDF
CY7C131-25JXCT	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Original	PDF
CY7C131-25JXCT	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 8KBIT 25NS 52PLCC	Original	PDF
CY7C131-25LC	Cypress Semiconductor	1024 x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25LC	Cypress Semiconductor	Multiple Array MatriX High-Density EPLDs	Scan	PDF
CY7C131-25NC	Cypress Semiconductor	1K x 8 Dual-Port Static Ram	Original	PDF
CY7C131-25NC	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Original	PDF

CY7C131-25NC	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25NI	Cypress Semiconductor	1K x 8 Dual-Port Static Ram	Original	PDF
CY7C131-25NI	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Scan	PDF
CY7C131-25NXC	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Original	PDF
CY7C131-25NXC	Cypress Semiconductor	Memory, Integrated Circuits (ICs), IC SRAM 8KBIT 25NS 52QFP	Original	PDF
CY7C131-25NXCT	Cypress Semiconductor	1K x 8 Dual-Port Static RAM	Original	PDF

CY7C1312 Datasheets Context Search

Catalog Datasheet	MFG & Type	PDF	Document Tags
Untitled Abstract: No abstract text available Text: CY7C1312KV18, CY7C1314KV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1312KV18 – 1 M x 18	Original	PDF	18-Mbit CY7C1312KV18, CY7C1314KV18 CY7C1312KV18
CY7C1310V18 Abstract: CY7C1312V18 CY7C1314V18 Text: 310V18 CY7C1310V18 CY7C1312V18 CY7C1314V18 ADVANCE INFORMATION 18-Mb 2-Word Burst SRAM with QDR -II Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 250 MHz Clock for High Bandwidth	Original	PDF	310V18 CY7C1310V18 CY7C1312V18 CY7C1314V18 18-Mb CY7C1310V18/CY7C1312V18/CY7C1314V18 CY7C1310V18 CY7C1312V18 CY7C1314V18
CY7C1310AV18 Abstract: CY7C1312AV18 CY7C1314AV18 Text: CY7C1310AV18 CY7C1312AV18 CY7C1314AV18 PRELIMINARY 18-Mb QDR -II SRAM 2-Word Burst Architecture Features Functional Description • Separate independent Read and Write data ports — Supports concurrent transactions • 167-MHz clock for high bandwidth • 2-Word Burst on all accesses	Original	PDF	CY7C1310AV18 CY7C1312AV18 CY7C1314AV18 18-Mb 167-MHz 167MHz CY7C1310AV18/CY7C1312AV18/CY7C1314AV18 CY7C1310AV18 CY7C1312AV18 CY7C1314AV18
CY7C1310BV18 Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR -II SRAM 2 Word Burst Architecture Features Functional Description Separate Independent read and write data ports ❐ Supports concurrent transactions • 250 MHz clock for high bandwidth ■ 2 Word Burst on all accesses	Original	PDF	CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, CY7C1314BV18 CY7C1310BV18 CY7C1312BV18 CY7C1910BV18
Untitled Abstract: No abstract text available Text: CY7C1310KV18, CY7C1910KV18 CY7C1312KV18, CY7C1314KV18 18-Mbit QDR II SRAM Two-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1310KV18 – 2 M x 8 ■ 333 MHz clock for high bandwidth	Original	PDF	18-Mbit CY7C1310KV18, CY7C1910KV18 CY7C1312KV18, CY7C1314KV18 CY7C1310KV18 CY7C1910KV18 CY7C1312KV18
Untitled Abstract: No abstract text available Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth	Original	PDF	CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz
Untitled Abstract: No abstract text available Text: CY7C1310KV18, CY7C1910KV18 CY7C1312KV18, CY7C1314KV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	CY7C1310KV18, CY7C1910KV18 CY7C1312KV18, CY7C1314KV18 18-Mbit CY7C1310KV18 CY7C1312KV18
Untitled Abstract: No abstract text available Text: CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 18 Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1310JV18 – 2M x 8 CY7C1910JV18 – 2M x 9	Original	PDF	CY7C1310JV18, CY7C1910JV18 CY7C1312JV18, CY7C1314JV18 CY7C1310JV18 CY7C1312JV18
Untitled Abstract: No abstract text available Text: CY7C1310CV18 CY7C1910CV18 CY7C1312CV18 CY7C1314CV18 PRELIMINARY 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth	Original	PDF	CY7C1310CV18 CY7C1910CV18 CY7C1312CV18 CY7C1314CV18 18-Mbit 250-MHz
CY7C1312BV18 Abstract: CY7C1314BV18 CY7C1312 Text: CY7C1312BV18 CY7C1314BV18 18 Mbit QDR II SRAM Two Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all accesses	Original	PDF	CY7C1312BV18 CY7C1314BV18 CY7C1312BV18 CY7C1314BV18 CY7C1312
Untitled Abstract: No abstract text available Text: CY7C1312KV18, CY7C1314KV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Configurations Features Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1312KV18 – 1 M x 18	Original	PDF	CY7C1312KV18, CY7C1314KV18 18-Mbit CY7C1312KV18
Untitled Abstract: No abstract text available Text: CY7C1310V18 CY7C1312V18 CY7C1314V18 PRELIMINARY 18-Mb QDR -II SRAM 2-Word Burst Architecture Features Functional Description • Separate independent Read and Write data ports — Supports concurrent transactions • 167-MHz clock for high bandwidth • 2-Word Burst on all accesses	Original	PDF	CY7C1310V18 CY7C1312V18 CY7C1314V18 18-Mb 167-MHz 167MHz
CY7C1312BV18-167BZC Abstract: No abstract text available Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth	Original	PDF	CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18 CY7C1312BV18-167BZC
CY7C1310BV18 Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth	Original	PDF	CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz CY7C1310BV18 CY7C1312BV18 CY7C1314BV18 CY7C1910BV18

CY7C1310V18 Abstract: CY7C1312V18 CY7C1314V18 Text: CY7C1310V18 CY7C1312V18 CY7C1314V18 PRELIMINARY 18-Mb QDR -II SRAM Two-word Burst Architecture Features Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 167-MHz Clock for High Bandwidth • Two-word Burst on all accesses	Original	PDF	CY7C1310V18 CY7C1312V18 CY7C1314V18 18-Mb 167-MHz 167MHz CY7C1310V18/CY7C1312V18/CY7C1314V18 CY7C1310V18 CY7C1312V18 CY7C1314V18
CY7C1310BV18 Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 static SRAM single port Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 PRELIMINARY 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports • Core VDD = 1.8V ±0.1V ; I/O VDDQ = 1.4V to VDD The CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, and	Original	PDF	CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, CY7C1314BV18 CY7C1310BV18 CY7C1312BV18 CY7C1910BV18 static SRAM single port
Untitled Abstract: No abstract text available Text: CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 18-Mbit QDR II SRAM 2-Word Burst Architecture 18-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions	Original	PDF	18-Mbit CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 CY7C13101KV18 CY7C13251KV18 CY7C13121KV18
Untitled Abstract: No abstract text available Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth	Original	PDF	CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz
Untitled Abstract: No abstract text available Text: CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 18-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions CY7C13101KV18 – 2M x 8 ■ 333 MHz clock for high bandwidth	Original	PDF	18-Mbit CY7C13101KV18, CY7C13251KV18 CY7C13121KV18, CY7C13141KV18 CY7C13101KV18 CY7C13251KV18 CY7C13121KV18
CY7C1314CV18 Abstract: CY7C1310CV18 CY7C1312CV18 CY7C1910CV18 CY7C1314CV18-250BZXC Text: CY7C1310CV18, CY7C1910CV18 CY7C1312CV18, CY7C1314CV18 18-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■	Original	PDF	CY7C1310CV18, CY7C1910CV18 CY7C1312CV18, CY7C1314CV18 18-Mbit CY7C1310CV18 CY7C1312CV18 CY7C1314CV18 CY7C1310CV18 CY7C1312CV18 CY7C1910CV18 CY7C1314CV18-250BZXC
CY7C1310CV18 Abstract: CY7C1312CV18 CY7C1314CV18 CY7C1910CV18 Text: CY7C1310CV18, CY7C1910CV18 CY7C1312CV18, CY7C1314CV18 18-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■	Original	PDF	CY7C1310CV18, CY7C1910CV18 CY7C1312CV18, CY7C1314CV18 18-Mbit CY7C1310CV18 CY7C1312CV18 CY7C1310CV18 CY7C1312CV18 CY7C1314CV18 CY7C1910CV18
CY7C1312CV18 Abstract: CY7C1314CV18 Text: CY7C1312CV18 CY7C1314CV18 18-Mbit QDR II SRAM 2-Word Burst Architecture Features Configurations • Separate independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C1312CV18 – 1M x 18 CY7C1314CV18 – 512K x 36 ■ 250 MHz Clock for High Bandwidth	Original	PDF	CY7C1312CV18 CY7C1314CV18 18-Mbit CY7C1312CV18 CY7C1314CV18
CY7C1310AV18 Abstract: CY7C1312AV18 CY7C1314AV18 Text: CY7C1310AV18 CY7C1312AV18 CY7C1314AV18 PRELIMINARY 18-Mb QDR -II SRAM 2-Word Burst Architecture Features Functional Description • Separate independent Read and Write data ports — Supports concurrent transactions • 167-MHz clock for high bandwidth • 2-Word Burst on all accesses	Original	PDF	CY7C1310AV18 CY7C1312AV18 CY7C1314AV18 18-Mb 167-MHz 167MHz CY7C1310AV18/CY7C1312AV18/CY7C1314AV18 CY7C1310AV18 CY7C1312AV18 CY7C1314AV18
Untitled Abstract: No abstract text available Text: CY7C1312CV18 CY7C1314CV18 18-Mbit QDR II SRAM 2-Word Burst Architecture 18-Mbit QDR® II SRAM 2-Word Burst Architecture Features Configurations • Separate independent Read and Write Data Ports ❐ Supports concurrent transactions CY7C1312CV18 – 1M x 18	Original	PDF	CY7C1312CV18 CY7C1314CV18 18-Mbit CY7C1312CV18

CY7C1312 Search Results

CY7C1312 Price and Stock

Cypress Semiconductor CY7C1312KV18-300BZXC

Cypress Semiconductor CY7C1312KV18-250BZI

Infineon Technologies AG CY7C1312KV18-250BZXC

Cypress Semiconductor CY7C1312KV18-300BZXI

Infineon Technologies AG CY7C1312BV18-250BZC

CY7C1312 Datasheets (63)

CY7C1312 Datasheets Context Search

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CY7C1310V18

CY7C1310AV18

CY7C1310BV18

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CY7C1312BV18

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CY7C1312BV18-167BZC

CY7C1310BV18

CY7C1310V18

CY7C1310BV18

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CY7C1314CV18

CY7C1310CV18

CY7C1312CV18

CY7C1310AV18

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