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    CY7C1312BV18 Search Results

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    CY7C1312BV18 Price and Stock

    Infineon Technologies AG CY7C1312BV18-250BZC

    IC SRAM 18MBIT PAR 165FBGA
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    DigiKey CY7C1312BV18-250BZC Tray 136
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    Rochester Electronics LLC CY7C1312BV18-250BZC

    IC SRAM 18MBIT PAR 165FBGA
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    DigiKey CY7C1312BV18-250BZC Tray 9
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    • 100 $35.13
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    Infineon Technologies AG CY7C1312BV18-167BZC

    IC SRAM 18MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1312BV18-167BZC Tray 136
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    Rochester Electronics LLC CY7C1312BV18-167BZC

    IC SRAM 18MBIT PAR 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1312BV18-167BZC Tray 10
    • 1 -
    • 10 $31.96
    • 100 $31.96
    • 1000 $31.96
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    Rochester Electronics LLC CY7C1312BV18-200BZI

    IC SRAM 18MBIT PARALLEL 165FBGA
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C1312BV18-200BZI Tray 9
    • 1 -
    • 10 $35.13
    • 100 $35.13
    • 1000 $35.13
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    CY7C1312BV18 Datasheets (12)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C1312BV18 Cypress Semiconductor 18-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-167BZC Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-167BZC Cypress Semiconductor 18-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-167BZCT Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V Original PDF
    CY7C1312BV18-167BZI Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V Original PDF
    CY7C1312BV18-167BZXC Cypress Semiconductor 18-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-200BZC Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-200BZC Cypress Semiconductor 18-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-200BZI Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture Original PDF
    CY7C1312BV18-200BZXC Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V Original PDF
    CY7C1312BV18-250BZC Cypress Semiconductor 18-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V Original PDF
    CY7C1312BV18-250BZC Cypress Semiconductor 18-Mbit QDR-II SRAM 2-Word Burst Architecture Original PDF

    CY7C1312BV18 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    CY7C1310BV18

    Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR -II SRAM 2 Word Burst Architecture Features Functional Description Separate Independent read and write data ports ❐ Supports concurrent transactions • 250 MHz clock for high bandwidth ■ 2 Word Burst on all accesses


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, CY7C1314BV18 CY7C1310BV18 CY7C1312BV18 CY7C1910BV18 PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz PDF

    CY7C1312BV18

    Abstract: CY7C1314BV18 CY7C1312
    Text: CY7C1312BV18 CY7C1314BV18 18 Mbit QDR II SRAM Two Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth ■ 2-word burst on all accesses


    Original
    CY7C1312BV18 CY7C1314BV18 CY7C1312BV18 CY7C1314BV18 CY7C1312 PDF

    CY7C1312BV18-167BZC

    Abstract: No abstract text available
    Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth


    Original
    CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18 CY7C1312BV18-167BZC PDF

    CY7C1310BV18

    Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz CY7C1310BV18 CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 PDF

    CY7C1310BV18

    Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 static SRAM single port
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 PRELIMINARY 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports • Core VDD = 1.8V ±0.1V ; I/O VDDQ = 1.4V to VDD The CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, and


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1310BV18, CY7C1910BV18, CY7C1312BV18, CY7C1314BV18 CY7C1310BV18 CY7C1312BV18 CY7C1910BV18 static SRAM single port PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 250-MHz clock for high bandwidth


    Original
    CY7C1310BV18 CY7C1910BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 250-MHz PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1312BV18 CY7C1314BV18 18-Mbit QDR II SRAM Two-Word Burst Architecture 18-Mbit QDR® II SRAM Two-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth


    Original
    CY7C1312BV18 CY7C1314BV18 18-Mbit CY7C1312BV18, CY7C1314BV18 PDF

    CY7C1310BV18

    Abstract: CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 CY7C1314BV18-167BZXI
    Text: CY7C1310BV18, CY7C1910BV18 CY7C1312BV18, CY7C1314BV18 18-Mbit QDR -II SRAM 2-Word Burst Architecture Features Functional Description • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 250 MHz clock for high bandwidth


    Original
    CY7C1310BV18, CY7C1910BV18 CY7C1312BV18, CY7C1314BV18 18-Mbit CY7C1310BV18 CY7C1312BV18 CY7C1314BV18 CY7C1910BV18 CY7C1314BV18-167BZXI PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C1310BV18 CY7C1312BV18 CY7C1314BV18 PRELIMINARY 18-Mbit QDR-II SRAM 2-Word Burst Architecture Features Functional Description • Separate Independent Read and Write data ports — Supports concurrent transactions • 300-MHz clock for high bandwidth


    Original
    CY7C1310BV18 CY7C1312BV18 CY7C1314BV18 18-Mbit 300-MHz CY7C1910BV18 BB165E BB165D PDF

    CY7C1338-100AXC

    Abstract: gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC
    Text: CYPRESS / GALVANTECH # - Connect pin 14 FT pin to Vss CY7C1019BV33-15VC GS71108AJ-12 & - Does not support 1.8V I/O CY7C1019BV33-15VXC GS71108AGJ-12 * - Tie down extra four I/Os with resistor CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12


    Original
    CY7C1019BV33-15VC GS71108AJ-12 CY7C1019BV33-15VXC GS71108AGJ-12 CY7C1019BV33-15ZC GS71108ATP-12 CY7C1019BV33-15ZXC GS71108AGP-12 CY7C1019CV33-10VC GS71108AJ-10 CY7C1338-100AXC gvt7164d32q-6 CY7C1049BV33-12VXC CY7C1363C-133AC CY7C1021DV33-12ZXC CY7C1460AV25-200AXC CY7C1338G-100AC CY7C1041V33-12ZXC CY7C1460V33-200AXC CY7C1021DV33-10ZXC PDF