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    74S28 Search Results

    74S28 Result Highlights (1)

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    SN74S283N Texas Instruments 4-Bit Binary Full Adders With Fast Carry 16-PDIP 0 to 70 Visit Texas Instruments Buy
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    onsemi DM74S280N

    IC PARITY GEN/CHKER 3 14DIP
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    DigiKey DM74S280N Tube 25
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    Rochester Electronics LLC DM74S280N

    IC PARITY GEN/CHKER 3 14DIP
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    DigiKey DM74S280N Tube 634
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    Vishay Dale RWR74S2800FRBSL

    RES 280 OHM 5W 1% WW AXIAL
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    DigiKey RWR74S2800FRBSL Bulk 100
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    Vishay Dale RWR74S2800FSRSL

    RES 280 OHM 5W 1% WW AXIAL
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    DigiKey RWR74S2800FSRSL Reel 100
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    Vishay Dale RWR74S2870FRS73

    RES 287 OHM 5W 1% WW AXIAL
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    DigiKey RWR74S2870FRS73 Reel 500
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    74S28 Datasheets (16)

    Part
    ECAD Model
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    74S280 Signetics 9-Bit Parity Generator / Checker Scan PDF
    74S280 Signetics Parity Generator/Checker Scan PDF
    74S280A Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S280B Signetics Quad S-R Latch / 9-Bit Odd/Even Parity Generator/Checker Scan PDF
    74S280DC Fairchild Semiconductor 9-Bit Parity Generator / Checker Scan PDF
    74S280FC Fairchild Semiconductor 9-Bit Parity Generator / Checker Scan PDF
    74S280PC Fairchild Semiconductor 9-Bit Parity Generator / Checker Scan PDF
    74S287 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S287PC Unknown Microprocessor and Peripheral Components Scan PDF
    74S288 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S289 Fairchild Semiconductor 64-BIT RANDOM ACCESS MEMORY Scan PDF
    74S289 Signetics Bipolar Memory IC Data Book 1982 Scan PDF
    74S289 Signetics Integrated Circuits Catalogue 1978/79 Scan PDF
    74S289DC Fairchild Semiconductor 64-Bit RAM Scan PDF
    74S289FC Fairchild Semiconductor 64-Bit RAM Scan PDF
    74S289PC Fairchild Semiconductor 64-Bit RAM Scan PDF

    74S28 Datasheets Context Search

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    sn76131

    Abstract: tlo72cp TOSHIBA 2N3055 M53207P 2N3055 TOSHIBA KIA7313AP kia7640ap LA5530 M5L8155P TBB1458B
    Text: ACTIVE ELECTRONICS COMPONENTS CROSS REFERENCE GUIDE 2SC429GTM 2SC458 2SC458LG 2SC503 2SC504 2SC510 2SC512 2SC519 2SC520A 2SC594 2SC699A 2SC780 2SC809-1 2SC945 2SC3012 2SC3074 2SC3114 2SC3115 2SC3116 2SC3117 2SC3134 2SC3135 2SC3138 2SC3143 2SC3144 2SC3145 2SC3157


    Original
    2SC429GTM 2SC458 2SC458LG 2SC503 2SC504 2SC510 2SC512 2SC519 2SC520A 2SC594 sn76131 tlo72cp TOSHIBA 2N3055 M53207P 2N3055 TOSHIBA KIA7313AP kia7640ap LA5530 M5L8155P TBB1458B PDF

    Untitled

    Abstract: No abstract text available
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180 for easy system up-grading


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    74S280 1N916, 1N3064, 500ns 500ns PDF

    1N3064

    Abstract: 1N916 74LS 74S280 N74S280N S280 parity generator
    Text: 74S280 Signetìcs Parity G enerator/C hecker 9-Bit Odd/Even Parity G enerator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180


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    74S280 1N916, 1N3064, 500ns 1N3064 1N916 74LS 74S280 N74S280N S280 parity generator PDF

    74S280

    Abstract: 74LS N74S280N S280 4 bit even and odd parity checker
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit O dd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180


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    74S280 1n916, 1n3064, 500ns 74S280 74LS N74S280N S280 4 bit even and odd parity checker PDF

    74s281

    Abstract: DM74 DM74S182 DM74S194 S281 LI 20 AB S28I 280J2
    Text: ^ M SI DM 74S281 4 -B it Parallel Binary A ccum ulators General Description These S c h o ttk y c la m p e d fou r-b it accum ulators integrate high-perform ance versions o f an arith m e tic logic unit/ fu n ctio n generator, and a shift/storage m atrix in a single


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    16-BIT DM74S281 DM74S182 S28VS 64-BIT 74s281 DM74 DM74S194 S281 LI 20 AB S28I 280J2 PDF

    74S288

    Abstract: 74S288 PROGRAMMING DM74S288N 288AN DM54S288J SAFEA DM74S288J DM74S288V DM74S288 N16A
    Text: DM54S288/74S288 1/WX National Z ta Semiconductor DM54/74S288 32 x 8 256-Bit TTL PROM General Description Features This Schottky memory is organized in the popular 32 words by 8 bits configuration. A memory enable input is provided to control the output states. When the device is enabled, the


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    DM54/74S288 256-Bit 74S288 74S288 PROGRAMMING DM74S288N 288AN DM54S288J SAFEA DM74S288J DM74S288V DM74S288 N16A PDF

    Untitled

    Abstract: No abstract text available
    Text: 280 CONNECTION DIAGRAM PINOUT A 54S/74S280 b \ l ^ ° 9-BIT PARITY GENERATOR/CHECKER DESCRIPTION — The ’280 is a high speed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number or these inputs are HIGH. If an even number of inputs are HIGH, the Sum


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    54S/74S280 74S280PC 54/74S 54/47S PDF

    Untitled

    Abstract: No abstract text available
    Text: 74S280 Signetics Parity Generator/Checker 9-Bit Odd/Even Parity Generator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180 for easy system up-grading


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    74S280 N74S280N 500ns 500ns PDF

    Untitled

    Abstract: No abstract text available
    Text: SN54LS280, SN 54S280, SN 74LS280. SN 74S280 9-BIT ODDfEVEN PARITY GENERATORS/CHECKERS DECEMBER 1972 - REVISED MARCH 1988 • Generates Either Odd or Even Parity fo r Nine Data Lines SN 54LS 280, SN 54S 280 . . . J OR W PACKAGE SN 74LS280. S N 74S 280 . . . D OR N PACKAGE


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    SN54LS280, 54S280, 74LS280. 74S280 LS280 PDF

    54S280DM

    Abstract: 54S280FM 74S280DC 74S280FC 74S280PC
    Text: 280 C O N N E C T IO N D IA G R A M P IN O U T A 54S/74S280 b l ! ^ ° 1~4~| V c c le [ 7 9-BIT PARITY GENERATOR/CHECKER HI'S l?U n c |T jjO U Ib [ T 13 £e [T ] jÖ '2 T ]|1 2 o [I T]io GND [ 7 D E S C R IP T IO N — T he ’280 is a h ig h speed p a rity g e n e ra to r/c h e c k e r th a t


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    54S/74S280 74S280PC 74S280DC 54S280DM 74S280FC 54S280FM 54/74S 54/47S 74S280PC PDF

    Untitled

    Abstract: No abstract text available
    Text: 74S280 Signetìcs Parity Generator/Checker 9-Bit O dd/Even Parity G enerator/Checker Product Specification Logic Products FEATURES • Buffered inputs — one normalized load • Word-length easily expanded by cascading • Similar pin configuration to '180


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    74S280 1N916, 1N3064, 500ns 500ns PDF

    Untitled

    Abstract: No abstract text available
    Text: 289 CONNECTION DIAGRAM PINOUT A 54S/74S289 b i 1 5 4 L S /7 4 L S 2 8 9 C u <7 ao[T T i l vcc 64-BIT RANDOM ACCESS MEMORY «D E Tsl Ai With O pen-Collector Outputs WE [ T 14] A 2 Di [7 13] A 3 0 ,[T T2ID 4 D2 [ ? T T lo a Ö2 U Tö] D 3 D ESC R IPTIO N — The '289 is a high speed 64-bit RAM organized as a 16word by 4-b it array. Address inputs are buffered to minim ize loading, and


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    54S/74S289 64-BIT 16word 54/74S 54/74LS PDF

    Untitled

    Abstract: No abstract text available
    Text: GD54/74S280 9-BIT ODD/EVEN PARITY GENERATORS/CHECKERS Feature Pin Configuration • Generates Either Odd or Even Parity for Nine Data • • Lines Cascadable for n-Bits Can Be Used to Upgrade Existing Systems Us­ ing MSI Parity Circuits a Description These universal, monolithic, nine-bit parity


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    GD54/74S280 PDF

    74LS289

    Abstract: 74S289PC 54LS289DM 54S289DM 74LS289DC 74LS289FC 74LS289PC 74S289DC 74S289FC S289T
    Text: 289 b 11 54S/74S289 54LS /74LS 289 <T' C O N N E C T IO N D IA G R A M P IN O U T A U <7 ao[T 64-BIT RANDOM ACCESS MEMORY Til vcc Tsl Ai csGE 771 A2 771 a 3 T2ID4 [7 [7 5, [I 02 [][ 52|T W ith O p e n -C o lle c to r O utputs we Oi D E S C R IP T IO N — T he ’289 is a h igh speed 6 4 -b it RAM o rg a n ize d as a 16w o rd by 4 -b it array. A d d re ss in p u ts are b u ffe re d to m in im ize lo a d in g , and


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    54S/74S289 54LS/74LS289 64-BIT 16-word 54/74S 54/74LS 74LS289 74S289PC 54LS289DM 54S289DM 74LS289DC 74LS289FC 74LS289PC 74S289DC 74S289FC S289T PDF

    74LS289

    Abstract: N74LS289F N74LS289N
    Text: 54S/74S289 3101A 54LS/74LS289 (Preliminary data) LOGIC SYMBOL See Slgnetics Memory Data Manual for 3101A Specifications DESCRIPTION FEATURES T h e " 2 8 9 " is a 6 4 - B it h ig h - s p e e d R ead /W rite Random A c c e s s M em ory for use a s a "sc ra tc h pad" memory with non­


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    54S/74S289 74LS289 64-Bit 16-words 54S/74S 54LS/74LS 54S/74S 54LS/74LS 74LS289 N74LS289F N74LS289N PDF

    74S287

    Abstract: 74S287 programming instructions 74S287 programming DM74s287 DM74S287AN DM74S287N DM54S287J J16A N16A 74s* programming
    Text: DM54S287/74S287 National ÆjA Semiconductor DM54/74S287 256 x 4 1024-Bit TTL PROM General Description Features This Schottky memory is organized in the popular 256 words by 4 bits configuration. Memory enable inputs are provided to control the output states. When the device is


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    DM54/74S287 1024-Bit 74S287 74S287 programming instructions 74S287 programming DM74s287 DM74S287AN DM74S287N DM54S287J J16A N16A 74s* programming PDF

    Untitled

    Abstract: No abstract text available
    Text: NATIONAL SEMICOND {LOGIC} GSË D J b S D U S E □DbBTfiG □ | 280 T -V s -'/7 C O N N E C T IO N D IA G R A M P IN O U T A 54S/74S280 9-BIT PARITY GENERATOR/CHECKER 1 t« T vQvcc l7[T U lis n c [T 12]U is[T n ib se| J H l2 lo ti a - OND^ D E S C R IP T IO N — The '280 is a high speed parity generator/checker that


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    54S/74S280 54/74S 54/47S PDF

    74s281

    Abstract: SN74S281
    Text: TYPES SN54S281, 74S281 4-BIT PARALLEL BINARY ACCUMULATORS F E B U A R Y 1 9 7 4 - R E V IS E D D EC EM B ER 1 983 SN 54S281 I OR W PA CKAG E SN 74S281 . . . DW , J OR N PA CKA G E Full 4-Bit Binary Accumulator in a Single Package T O P V IEW 15 Arithmetic/Logic-Type Operations:


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    SN54S281, SN74S281 54S281 74S281 54S281/SN 74S281 PDF

    SN74S289B

    Abstract: S289B sn74s189 SN74S189B
    Text: SN 54S 189B , S N 54S 289B , S N 74S 189B , SN 74S289B 64-BIT HIGH PERFORMANCE RANDOM ACCESS MEMORIES SEPTEMBER 1 9 7 6 - REVISED FEBRUARY 19 8 4 S T A T IC R A N D O M -A C C E S S M E M O R IE S


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    SN54S189B, SN54S289B, SN74S189B, SN74S289B 64-BIT 1976-REVISED SN54S289B SN74S189B. SN74S289B S289B sn74s189 SN74S189B PDF

    74283 IC pin diagram

    Abstract: IC 74283 74283 IC 8 bit pin diagram
    Text: SN54283, SN54LS283, SN54S283, SN74283, SN 74LS283, 74S283 4 BIT BINARY FU LL AD DERS W ITH FA S T CARRY OCTOBEH 1976 - REVISED MARCH 1988 S N 5 4 2 8 3 , S N 5 4 L S 2 8 3 . . . J OR W PAC KA G E S N 5 4 S 2 8 3 . . . J P AC K A G E S N 7 4 2 8 3 . . . N P AC K A G E


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    SN54283, SN54LS283, SN54S283, SN74283, 74LS283, SN74S283 74283 IC pin diagram IC 74283 74283 IC 8 bit pin diagram PDF

    74S206

    Abstract: 74s201
    Text: 54/74S ELECTRICAL CHARACTERISTICS See Notes - Page 50 INPUT VOLTAGE V|L (V) PARAMETER TEST CONDITIONS LOW LEVEL VÇC~MIN MIN TYP MAX OUTPUT VOLTAGE V|C(V) V|H (V) HIGH LEVEL CLAMP VOLTAGE V çç= M IN VCC = “ IN l|=-18 mA MIN TYP MAX MIN TYP VOH (V) HIGH LEVEL


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    54/74S 54/74S00 54/74S02 54/74S03 54/74S04 54/74S05 54/74S260 54/74S280 54/74S301 74S206 74s201 PDF

    Untitled

    Abstract: No abstract text available
    Text: GEC PLESSEY w . S E M I C O N D U C T O R S DS 3303 -1 NJ8820GG FREQUENCY SYNTHESISER PROM INTERFACE The NJ8820GG is a synthesiser circuit fabricated w ith the 2-micron CMOS process and is capable of achieving high sideband attenuation and low noise performance. The circuit


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    NJ8820GG NJ8820GG 470pF, PDF

    MH1SS1

    Abstract: TESLA mh 7400 MH 7404 mh 7400 tesla cdb 838 tda 7851 L 741PC TDB0124DP tda 4100 TDA 7851 A
    Text: m ö lk ^ o e le l-c te n a n il-c Information Applikation RGW Typenübersicht Vergleich Teil 2: RGW M iM U Z A U l KÉD lnrüÖC=SraO Information Applikation HEFT 50 RGW Typenübersicht + Vergleich Teil 2: RGW wob Halbleiterwerk Frankfurt /oder bt r iab im v«b kombinat mikrootektronik


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    PDF

    74S301

    Abstract: TBP28S42 SIGNETICS prom 1024x8 PROM n82s123 82LS181 N82LS181 S82LS181 N82S141 TBP28P86
    Text: MAY 1982 BIPOLAR MEMORY DIVISION 8 1 9 2 -BIT BIPOLAR P R O M 1 0 2 4 X 8 DESCRIPTION The 82LS181 is field programmable, which mea ns that custom patterns are immediately available by following the fusing procedure given in this data manual. The 82LS18I is


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    8192-BIT 1024x8) 82LS181 82LS181 82LS18I N82LS181, n82hs185 n82s25 n82s16 74S301 TBP28S42 SIGNETICS prom 1024x8 PROM n82s123 N82LS181 S82LS181 N82S141 TBP28P86 PDF