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    74LS11 IC Search Results

    74LS11 IC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    74LS112P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS11FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS11P-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74LS112FPEL-E Renesas Electronics Corporation HD74LS Series Visit Renesas Electronics Corporation
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
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    74LS11 IC Price and Stock

    Semiconductors 74LS11

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Onlinecomponents.com 74LS11 7,351
    • 1 $3.82
    • 10 $3.82
    • 100 $1.37
    • 1000 $0.41
    • 10000 $0.41
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    74LS11 IC Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    lm294oct

    Abstract: d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C
    Text: Integrated Circuits 74LS Series Featuring better performance than standard 7400 series devices, the 74LS series also uses about 1/5th the power. Part# Pins Description 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 74LS10 74LS11 74LS12


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    PDF 74LS00 74LS01 74LS02 74LS03 74LS04 74LS05 74LS06 74LS07 74LS08 74LS09 lm294oct d71054c D71055C lm294oct-12 74c928 7486 XOR GATE interfacing ADC 0808 with 8086 microprocessor 555 7490 7447 7 segment LED display Motorola 74LS76 NEC D71055C

    74ls11

    Abstract: 74LS11 TTL TTL 74ls11 74LS11 datasheet 751A-02
    Text: SN54/74LS11 TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN


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    PDF SN54/74LS11 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD 74ls11 74LS11 TTL TTL 74ls11 74LS11 datasheet 751A-02

    74LS11 TTL

    Abstract: 74LS11 datasheet TTL 74ls11 74LS11 751A-02 truth table NOT gate 74 SN74LSXXD SN54/74LS11 truth table and gate 74 SN54LSXXJ
    Text: SN54/74LS11 TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE VCC 14 1 LOW POWER SCHOTTKY 13 2 12 11 3 4 10 5 9 6 8 J SUFFIX CERAMIC CASE 632-08 7 14 GND 1 N SUFFIX PLASTIC CASE 646-06 14 1 14 1 D SUFFIX SOIC CASE 751A-02 ORDERING INFORMATION SN54LSXXJ SN74LSXXN


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    PDF SN54/74LS11 51A-02 SN54LSXXJ SN74LSXXN SN74LSXXD 74LS11 TTL 74LS11 datasheet TTL 74ls11 74LS11 751A-02 truth table NOT gate 74 SN74LSXXD SN54/74LS11 truth table and gate 74 SN54LSXXJ

    74LS11 pin configuration

    Abstract: 74LS1112 connector iso 2593 74LS11 datasheet 74LS11 TTL application note 26LS31 26LS32 26LS31 MAX230 SP230
    Text: SP503 Application Note ANI4 • DTE and DCE configurations with the SP503 ■ Connecting the SP503 to a DB-25 connector in DTE and DCE modes ■ Implementing V.35 with the SP503 ■ Creating extra single-ended and differential channels with the SP503 using the SP310A and SP485


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    PDF SP503 SP503 DB-25 SP310A SP485 RS-232 74LS11 pin configuration 74LS1112 connector iso 2593 74LS11 datasheet 74LS11 TTL application note 26LS31 26LS32 26LS31 MAX230 SP230

    74LS11 pin configuration

    Abstract: 74LS11 TTL 74LS116 74LS111 application note 26LS31 74ls11 ic 74LS11 seven wonders SP503 b1415
    Text: SP503 Application Note • DTE and DCE configurations with the SP503 ■ Connecting the SP503 to a DB-25 connector in DTE and DCE modes ■ Implementing V.35 with the SP503 ■ Creating extra single-ended and differential channels with the SP503 using the SP310A and SP485


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    PDF SP503 SP503 DB-25 SP310A SP485 RS-232 74LS11 pin configuration 74LS11 TTL 74LS116 74LS111 application note 26LS31 74ls11 ic 74LS11 seven wonders b1415

    26ls32 similar

    Abstract: RS-422A RS-423 RS-449 SP503 application note 26LS31 DIODE SCHOTTKY X27 EIA530 74LS11 pinout rs232 protocols
    Text: SP503 Corporation SIGNAL PROCESSING EXCELLENCE Multi–Mode Serial Transceiver • Single-Chip Serial Transceiver Supports Industry-Standard ■ Software-Selectable Protocols: — RS-232 V.28 — RS-422A (V.11, X.27) — RS-449 RS-485 — V.35 — EIA-530


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    PDF SP503 RS-232 RS-422A RS-449 RS-485 EIA-530 SP503 RS-449, 26ls32 similar RS-422A RS-423 RS-449 application note 26LS31 DIODE SCHOTTKY X27 EIA530 74LS11 pinout rs232 protocols

    74ls08n

    Abstract: 74ls04n 74LS14N 74LS07N 74LS05N 74LS11N 74ls06n 74LS02N IC 74LS14 74ls04 hex inverter
    Text: Standard Logic Call us to see if you can save 10-20%. 74F Series Continued – General purpose family of high speed advanced bipolar logic DIP SOIC Save Up To 20% When Purchasing Texas Instruments Products. Save Up To 30%! Jameco Value Offering Jameco now offers two ways to save! Our selection of Texas Instruments products will save you


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    PDF 74LS14N* 74ls08n 74ls04n 74LS14N 74LS07N 74LS05N 74LS11N 74ls06n 74LS02N IC 74LS14 74ls04 hex inverter

    74LS11 pin configuration

    Abstract: TTL 74LS11 74LS11 TTL 400M 74LS11 DN74LS11 MA161 50nd
    Text: LS T T L DN74LS Series DN74LS11 DN74LS11 D^74LS11 Triple 3-input Positive AND Gates P-1 • Description DN74LS11 contains three 3-input positive isolation AND gate circuits. ■ Features • • • • Low pow er consum ption Pd = 13mW typical High speed (tpd = 9ns typical)


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    PDF DN74LS DN74LS11 DN74LS11 74LS11 14-pin SO-14D) MA161. 74LS11 pin configuration TTL 74LS11 74LS11 TTL 400M 74LS11 MA161 50nd

    CI 74LS08

    Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D IG IT A L-T T L D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, CI 74LS08 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild

    400EM

    Abstract: 472EM cdb 400E CI 74151 CDB404E 4153E 7404 7408 7432 4121EM IC TTL 7460 446E
    Text: JBIGITAl_ _ INTEGRATED IK* m m X.X.L. . L 5400 5402 5403 5404 5405 5406 5407 5408 5409 5410 5413 5416 5417 5420 5430 5432 5437 5438 5440 5442 5446 5447 5450 5451 5453 X . X ROWER 74LS00 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74'^SIO 74LS11 74LS12 74LS13


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    PDF 74LS00 74LS02 74LS03 74LS04 74LS05 74LS08 74LS09 74LS11 74LS12 74LS13 400EM 472EM cdb 400E CI 74151 CDB404E 4153E 7404 7408 7432 4121EM IC TTL 7460 446E

    74LS11 pin configuration

    Abstract: PIN CONFIGURATION 7411 74ls characteristics 7411 pin configuration N7411F N7411N N74H11F N74H11N N74LS11F N74LS11N
    Text: 54/7411 54H/74H11 54S/74S11 54LS/74LS11 ORDERING CODE PIN CONFIGURATION See Section 9 for further Package and Ordering Information. C O M M E R C IA L RANGES ± 5%; Ta - 0°C to *70°C PACKAGES PIN CO N F. VCC = 5V P lastic DIP Fig. A Fig. A N 741 1 N N74S11N


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    PDF 54H/74H11 54S/74S11 54LS/74LS11 N7411N N74H11N N74S11N N74LS11N N7411F N74H11F N74S11F 74LS11 pin configuration PIN CONFIGURATION 7411 74ls characteristics 7411 pin configuration N7411F N7411N N74LS11F N74LS11N

    IC TTL 7432

    Abstract: 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, IC TTL 7432 74LS86 gate diagram 7411 3 INPUT AND gate IC 7432 7411 pin diagram 74LS266 IC 7486 74LS series logic gate symbols FL 9014 TTL 74126

    so 54 t

    Abstract: 74ls 3-input and gate TTL IC 74 SN74LS 74LS11 Motorola 74LS TTL 74LS11 74ls11 ic for IC 74LS11 all gate ic data 74
    Text: M MOTOROLA SN54/74LS11 TRIPLE 3-INPUT AND GATE TRIPLE 3-INPUT AND GATE v cc un r¡7j rrii rm nói m LOW POWER SCHOTTKY rn =§y n J SUFFIX C E R A M IC C A SE 632-08 14 GND 1 N SUFFIX PLA S TIC C A SE 646-06 D SUFFIX 14 1 SO IC C A S E 751A-02 5 ORDERING INFORMATION


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    PDF SN54/74LS11 51A-02 SN54/74LS so 54 t 74ls 3-input and gate TTL IC 74 SN74LS 74LS11 Motorola 74LS TTL 74LS11 74ls11 ic for IC 74LS11 all gate ic data 74

    logic diagram of 7432

    Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
    Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-TTL D16 547408, 54H/74H08, 54S/74S08, 54LS/74LS08 54/7409, 54S/74S09, 54LS/74LS09 D18 54/7411, 54H/74H11, 54S/74S11, 54LS/74LS11, 54S/74S15, 54LS/74LS15 D17 9S41 1^1 FH [iä| [vii Eòi [T| r»1 Vcc Vcc füi Fai np f i ! Föi lyi rn


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    PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, logic diagram of 7432 CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL

    7411 3 INPUT AND gate

    Abstract: 74LS11 dm 7411 3 input and gate 7411 74LS11 pinout 7411 and gate 74S11PC 54H11 54S11DM 74H11DC
    Text: 11 CO NNECTIO N DIAGRAMS PINOUT A ^ 4 /7 4 1 1 o/fc:- £ L 54H/74H11 3 ^ u54S/74S11 o / / 6 5 3 -54LS/74LS11 TRIPLE 3-INPUT AND GATE ORDERING CODE: See Section 9 PIN PKGS OUT CO M M ERCIAL GRADE MILITARY GRADE V cc = +5.0 V ±5%, T a = 0°C to +70° C Vcc = +5.0 V ±10%,


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    PDF 54H/74H11 u54S/74S11 -54LS/74LS11 74H11PC 74S11PC, 74LS11 74H11DC 74S11 54H11 7411 3 INPUT AND gate dm 7411 3 input and gate 7411 74LS11 pinout 7411 and gate 74S11PC 54S11DM

    LC74HC11

    Abstract: No abstract text available
    Text: S A N YO SEMICONDUCTOR CORP 12E D I 7Tì?D.7ti DDGEb53 M Ì - ^ 1 LC74H C11. CMOS High-Speed Standard Logic LC74HC Senes 3003A Triple 3-lnput A N D Gate 1738A Features The L C 7 4 H C 1 1 consists o f 3 identical 3-input A N D gates. Uses C M O S silicon gate process technology to achieve operating speeds sim ilar to L S .T T L 74LS11 w ith the


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    PDF DDGEb53 LC74H LC74HC 74LS11) LC74HC11

    LS 7411

    Abstract: ls 7408 7411 triple 3-input AND 7408 hct 3- input 7408 ls 7421 7408 T4015 7408 LS
    Text: - 26 T rip le 3 In p u t A N D 741 1 VCC 1C 1Y 3C 1A 16 2A 26 39 3A 3Y 07410<7>AND* -f 7 Y = A • B •C 74LS11 IM S ± 'h K ~ h N LS ALS ALSK F S AS AC tpd max L^ H t 40 15 13 10 6 .6 7 6 8 .5 25 tpd max H— L 1 25 20 10 9 OUT 6. 5 7 .5 5 .5 7 .5 6 .2 24


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    PDF 07410WAND; LS 7411 ls 7408 7411 triple 3-input AND 7408 hct 3- input 7408 ls 7421 7408 T4015 7408 LS

    ic 7411

    Abstract: ic 7411 g 7411 ic 74LS11D 74LS11
    Text: I bSQliaB NATIONAL SENICOND {LOGIC} G2E D DQt>3b4ö 2 I r^ - / r TI C O N N E C T IO N D IA G R A M S PIN O U T A 54/7411 54H/74H11 54S/74S11 54LS/74LS11 T R IP L E 3-IN PU T A N D G A T E O R D E R IN G C O D E: See Section 9 C O M M E R C IA L G R A D E


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    PDF 54H/74H11 54S/74S11 54LS/74LS11 74H11PC 74S11PC, 4LS11 74H11DC 74S11DC, 74LS11D 74S11FC, ic 7411 ic 7411 g 7411 ic 74LS11

    74LS11

    Abstract: for IC 74LS11
    Text: Jt ^ I 1 nU/HLO I I / nU / Jt I C LO I J •T rip le 3-input Positive AND Gates •T rip le 3-input Positive AND Gates with Open Collector Outputs IP IN ARRANGEMENT IC IR C U IT SC H EM A TIC O ^) H 074L S 11 • H D 7 4 L S 1 5 RECOMMENDED OPERATING CONDITIONS


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    PDF 74LS11 74LS15 --400//A T-90-10 74LSOO ib203 for IC 74LS11

    400M

    Abstract: 74LSOO HD74LS11 HD74LS15 Hitachi Scans-001
    Text: Jt ^ I Jt 1 nU/HLO I I / nU / I C LO I J •T rip le 3-input Positive AND Gates •T rip le 3-input Positive AND Gates with Open Collector Outputs • C IR C U IT S C H E M A T IC (^ ) « P IN ARRANGEMENT ■ H D 7 4 L S 1 5 RECOMMENDED OPERATING CONDITIONS


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    PDF HD74LS11 HD74LSI5 HD74LS15 HD74LS15 QQ14CI14 DG-14 06max 20-IU8 OG-16 400M 74LSOO HD74LS11 Hitachi Scans-001

    400M

    Abstract: 74LSOO HD74LS11 HD74LS15
    Text: Jt ^ I 1 nU/HLO I I / nU / Jt I C LO I J •T rip le 3-input Positive AND Gates •T rip le 3-input Positive AND Gates with Open Collector Outputs • C IR C U IT S C H E M A T IC (^ ) « P IN ARRANGEMENT ■ H D 7 4 L S 1 5 RECOMMENDED OPERATING CONDITIONS


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    PDF HD74LS11 HD74LSI5 HD74LS15 HD74LS15 QQ14CI14 DG-14 06max 20-IU8 OG-16 400M 74LSOO HD74LS11

    Z80h

    Abstract: TDA 718 z80b 74LS74 timing diagram Z80B-CPU Z850 74ls74 timing setup hold z80a cpu Z850D 74LS164M
    Text: A p p l ic a t io n N o t e <£ZiI£3G INTERFACING Z80 CPUS TO THE Z8500 P e rip h e ra l fa m ily INTRODUCTION Data Bus Signals The Z8500 Family consists of universal peripherals that can interface to a variety of microprocessor systems that use a non-multiplexed address and


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    PDF Z8500 00-2013-A0) Z8530 Z8536 Z8038 Z80h TDA 718 z80b 74LS74 timing diagram Z80B-CPU Z850 74ls74 timing setup hold z80a cpu Z850D 74LS164M

    Untitled

    Abstract: No abstract text available
    Text: TYPES SN54H11, SN54LS11, SN54S11, SN74H11, SN74LS11, SN74S11 TRIPLE 3-INPUT POSITIVE-AND GATES R E V IS E D A P R IL 1 S 8 5 Dependable Texas Instruments Quality and Reliability SN54H11 . . . J PACKAGE SN 54LS11, SN 54 S1 1 . . . J OR W PACKAGE SN 74H11 . . . J OR N PACKAGE


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    PDF SN54H11, SN54LS11, SN54S11, SN74H11, SN74LS11, SN74S11 SN54H11 54LS11, 74H11 74LS11,

    74LS11 circuit diagram with voltage

    Abstract: 74hc11
    Text: M54HC11 M74HC11 SGS-THOMSON TRIPLE 3-INPUT AND GATE HIGH SPEED tPD = 10 ns TYP. at VCc = 5V LOW POWER DISSIPATION Ice = 1 (MAX.) at Ta = 25°C HIGH NOISE IMMUNITY = 28% V cc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS V N IH = V N IL SYMMETRICAL OUTPUT IMPEDANCE


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    PDF M54HC11 M74HC11 54/74LS11 M74HC11 M54/74HC11 74LS11 circuit diagram with voltage 74hc11