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National Semiconductor Corporation MM54HC11E/883 AND Gate, CQCC20 '
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	MM54HC11E/883		30		1	1 $7.8 10 $7.8 100 $7.33 1000 $6.63 10000 $6.63	Buy Now
National Semiconductor Corporation MM54HC11J/883 54HC11 - AND Gate, CDIP14 '
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	MM54HC11J/883		6		1	1 $0.9751 10 $0.9751 100 $0.9166 1000 $0.8288 10000 $0.8288	Buy Now

M54HC11 Datasheets (19)

Part	Manufacturer	Description	Datasheet Type	PDF
M54HC11	STMicroelectronics	Triple 3-Input AND Gate	Original	PDF
M54HC11	STMicroelectronics	RAD-HARD TRIPLE 3-INPUT AND GATE	Original	PDF
M54HC112	STMicroelectronics	RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Original	PDF
M54HC112	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Original	PDF
M54HC112D	STMicroelectronics	RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Original	PDF
M54HC112F1	SGS-Thomson	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Scan	PDF
M54HC112F1	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Scan	PDF
M54HC112F1R	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Original	PDF
M54HC112K	STMicroelectronics	RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR	Original	PDF
M54HC113	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET	Original	PDF
M54HC113F1	SGS-Thomson	DUAL J-K FLIP FLOP WITH PRESET	Scan	PDF
M54HC113F1	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET	Scan	PDF
M54HC113F1R	STMicroelectronics	DUAL J-K FLIP FLOP WITH PRESET	Original	PDF
M54HC11D	STMicroelectronics	RAD-HARD TRIPLE 3-INPUT AND GATE	Original	PDF

M54HC11F1	SGS-Thomson	TRIPLE 3-INPUT AND GATE	Scan	PDF
M54HC11F1	STMicroelectronics	TRIPLE 3-INPUT AND GATE	Scan	PDF
M54HC11F1R	STMicroelectronics	Triple 3-Input AND Gate	Original	PDF
M54HC11K	STMicroelectronics	RAD-HARD TRIPLE 3-INPUT AND GATE	Original	PDF
M54HC11K1	STMicroelectronics	RAD-HARD TRIPLE 3-INPUT AND GATE	Original	PDF

M54HC11 Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
TF311 Abstract: JK flip flop IC JK flip flop IC diagram M54HC112 M54HC112D M54HC112K Text: M54HC112 RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:	Original	M54HC112 79MHz SCC-9203-051 FPC-16 M54HC112D M54HC112K M54HC112D1 TF311 JK flip flop IC JK flip flop IC diagram M54HC112 M54HC112D M54HC112K	PDF
74hc113 Abstract: T flip flop IC Toggle flip flop IC "J-K Flip flop" LS113 M74HC113B1R M74HC113C1R M74HC113M1R M54HC113 M54HC113F1R Text: M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET . . . . . . . . HIGH SPEED fMAX = 71 MHz TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE	Original	M54HC113 M74HC113 54/74LS113 M54HC113F1R M74HC113M1R M74HC113B1R M74HC113C1R M54/74HC113 74hc113 T flip flop IC Toggle flip flop IC "J-K Flip flop" LS113 M74HC113B1R M74HC113C1R M74HC113M1R M54HC113 M54HC113F1R	PDF
M54HC112 Abstract: M54HC112D M54HC112K Text: M54HC112 RAD-HARD DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 79MHz TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:	Original	M54HC112 79MHz SCC-9203-051 M54HC112 M54HC112D M54HC112K	PDF
M54HC11 Abstract: M54HC11F1R M74HC11 M74HC11B1R M74HC11C1R M74HC11M1R Text: M54HC11 M74HC11 TRIPLE 3-INPUT AND GATE . . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE	Original	M54HC11 M74HC11 54/74LS11 M54HC11F1R M74HC11M1R M74HC11B1R M74HC11C1R M54/74HC11 M54HC11 M54HC11F1R M74HC11 M74HC11B1R M74HC11C1R M74HC11M1R	PDF
M74HC11B1R Abstract: M54HC11 M54HC11F1R M74HC11 M74HC11C1R M74HC11M1R 74ls11 ic Text: M54HC11 M74HC11 TRIPLE 3-INPUT AND GATE . . . . . . . . HIGH SPEED tPD = 7 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE	Original	M54HC11 M74HC11 54/74LS11 M54HC11F1R M74HC11M1R M74HC11B1R M74HC11C1R M54/74HC11 M74HC11B1R M54HC11 M54HC11F1R M74HC11 M74HC11C1R M74HC11M1R 74ls11 ic	PDF
IC 74HC112 Abstract: JK flip flop IC diagram 74LS112 JK EDGE TRIGGERED FLIP FLOP 74ls112 pin diagram 74ls112 function table 74HC112 Toggle flip flop IC M54HC112 M54HC112F1R M74HC112 Text: M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . . . . . . . . HIGH SPEED fMAX = 67 MHz TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 2 µA AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS	Original	M54HC112 M74HC112 54/74LS112 M54HC112F1R M74HC112M1R M74HC112B1R M74HC112C1R M54/74HC112 IC 74HC112 JK flip flop IC diagram 74LS112 JK EDGE TRIGGERED FLIP FLOP 74ls112 pin diagram 74ls112 function table 74HC112 Toggle flip flop IC M54HC112 M54HC112F1R M74HC112	PDF
M54HC11 Abstract: M54HC11D M54HC11K M54HC11K1 Text: M54HC11 RAD-HARD TRIPLE 3-INPUT AND GATE • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 9ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:	Original	M54HC11 SCC-9201-107 DILC-14 FPC-14 M54HC11D M54HC11K M54HC11D1 M54HC11K1 M54HC11 M54HC11D M54HC11K M54HC11K1	PDF
940900701F Abstract: 54HC4053 54HC273 940501301F 920305001F 940104801F 920110601F 54HC08 920112001F 940806401F Text: M54HCxxx M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Features • 2 to 6 V operating voltage ■ Low power DC dissipation: 1 µA max at 25°C ■ High speed tPD = 8 ns typ at 25°C ■ Symmetrical outputs characteristics ■ High noise immunity: 28% of min VCC	Original	M54HCxxx M54HCTxxx Flat-16 DIL-16 Flat-14 DIL-14 M54HCTxxx 940900701F 54HC4053 54HC273 940501301F 920305001F 940104801F 920110601F 54HC08 920112001F 940806401F	PDF
M54HC132 Abstract: M54HC595KG M54HC138KG 920112001F Text: M54HCxxx, M54HCTxxx Rad-hard high speed 2 to 6 V CMOS logic series Datasheet - production data Features • 2 to 6 V operating voltage • Low power DC dissipation: 1 µA max. at 25 °C • High speed tPD = 8 ns typ. at 25 °C • Symmetrical outputs characteristics	Original	M54HCxxx, M54HCTxxx Flat-14 DIL-14 Flat-16 DIL-16 DocID17367 M54HC132 M54HC595KG M54HC138KG 920112001F	PDF
74hc112 Abstract: No abstract text available Text: M54HC112 M74HC112 SCSTHOMSON m DUAL J-K FLIP FLOP WITH PRESET AND CLEAR a HIGH SPEED fMAX = 59 MHz Typ. at VCC= 5V LOW POWER DISSIPATION lCC = 2 (iA at Ta = 25°C • HIGH NOISE IMMUNITY VNIH = VNIL= 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS	OCR Scan	M54HC112 M74HC112 54/74LS112 M54/74HC112 M54HC112/M74HCis M54/74HC112 74hc112	PDF
IC 74HC112 Abstract: H74HC112 74LS112 J-K flip flop clock inputs 54HC 74HC M54HC112 M74HC112 H11L 74ls112 pin diagram Text: HS-CMOS" INTEGRATED CIRCUITS a M54HC112 M74W112 4 147 z /~ P R E L IM IN AmRVY Di DATA DUAL J-K FLIP FLOP W ITH PRESET AND CLEAR DESCRIPTION The M 5 4 /7 4 H C 1 12 is the high speed C M O S DUAL J-K FL IP -F L O P W IT H P R E S E T A N D C LE A R fabricated in silicon ga te C 2M O S technology. It	OCR Scan	M54HC112 H74HC112 M54/74HC112 M54HC112/M74HC112 IC 74HC112 H74HC112 74LS112 J-K flip flop clock inputs 54HC 74HC M54HC112 M74HC112 H11L 74ls112 pin diagram	PDF
or gate thruth table Abstract: No abstract text available Text: M54HC113 M74HC113 Æ 7 SCS-THOM SON ^ 7 # R if lQ ^ Q i[ L [ l( g ir [S @ M D ( g i DUAL J-K FLIP FLOP WITH PRESET • HIGH SPEED fMAX= 64 MHz (Typ.) at V c c = 5 V LOW POWER DISSIPATION ICC = 2 at TA = 25° C ■ HIGH NOISE IMMUNITY VniH = V n il= 28% VCc (MIN.)	OCR Scan	M54HC113 M74HC113 54/74LS113 M74HC113 M74HC113B1N 54/7AHC113 or gate thruth table	PDF
Untitled Abstract: No abstract text available Text: _ 5 b E D • 7 ^ 5 3 7 O üam S OTG ■ S G T H _ / 3 T SGS-THOM SON M54HC11 ^T #n, BMOMilLli gTrMlD i_M74HC11 S G S-THOMSON TRIPLE 3-INPUT AND GATE ■ HIGH SPEED tpo = 10 ns (TYP. at V c c = 5V ■ LOW POW ER DISSIPATION	OCR Scan	M54HC11 M74HC11 54/74LS11	PDF
74hc113 Abstract: or gate thruth table 54HC 74HC M54HC113 M74HC113 Text: Æ 7 SGS-THOMSON Ä 7# M54HC113 M74HC113 [ M lO g ^ [ i[ L [ l( g ,F [ ^ © l i O ( g S DUAL j - k f l ip f l o p w it h p r e s e t • HIGH SPEED fMAX= 64 MHz (Typ. at V q c = 5V LOW POWER DISSIPATION Ic e = 2 iiA at Ta = 2 5 °C i HIGH NOISE IM M U N ITY	OCR Scan	M54HC113 M74HC113 54/74LS M54/74HC113 M54/74HC113 74hc113 or gate thruth table 54HC 74HC M74HC113	PDF

74HC112 pin diagram Abstract: 74ls112 function table 74HC112 Text: M54HC112 M74HC112 SGS-THOMSON G L ì[LI TF[^ 5 RQ0© i DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX= 59 MHz (Typ.) at VCC= 5V LOW POWER DISSIPATION Icc = 2 at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V Nil = 28% Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY	OCR Scan	M54HC112 M74HC112 M74HC112 54/74LS112 M54/74HC112 M54/74HC112 74HC112 pin diagram 74ls112 function table 74HC112	PDF
54HC Abstract: 74HC C113 M54HC113 M74HC113 74HC113 Text: H S-CM O S INTEGRATED ¿ \\° \ CIRCUITS M54HC113 M74HC113. 4 P R E L IM IN A R Y D A T A DUAL J-K FLIP FLOP WITH PRESET DESCRIPTION T h e M 5 4 /7 4 H C 1 13 is a hig h s p e e d C M O S D U A L J-K FLIP FLO P W ITH P R E S E T fa b ric a te d in silicon	OCR Scan	M54HC113 M74HC113. M54/74HC113 54HC 74HC C113 M54HC113 M74HC113 74HC113	PDF
Untitled Abstract: No abstract text available Text: M54HC11 M74HC11 A 7# Rii]D g^(Q ILi Tr[E(Q)lR!]0©i Æ 7 S G S - T H O M S O N TRIPLE 3-INPUT AND GATE • HIGH SPEED tpo = 10 ns (TYP.) at V c c = 5V ■ LOW POWER DISSIPATION Ice = 1 /*A (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V nih = V n il = 2 °/° ^CC (MIN.)	OCR Scan	M54HC11 M74HC11 54/74LS11 M54HC11 M74HC11 M74HC	PDF
54HC Abstract: 74HC M54HC11 M74HC11 74HC 84 B1-M74HC11 Text: HS-CMOS M54HC11 M74HC11 INTEGRATED CIRCUITS o PRELIMINARY DATA TRIPLE 3-INPUT AND GATE D ES C R IPTIO N The M54/74HC11 is a high speed C M O S T R IP L E 3-INPUT AND G A T E fabricated in silicon gate C 2M O S technology. It has the same high speed performance of L S T T L combined with true C M O S	OCR Scan	M54HC11 M74HC11 M54/74HC11 M54HC11 M74HC11 B1-M74HC11 54HC 74HC 74HC 84	PDF
74HC112 Abstract: 74LS112 JK EDGE TRIGGERED FLIP FLOP Text: f Z T SGS-THOMSON ^ 7 # « [fM L E O ïM K S M54HC112 M74HC112 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR . HIGHSPEED fMAX = 67 MHz TYP. AT Vcc = 5 V • LOW POWER DISSIPATION Ice = 2 \|jA AT T a = 25 ’C ■ HIGH NOISE IMMUNITY V nih = V n il = 28 % V c c (MIN.)	OCR Scan	M54HC112 M74HC112 54/74LS112 M54/74HC112 74HC112 74LS112 JK EDGE TRIGGERED FLIP FLOP	PDF
Untitled Abstract: No abstract text available Text: SGS-THOMSON M54HC11 M74HC11 TRIPLE 3-INPUT AND GATE • HIGHSPEED tpD = 7 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Icc = 1 \|iA (MAX.) AT Ta = 25 "C ■ HIGH NOISE IMMUNITY Vnih = V n il = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTLLOADS ■ SYMMETRICAL OUTPUT IMPEDANCE	OCR Scan	M54HC11 M74HC11 54/74LS11 M54HC11F1R M74HC11M1R M74HC11B1R M74HC11C1R M54/74HC11	PDF
Untitled Abstract: No abstract text available Text: r Z Z SGS-THOMSON Ä 7# M54HC113 M74HC113 DUAL J-K FLIP FLOP WITH PRESET • HIGHSPEED fMAX = 71 MHz TYP. at VCC = 5 V ■ LOW POWER DISSIPATION Icc = 2 pA at Ta = 25 'C - HIGH NOISE IMMUNITY Vnih = V n il = 28 % V c c (MIN.) ■ OUTPUT DRIVE CAPABILITY	OCR Scan	M54HC113 M74HC113 54/74LS113 113F1R 113B1R 74HC113C1R M54/74HC113 0D54414 M54/M74HC113 005441S	PDF
74HC112 pin diagram Abstract: 74hc112 IC 74HC112 74ls112 waveform 74HC74 54HC 74HC M54HC112 M54HC112F1 M74HC112 Text: M54HC112 M74HC112 S G S -T H O M S O N K * [ f 3 HkHOT®üao S DUAL J-K FLIP FLOP WITH PRESET AND CLEAR • HIGH SPEED fMAX= 59 MHz Typ. at V c c = 5V LOW POWER DISSIPATION Ic c = 2 /iA at TA = 25 °C ■ HIGH NOISE IM M U NITY V n IH = V n i l = 28°/ o VCC (MIN.)	OCR Scan	M54HC112 M74HC112 54/74LS112 M54/74HC112 M54HC112/M74HC112 M54/74HC112 K50V- 74HC112 pin diagram 74hc112 IC 74HC112 74ls112 waveform 74HC74 54HC 74HC M54HC112F1 M74HC112	PDF
Untitled Abstract: No abstract text available Text: _ Sb E D • 7*^237 GOSSflMb 6 3 1 ■ S G T H _ / S T S C S -m O M S O N ^ 7 # H D ^ L [ l © ™ K 3D©i S M 5 4 H C 1 13 M 7 4 H C 113 T -M -0 7 -O 7 DUAL J-K FLIP FLOP WITH PRESET G S-THOMSON ■ HIGH SPEED fMAX= 64 MHz Typ. at V c c = 5V	OCR Scan		PDF
Untitled Abstract: No abstract text available Text: SbE D • 7 * ^ 2 3 7 OGB'îflm 2S7 ■ S G T H S G S -T H O M S O N M 5 4 H C Ï 12 LiOT KDD i M 7 4 H C 1 12 6 S-THOMSON ’T-HÙ-ÔT-OT DUAL J-K FLIP FLOP WITH PRESET AND CLEAR ■ HIGH SPEED fMAX = 59 MHz (Typ. at VCC= 5V LOW POWER DISSIPATION Ice = 2 jiA at TA = 25°C	OCR Scan	280/o 54/74LS112 74HC112 S-10216	PDF

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M54HC11 Search Results

M54HC11 Price and Stock

National Semiconductor Corporation MM54HC11E/883

National Semiconductor Corporation MM54HC11J/883

M54HC11 Datasheets (19)

M54HC11 Datasheets Context Search

TF311

74hc113

M54HC112

M54HC11

M74HC11B1R

IC 74HC112

M54HC11

940900701F

M54HC132

74hc112

IC 74HC112

or gate thruth table

Untitled

74hc113

74HC112 pin diagram

54HC

Untitled

54HC

74HC112

Untitled

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74HC112 pin diagram

Untitled

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