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    YROTATE-IT-S5D9 Renesas Electronics Corporation S5 Synergy Inverter Kit Visit Renesas Electronics Corporation
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    SYNERGY Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    AFP-203 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-203 Synergy Microwave Fixed attenuators Original PDF
    AFP-206 Synergy Microwave Fixed attenuators Original PDF
    AFP-210 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-210 Synergy Microwave Fixed attenuators Original PDF
    AFP-215 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-215 Synergy Microwave Fixed attenuators Original PDF
    AFP-220 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-220 Synergy Microwave Fixed attenuators Original PDF
    AFP-230 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-230 Synergy Microwave Fixed attenuators Original PDF
    AFP-240 Synergy Microwave Fixed attenuators Original PDF
    AFP-403 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-403 Synergy Microwave Fixed attenuators Original PDF
    AFP-406 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-406 Synergy Microwave Fixed attenuators Original PDF
    AFP-410 Synergy Microwave Fixed attenuators Original PDF
    AFP-410 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-415 Synergy Microwave FIXED ATTENUATOR Original PDF
    AFP-415 Synergy Microwave Fixed attenuators Original PDF
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    Untitled

    Abstract: No abstract text available
    Text: * SYNERGY S E M IC O N D U C T O R 125 MHz WRITE P R O G R A MM A B L E TIMING EDGE VERNIER DESCRIPTION FEATURES • True 125MHz retrigger rate ■ Pin-com patible with Bt605 ■ 15ps delay resolution ■ Less than ± 1 LSB tim ing accuracy ■ Differential TRIGGER and delay W RITE inputs


    OCR Scan     		PDF SY605 125MHz Bt605 28-pin SY605 125MHz-

    PS235

    Abstract: No abstract text available
    Text: *SYNERGY SY10EL52 SY100EL52 DIFFERENTIAL DATA AND CLOCK D FLIP-FLOP S E M IC O N D U C T O R FEATURES • DESCRIPTION ■ 3 65ps propagation delay The c lo c k ■ 2.0GHz toggle frequency S Y 1 0 /1 0 0 E L 5 2 D flip - f lo p s a re w it h d if fe r e n t ia l d a ta , d if fe r e n t ia l


    OCR Scan     		PDF SY10EL52 SY100EL52 75Ki2 L52ZC PS235

    Untitled

    Abstract: No abstract text available
    Text: * 5 V / 3 . 3 V ^2. + 4 /6 C L O C K SYNERGY Clockworks G E N E R A T I O N C H IP SY100EL38/L SEMICONDUCTOR DESCRIPTION FEATURES 3.3V and 5V power supply options 50ps output-to-output skew Synchronous enable/disable M aster Reset for synchronization Internal 75KQ input pull-down resistors


    OCR Scan     		PDF SY100EL38/L SY10EL38/L SY10EL38ZC SY10EL38ZCTR SY100EL38ZC 100EL38ZCTR Z20-1

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED FREQUENCY SYNTHESIZER APPLICATION NOTE FOR SPLL SERIES DESCRIPTION: FEATURES: • Exceptional Phase Noise Performance • Serial Input Programming Synergy's integrated phase-locked synthesizers consist of the low noise Synergy miniature voltage controlled oscillator con­


    OCR Scan     		PDF 14-bit

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY ClockW orka1'1 PRELIMINARY SY10/I00EL33 4 DI VI DER S EM IC O N D U C TO R DESCRIPTION FEATURES 650ps propagation delay The SY10EL/100EL33 are integrated +4 dividers. The differential clock inputs and the V b b allow a differential, single-ended or AC-coupled interface to the device. If


    OCR Scan     		PDF SY10/I00EL33 650ps SY10EL/100EL33 SY10EL33ZC SY100EL33ZC

    Untitled

    Abstract: No abstract text available
    Text: * SY10/100/101480-6 SY10/100/101480-8 SY10/100/101480-10 16K x 1 EC L RAM SYNERGY S E M IC O N D U C TO R DESCRIPTION FEATURES • Address access time, tAA: 6/8/10ns max. ■ Chip select access time, tAC: The Synergy SY10/100/101480 are 16384-bit Random Access Memories RAMs , designed with advanced Emitter


    OCR Scan     		PDF SY10/100/101480-6 SY10/100/101480-8 SY10/100/101480-10 6/8/10ns SY10/100/101480 16384-bit 16384-words-by-1-bit 10K/100K SY100480 SY101480

    Untitled

    Abstract: No abstract text available
    Text: * DUAL SUPPLY SYNERGY o c ta l e c l-to -ttl S E M IC O N D U C T O R Clockworks s y io o h a b « SY100HA643 DESCRIPTION FEATURES E C L /T T L v e rs io n o f p o p u la r E C L in P S ™ E 1 11 4 0 0 p s w ith in d e v ic e sk ew 8 0 0 p s p a rt-to -p a rt s k e w


    OCR Scan     		PDF SY100HA643 10/100H SY10HA643JC 10HA643JCTR SY100HA643JC 100HA643JCTR SY10HA643JI SY10HA643JITR SY100HA643JI SY100HA643JITR

    Untitled

    Abstract: No abstract text available
    Text: c* SY10EL01 SY100EL01 4-INPUT OR/NOR SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • 230ps propagation delay The SY10/100EL01 are 4-input OR/NOR gates. These devices are functionally equivalent to the E101 devices, with higher performance capabilities. With propagation


    OCR Scan     		PDF SY10EL01 SY100EL01 SY10/100EL01 230ps 100EL 100EL

    Untitled

    Abstract: No abstract text available
    Text: .M i P ln r k W n r k c ^ 3.3V SINGLE SUPPLY 1:9 PECL-TO-TTL SYNERGY PRELIMINARY SY10H641L SY100H641L SEM ICONDUCTOR FEATURES DESCRIPTION • 3 .3 V p o w e r s u p p ly ■ P E C L -to -T T L v e rs io n o f p o p u la r E C L in P S E111 ■ G u a ra n te e d lo w s k e w s p e c ific a tio n


    OCR Scan     		PDF SY10H641L SY100H641L SY10H641 SY10H641LJCTR SY100H641LJC Y100H641LJCTR J28-1

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY U L T R A -H IG H -S P E E D 1 K x 24 FIFO S E M IC O N D U C TO R FEATURES ADVANCE IN F O R M A T IO N S Y 6 9 1 64 DESCRIPTION • System clock speeds to 200MHz ■ User-selectable bandwidth — one read or write operation each clock cycle ■ 24-bit wide data path for efficient transfers


    OCR Scan     		PDF 200MHz 24-bit 208-pin 207-pln SY69164 DIN23

    Untitled

    Abstract: No abstract text available
    Text: * PRELIM INARY SY69167 SY69267 ULTRA-HIGH-SPEED 64-W O RD x 18-BIT FIFO SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION System clock speeds to 200MHz S y n e rg y ’s S Y 6 9 1 6 7 a nd S Y 6 9 2 6 7 are u ltra -h ig h ­ speed 6 4 -w o rd -b y -1 8 -b it F irst-In /F irst-O u t FIFO static


    OCR Scan     		PDF 18-BIT SY69167 SY69267

    Untitled

    Abstract: No abstract text available
    Text: * PROGRAMMABLE DELAY CHIP SYNERGY SEM IC O N D U C TO R FEATURES • ■ C lo c k w o r k s ' SY10E195 S Y 10Q E 195 DESCRIPTION Up to 2ns d e la y range 2 0 p s /d ig ita l s te p re s o lu tio n ■ >1 GHz b a n d w id th ■ O n -c h ip c a sca d e c irc u itry


    OCR Scan     		PDF SY10E195 10E/100E195 SY10/100E195 SY100E195 SY10E195JC SY100E195JC J28-1 J28-1

    synergy

    Abstract: 10KHECL
    Text: *SYNERGY FIFO O RDERING INFORMATION S E M IC O N D U C TO R SY69 x xx xx x x ] Special Processing \ Temperature Range C = Commercial \ Package Identifier E MQ PQ X * = c = Cerquad Flatpack Metallic Quad Flatpack Plastic Quad Flatpack Other Device Type \ I/O Designator


    OCR Scan     		PDF 10KHECL synergy

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY SY10EL04 SY100EL04 2-INPUT AND/NAND S E M IC O N D U C T O R FEATURES DESCRIPTION • 240ps propagation delay The S Y 1 0/1 0 0 E L 0 4 are 2 -in p u t A N D /N A N D gates. T hese devices are function a lly eq u iva le nt to the E104 d e vice s, w ith h ig h e r p e rfo rm a n ce c a p a b ilitie s .


    OCR Scan     		PDF SY10EL04 SY100EL04 240ps Typ14

    18-BIT

    Abstract: No abstract text available
    Text: * SYNERGY FIFOs. SEM IC O N D U C TO R PAGE Ultra-High-Speed FIFOs SY69164 Ultra-High-Speed 1Kx24 FIFO. 9-2 SY69165 Ultra-High-Speed 3Kx8 FI FO . 9-3


    OCR Scan     		PDF SY69164 SY69165 SY69167 SY69168 SY69170 1Kx24 64-Word 18-Bit

    LD 757 ps

    Abstract: No abstract text available
    Text: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be


    OCR Scan     		PDF SY100S324 F100K SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 LD 757 ps

    ic 3525 internal block diagram

    Abstract: s815
    Text: * SINGLE SUPPLY QUAD SYNERGY C lockworks SY100S815 PECL/TTL-TO-PECL SEMICONDUCTOR FEATURES • ■ Quad PECL version of popular ECLinPS El 11 ■ Low skew ■ Guaranteed skew spec ■ TTL enable Input ■ Selectable TTL or PECL clock input ■ Single +5V supply


    OCR Scan     		PDF SY100S815 SY100S815ZC Y100S815ZCTR Z16-1 ic 3525 internal block diagram s815

    "dj cd"

    Abstract: circuit mri oscillator
    Text: * SYNERGY C o p yC lo ck m Clockworks " S E M IC O N D U C T O R FEATURES D E S C R IP T IO N Less than 500ps of edge skew between any two outputs — FOREVER Master, plus up to 3 slaves, provide up to 32 TTLcom patible outputs per board Clock frequencies to 125MHz


    OCR Scan     		PDF 500ps 125MHz 28-pin SY69401 "dj cd" circuit mri oscillator

    Untitled

    Abstract: No abstract text available
    Text: * C lo c k w o rk s SY10EL34/L SY100EL34/L 5V/3.3V +2, +4, ^8 CLOCK GENERATION CHIP SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION 3.3V and 5V power supply options 50ps ou tput-to-output skew Synchronous enable/disable Master Reset fo r synchronization Internal 75KQ input pull-down resistors


    OCR Scan     		PDF SY10EL34/L SY100EL34/L SY10EL34ZC SY10EL34ZCTR SY100EL34ZC SY100EL34ZCTR Z16-2 SY10EL34LZC

    Untitled

    Abstract: No abstract text available
    Text: SINGLE_SUPPLY PECL-TTL 1:4 CLOCK DRIVER SYNERGY p rE f LIM m m IN IIIII rv PR AR Y SY1Q 1D0H843 SEM IC O N D U C TO R DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-TTL ■ 300ps pln-to-pin skew ■ Guaranteed skew spec ■ Differential internal design for Increased noise


    OCR Scan     		PDF 1D0H843 300ps SY10H843 SY100H843 SY10/100H843 SY10H843ZC SY100H843ZC Z16-1

    Untitled

    Abstract: No abstract text available
    Text: * SY10EL35 SY100EL35 JK FLIP-FLOP SYNERGY S E M IC O N D U C T O R DESCRIPTION FEATURES • 525ps propagation delay The S Y 10 /1 00EL35 are high-speed JK Flip-Flops. The J/K data enters the m aster portion of the flip -flop when the clock is LO W and is tran sfe rre d to the slave and,


    OCR Scan     		PDF SY10EL35 SY100EL35 525ps 75KLi 00EL35 SOIC400 SY10EL352C SY10EL35ZCTR SY100EL35ZC SY100EL35ZCTR

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY FR E QU E NC Y S YNTHESI ZER 60MHz to 1 GHz ClockW orks SY89424V S E M IC O N D U C T O R FEATURES • 3.3V and 5V power supply options ■ Up to 1GHz clock frequencies ■ Internal quartz reference oscillator driven by quartz crystal or PECL source


    OCR Scan     		PDF 60MHz SY89424V 600mV 16-pin SY89424V 10-25MHz 500MHz SY89424VZC SY89424VZCTR

    Untitled

    Abstract: No abstract text available
    Text: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC


    OCR Scan     		PDF SY10H841 SY100H841 40MHz 300ps) SY10/100H841 SY10H841ZC SY100H841ZC Z16-1

    Untitled

    Abstract: No abstract text available
    Text: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply


    OCR Scan     		PDF SY10H603 SY100H603 200pF 10Hxxx) 100Hxxx) MC10H/100H603 200pF