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    SY100S324DC Search Results

    SY100S324DC Datasheets (4)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    SY100S324DC Synergy Semiconductor LOW POWER HEX TTL-TO-ECL TRANSLATOR Scan PDF
    SY100S324DC Synergy Semiconductor Low Power Hex TTL-to-ECL Translator Scan PDF
    SY100S324DC Synergy Semiconductor LOW POWER HEX TTL-to-ECL TRANSLATOR Scan PDF
    SY100S324DC Synergy Semiconductor LOW POWER HEX TTL-to-ECL TRANSLATOR Scan PDF

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    F100K

    Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR
    Text: SYNERGY SY100S324 LOW POWER HEX TTL-to-ECL TRANSLATOR SEMICONDUCTOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL


    Original
    PDF SY100S324 SY100S324 00S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 F100K SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR

    LD 757 ps

    Abstract: No abstract text available
    Text: * LOW POW ER HEX TTL-to-ECL TRANSLATO R SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES Max. propagation delay of 1.4ns The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. The inputs are TTL com patible with diffe re n tia l o utputs that can e ith e r be


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    PDF SY100S324 F100K SY100S324 SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 LD 757 ps

    Untitled

    Abstract: No abstract text available
    Text: ^ LOW POWER HEX TTL-tO-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be used


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    PDF SY100S324 SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1

    D241 diode

    Abstract: TIL 1025 block diagram of VCD PS 1025 SY100S324 SY100S324DC SY100S324FC SY100S324JC
    Text: This Material Copyrighted By Its Respective Manufacturer SY100S324 SEM IC O N D U C TO R BLOCK DIAGRAM DC ELECTRICAL CHARACTERISTICS Vee = - 4 .2 V to - 5 .4 6 V un le ss o th e rw is e specified, V c c = V c c a = G N D , V t t l = -+4.5V to -+5.5V, T a = 0 °C to + 85°C


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    PDF SY100S324 T0D13Ã SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 D241 diode TIL 1025 block diagram of VCD PS 1025 SY100S324

    D121D

    Abstract: 100S324 D2627
    Text: * L O W P O W E R HEX TTL-i d-ECl . T R A N S L A T O R SYNERGY w 100S 324 S E M IC O N D U C T O R FEATURES • Max. propagation delay of 1.4ns ■ IEE min. of -70m A ■ Industry standard 100K ECL levels ■ Extended supply voltage option: V ee = -4.2V to -5.5V


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    PDF F100K 24-pin 28-pin SY100S324DC SY100S324FC SY100S324JC SY100S324JCTR D24-1 F24-1 D121D 100S324 D2627

    Untitled

    Abstract: No abstract text available
    Text: * LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL compatible with differential outputs that can either be


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    PDF SY100S324 SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 100S324JC J28-1 SY100S324JCTR

    F100K

    Abstract: SY100S324 SY100S324DC SY100S324FC SY100S324JC 01oT
    Text: LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERG Y SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70mA Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for


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    PDF SY100S324 -70mA F100K 24-pin 28-pin SY100S324 J28-1) F100K SY100S324DC SY100S324FC SY100S324JC 01oT

    Untitled

    Abstract: No abstract text available
    Text: * LOW POW ER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns IEE min. of -70m A Industry standard 100K ECL levels Extended supply voltage option: V ee = -4.2V to -5.5V Differential outputs Voltage and temperature compensation for


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    PDF SY100S324 F100K 24-pin 28-pin SY100S324

    Untitled

    Abstract: No abstract text available
    Text: « LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION • Max. propagation delay of 1.4ns ■ I ee mln. of -70mA ■ ESO protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option: — VEE = -4.2V to -5.46V


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    PDF SY100S324 -70mA F100K SY100S324 T0D13Ã SY100S324DC D24-1 SY100S324FC F24-1

    F100K

    Abstract: SY100S324 SY100S324DC D2418
    Text: * LOW PO W ER HEX TTL-to-E C L TRANSLATO R SYNERGY S E M IC O N D U C T O R FEATURES SY100S324 DESCRIPTION Max. propagation delay of 1,4ns min. of —70mA The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL


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    PDF SY100S324 F100K D24-1 TD013Ã 0DD21Ã SY100S324DC D24-1 SY100S324FC F24-1 F100K SY100S324 D2418

    F100K

    Abstract: SY100S324 SY100S324FC D241 diode
    Text: ^001301 000232'ì bET «0» LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SY100S324 S E M IC O N D U C T O R DESCRIPTION FEATURES The SY100S324 is a hex translator designed to convert T T L logic levels to 100K ECL levels. T he inputs are TTL com patible w ith diffe re n tia l outputs th a t can e ither be


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    PDF SY100S324 -70mA F100K D24-1 1DD13Ã SY1OOS324DC D24-1 SY100S324FC F24-1 SY100S324JC F100K SY100S324 D241 diode

    Untitled

    Abstract: No abstract text available
    Text: • 5 0 G 1 3 fll ÜDDSBST 1 2 e] WÊ L O W P O W E R H EX T T L -to -E C L T R A N S L A T O R SYNERGY SY100S324 SEMICONDUCTOR FEATURES DESCRIPTION Max. propagation delay of 1.4ns T h e S Y 1 0 0 S 3 2 4 is a h e x tra n s la to r d e s ig n e d to co n v e rt


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    PDF SY100S324 SY100S324DC D24-1 SY100S324FC F24-1 SY100S324JC J28-1 SY100S324JCTR