AN1064
Abstract: CY62167E 1M x 16 SRAM
Text: CY62167E MoBL 16-Mbit 1M x 16 / 2M x 8 Static RAM Features • • • • (CE1 HIGH, or CE2 LOW, or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • The device is deselected (CE1 HIGH or CE2 LOW)
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CY62167E
16-Mbit
AN1064
1M x 16 SRAM
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Untitled
Abstract: No abstract text available
Text: UPD482445G5-60 1/2 IL08D C-MOS 4M-BIT DUALPORT GRAPHICS BUFFER —TOP VIEW— 30 1 VDD DT/OE IN 2 3 GND 70 SC 69 SE IN 31 IN 32 33 GND 68 34 SIO0 I/O 4 67 IO15 W0/IO0 I/O 5 66 W15/IO15 SIO1 W1/IO1 I/O I/O 6 7 8 VDD I/O 65 SIO14 39 64 W14/IO14 40 I/O W15/IO15
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UPD482445G5-60
IL08D
SIO15
W15/IO15
SIO14
W14/IO14
W13/IO13
W12/IO12
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55BV
Abstract: AN1064 CY62167EV18 CY62167EV18LL CY62167EV18LL-55BAXI CY62167EV18LL-55BVXI CY62167EV30LL
Text: CY62167EV18 MoBL 16-Mbit 1M x 16 Static RAM Features by 99% when addresses are not toggling. Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: the device is
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CY62167EV18
16-Mbit
55BV
AN1064
CY62167EV18LL
CY62167EV18LL-55BAXI
CY62167EV18LL-55BVXI
CY62167EV30LL
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Untitled
Abstract: No abstract text available
Text: CY62167EV18 MoBL PRELIMINARY 16-Mb 1M x 16 Static RAM Features input and output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 55 ns • Deselected (CE1HIGH or CE2 LOW) • Wide voltage range: 1.65V – 2.25V • Outputs are disabled (OE HIGH)
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CY62167EV18
16-Mb
48-ball
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CY62177DV20
Abstract: AN1064 CY62177DV20LL-70BAI
Text: CY62177DV20 MoBL2 32-Mbit 2M x 16 Static RAM Features by 99% when addresses are not toggling. The device can also be put into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when:
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CY62177DV20
32-Mbit
AN1064
CY62177DV20LL-70BAI
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Untitled
Abstract: No abstract text available
Text: IO43/SD_DAT0 IO44/SD_CMD IO39/SD_DAT3 1 3 5 7 9 IO18 IO22/CAN_RD1 IO36/SPI_MOSI2 IO35/SPI_SCK2 +5V VCC X9 LED_SPEED ETH_TX_DETH_RX_D- 1 3 5 7 9 IO46/AD7 IO7/AD3/AOUT/RXD3 IO24/SPI_MOSI1 IO27/SPI_SCK1 E IO6/AD2/TXD3 IO15 IO25/SPI_MISO1 AOSU Y IO45/AD6 IO8/AD0/TCH_XL
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IO43/SD
IO44/SD
IO39/SD
IO22/CAN
IO36/SPI
IO35/SPI
IO46/AD7
IO24/SPI
IO27/SPI
IO25/SPI
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AN1064
Abstract: No abstract text available
Text: CY62136ESL MoBL 2 Mbit 128K x 16 Static RAM Features • Very high speed: 45 ns mode reduces power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: ■ Wide voltage range: 2.2V to 3.6V and 4.5V to 5.5V
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CY62136ESL
AN1064
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CY62157DV18
Abstract: CY62157DV20 CY62157EV18
Text: CY62157EV18 MoBL 8-Mbit 512K x 16 Static RAM Features deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 55 ns • Wide voltage range: 1.65V–2.25V
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CY62157EV18
CY62157DV18
CY62157DV20
CY62157DV20
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VDR 0047
Abstract: AN1064 CY62146E
Text: CY62146E MoBL 4-Mbit 256K x 16 Static RAM Features device into standby mode reduces power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Deselected (CE HIGH)
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CY62146E
VDR 0047
AN1064
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CY62167DV18
Abstract: CY62167DV18LL-55BVXI
Text: CY62167DV18 MoBL 16-Mbit 1M x 16 Static RAM Features consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Deselected (CE1 HIGH or CE2 LOW)
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CY62167DV18
16-Mbit
CY62167DV18LL-55BVXI
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CY62146E-45LL
Abstract: CY62146
Text: CY62146E MoBL 4-Mbit 256K x 16 Static RAM Features can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 45 ns
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CY62146E
44-pin
CY62146E-45LL
CY62146
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46321
Abstract: No abstract text available
Text: CY62146E MoBL 4-Mbit 256K x 16 Static RAM Features device into standby mode reduces power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Deselected (CE HIGH)
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CY62146E
44-pin
46321
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Untitled
Abstract: No abstract text available
Text: CY62147EV18 MoBL2 4-Mbit 256K x 16 Static RAM Features consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 55 ns
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CY62147EV18
CY62147DV18
48-ball
48-pin
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Untitled
Abstract: No abstract text available
Text: CY62167EV18 MoBL 16-Mbit 1M x 16 Static RAM Features consumption by 99% when addresses are not toggling. Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance
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CY62167EV18
16-Mbit
48-ball
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Untitled
Abstract: No abstract text available
Text: CY62147EV18 MoBL2 4-Mbit 256K x 16 Static RAM Features The device can also be put into standby mode reducing power consumption by more than 99% when deselected (CE HIGH or both BLE and BHE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when:
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CY62147EV18
CY62147DV18
48-ball
48-pin
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AN1064
Abstract: CY62126ESL-45ZSXI
Text: CY62126ESL MoBL 1-Mbit 64K x 16 Static RAM Features consumption when addresses are not toggling. Placing the device into standby mode reduces power consumption by more than 99 percent when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance
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CY62126ESL
AN1064
CY62126ESL-45ZSXI
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CY62167DV18
Abstract: CY62167DV18LL-55BVXI
Text: CY62167DV18 MoBL 16-Mbit 1M x 16 Static RAM Features consumption by more than 99% when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Deselected (CE1 HIGH or CE2 LOW)
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CY62167DV18
16-Mbit
CY62167DV18LL-55BVXI
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AN1064
Abstract: CY62167E
Text: CY62167E MoBL 16-Mbit 1M x 16 / 2M x 8 Static RAM Features • • • • (CE1 HIGH, or CE2 LOW, or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • The device is deselected (CE1 HIGH or CE2 LOW)
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CY62167E
16-Mbit
AN1064
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Untitled
Abstract: No abstract text available
Text: CY7C1020D 512-Kbit 32 K x 16 Static RAM 512-Kbit (32 K × 16) Static RAM Features • Pin- and function-compatible with CY7C1020B ■ High speed ❐ tAA ■ = 10 ns Low active power ❐ ICC ■ consumption when deselected.The input and output pins (IO0 through IO15) are placed in a high-impedance state when:
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CY7C1020D
512-Kbit
CY7C1020B
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Untitled
Abstract: No abstract text available
Text: CY62157E MoBL 8-Mbit 512K x 16 Static RAM Features Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input or output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 45 ns
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CY62157E
44-pin
48-ball
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CY62157DV18
Abstract: CY62157DV20 CY62157EV18
Text: CY62157EV18 MoBL 8-Mbit 512K x 16 Static RAM Features deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: • Very high speed: 55 ns • Wide voltage range: 1.65V–2.25V
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CY62157EV18
CY62157DV18
CY62157DV20
CY62157DV20
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AN1064
Abstract: CY62167EV18 CY62167EV18LL CY62167EV18LL-55BAXI CY62167EV18LL-55BVXI
Text: CY62167EV18 MoBL 16-Mbit 1M x 16 Static RAM Features by 99% when addresses are not toggling. Place the device into standby mode when deselected (CE1 HIGH or CE2 LOW or both BHE and BLE are HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: the device is
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CY62167EV18
16-Mbit
AN1064
CY62167EV18LL
CY62167EV18LL-55BAXI
CY62167EV18LL-55BVXI
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Untitled
Abstract: No abstract text available
Text: CY7C1020D 512-Kbit 32 K x 16 Static RAM 512-Kbit (32 K × 16) Static RAM Features • Pin- and function-compatible with CY7C1020B ■ High speed ❐ tAA ■ = 10 ns Low active power ❐ ICC ■ consumption when deselected.The input and output pins (IO0 through IO15) are placed in a high-impedance state when:
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CY7C1020D
512-Kbit
CY7C1020B
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AN1064
Abstract: CY62146E
Text: CY62146E MoBL 4-Mbit 256K x 16 Static RAM Features • Very high speed: 45 ns mode reduces power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO0 through IO15) are placed in a high impedance state when: ■ Wide voltage range: 4.5V–5.5V
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CY62146E
AN1064
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