NT5SV8M16FS
Abstract: Nanya NT5SV8M16FS NT5SV8M16FS-75BI Nanya NT5SV8M16FS-75Bi NT5SV8M16FS-6KI NT5SV8M16FT NT5SV8M16FT-6KI nt5sv8m16fs-6k 54-PIN NT5SV8M16FT-6K
Text: NT5SV8M16FT-6KI NT5SV8M16FS-6KI NT5SV8M16FT-75BI NT5SV8M16FS-75BI 128Mb Synchronous DRAM • • • • • • • • • • • • Features • High Performance: Maximum Operating Speed CAS Latency PC166 6KI PC133 (75BI) 2 7.5 10 ns 3 6 7.5 ns •
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NT5SV8M16FT-6KI
NT5SV8M16FS-6KI
NT5SV8M16FT-75BI
NT5SV8M16FS-75BI
128Mb
PC166
PC133
NT5SV8M16FS
Nanya NT5SV8M16FS
NT5SV8M16FS-75BI
Nanya NT5SV8M16FS-75Bi
NT5SV8M16FS-6KI
NT5SV8M16FT
NT5SV8M16FT-6KI
nt5sv8m16fs-6k
54-PIN
NT5SV8M16FT-6K
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dax6
Abstract: Mobile SDRAM
Text: V55C1256164MG 256Mbit MOBILE SDRAM 1.8 VOLT, TSOP II / FBGA PACKAGE 16M X 16 75 9 10 System Frequency fCK 133 MHz 111 MHz 100MHz Clock Cycle Time (tCK3) 7.5ns 9.0 ns 10 ns Clock Access Time (tAC3) CAS Latency = 3 6.0 ns 7.0 ns 8.0ns • Available in 54-ball FBGA (with 9x6 ball array
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V55C1256164MG
256Mbit
100MHz
dax6
Mobile SDRAM
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Untitled
Abstract: No abstract text available
Text: 0316409C 4M x 412/10, 3.3V, SR. 0316169C 1M x 1612/8, 3.3V, SR. 0316809C 2M x 812/9, 3.3V, SR. 4Mx4, 2Mx8, 1Mx16 16Mbit Enhanced Synchronous DRAM Preliminary Features • High Performance: CAS latency = 2 fCK Clock Frequency tCK2 Clock Cycle tAC2 Clock Access Time
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0316409C
0316169C
0316809C
1Mx16
16Mbit
-12ns
545-DRAM;
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Untitled
Abstract: No abstract text available
Text: 0316409C 4M x 412/10, 3.3V, SR. 0316169C 1M x 1612/8, 3.3V, SR. 0316809C 2M x 812/9, 3.3V, SR. 4Mx4, 2Mx8, 1Mx16 16Mbit Enhanced Synchronous DRAM Preliminary Data Sheet Overview Features • High Performance: CAS latency = 2 • Programmable Burst Length: 1,2,4,8,full-page
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0316409C
0316169C
0316809C
1Mx16
16Mbit
SM2402T-6
SM2403T-6
SM2404T-6
SM2402T-7
SM2403T-7
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EM63A165TS-5G
Abstract: EM63A165TS-6G EM63A165TS-7G EM63A165TS cke 2009 EM63A165
Text: EtronTech EM63A165TS 16M x 16 bit Synchronous DRAM SDRAM Etron Confidential Features • • • • • • • • • • • • Fast access time from clock: 4.5/5.4/5.4 ns Fast clock rate: 200/166/143 MHz Fully synchronous operation Internal pipelined architecture
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EM63A165TS
16-bit
cycles/64ms
54-pin
EM63A165
EM63A165TS-5G
EM63A165TS-6G
EM63A165TS-7G
EM63A165TS
cke 2009
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V54C3128164VAT
Abstract: No abstract text available
Text: V54C3128164VAT HIGH PERFORMANCE 143/133/125MHz 3.3 VOLT 8M X 16 SYNCHRONOUS DRAM 4 BANKS X 2Mbit X 16 MOSEL VITELIC PRELIMINARY 7PC 7 8PC System Frequency fCK 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C3128164VAT
143/133/125MHz
V54C3128164VAT
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Untitled
Abstract: No abstract text available
Text: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns
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V54C365
64Mbit
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V54C3128
Abstract: No abstract text available
Text: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns
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V54C3128
128Mbit
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Untitled
Abstract: No abstract text available
Text: V54C365 16/80/40 4VE 64Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 4M X 16, 8M X 8, 16M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns
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V54C365
64Mbit
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Untitled
Abstract: No abstract text available
Text: V54C3256 16/80/40 4VD*I 256Mbit SDRAM, INDUSTRIAL TEMPERATURE 3.3 VOLT, TSOP II / FBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C3256
256Mbit
x16Mbit
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Untitled
Abstract: No abstract text available
Text: V54C3256 16/80/40 4VD 256Mbit SDRAM 3.3 VOLT, TSOP II / FBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns
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V54C3256
256Mbit
x16Mbit
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Untitled
Abstract: No abstract text available
Text: V54C3256 16/80/40 4VH 256Mbit SDRAM 3.3 VOLT, TSOP II / FBGA PACKAGE 16M X 16, 32M X 8, 64M X 4 6 7PC 7 System Frequency (fCK) 166 MHz 143 MHz 143 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns Clock Access Time (tAC2) CAS Latency = 2
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V54C3256
256Mbit
16Mbit
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V54C3128
Abstract: No abstract text available
Text: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns
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V54C3128
128Mbit
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V54C3128
Abstract: No abstract text available
Text: V54C3128 16/80/40 4VC 128Mbit SDRAM 3.3 VOLT, TSOP II / BGA PACKAGE 8M X 16, 16M X 8, 32M X 4 5 6 7PC 7 10 System Frequency (fCK) 200 MHz 166 MHz 143 MHz 143 MHz 100 MHz Clock Cycle Time (tCK3) 5 ns 6 ns 7 ns 7 ns 10 ns Clock Access Time (tAC3) CAS Latency = 3
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V54C3128
128Mbit
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P-TSOPII-54
Abstract: caz smd PC133 registered reference design
Text: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10
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39S64400/800/160ET
64-MBit
P-TSOPII-54
caz smd
PC133 registered reference design
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54BALL
Abstract: V54C3128
Text: V54C3128 16/80/40 4VB 128Mbit SDRAM 3.3 VOLT, TSOP II / FBGA 8M X 16, 16M X 8, 32M X 4 6 7PC 7 8PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3) CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns
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V54C3128
128Mbit
54BALL
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SMD MARKING T20
Abstract: smd marking T22 MARKING A3 SMD MARKING CODE a09
Text: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge
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39S64400/800CT
64-MBit
SPT03933
SMD MARKING T20
smd marking T22
MARKING A3
SMD MARKING CODE a09
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NT56V6610C0T-8A
Abstract: nanya part guide 56 NT56V6610C0T-8B NT56V6610C0T-75B NT56V6610C0T NT56V6610C0T-75 NT56V6620C0T NT56V6620C0T-8A
Text: NT56V6610C0T NT56V6620C0T 64Mb : x8 x16 PC133 / PC100 Synchronous DRAM NT56V6610C0T 8Mx8 NT56V6620C0T (4Mx16) 64Mb Synchronous DRAM Data Sheet REV 1.1 June, 2000 1 NANYA TECHNOLOGY CORP. NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
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NT56V6610C0T
NT56V6620C0T
PC133
PC100
4Mx16)
NT56V6610C0T-8A
nanya part guide 56
NT56V6610C0T-8B
NT56V6610C0T-75B
NT56V6610C0T
NT56V6610C0T-75
NT56V6620C0T
NT56V6620C0T-8A
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P-TSOPII-54
Abstract: PC133 registered reference design
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)
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39S128400/800/160CT
128-MBit
P-TSOPII-54
PC133 registered reference design
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marking code EY SMD
Abstract: PC100-222-620 P-TSOPII-54
Text: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN
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HYB39L256160AC/T
256MBit
16Mbit
P-TFBGA-54,
PC133
SPT03919-3
marking code EY SMD
PC100-222-620
P-TSOPII-54
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Q 2 72 t5
Abstract: Q 72 t5 T436432B T436432B-55SG T436432B-5S T436432B-5SG
Text: tm TE CH T436432B SDRAM 512K x 32bit x 4Banks Synchronous DRAM FEATURES GRNERAL DESCRIPTION 2M x 32 SDRAM • • • • • 3.3V power supply Clock cycle time : 5 / 5.5 / 6 / 7 / 8 / 10 ns Internal four banks operation LVTTL compatible with multiplexed address
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T436432B
32bit
400mil
Q 2 72 t5
Q 72 t5
T436432B
T436432B-55SG
T436432B-5S
T436432B-5SG
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T431616D-5S
Abstract: T431616E
Text: tm TE CH T431616D/E SDRAM 512K x 16bit x 2Banks Synchronous DRAM FEATURES GRNERAL DESCRIPTION Fast access time: 5/6/7 ns • Fast clock rate: 200/166/143 MHz • Self refresh mode: standard and low power • Internal pipelined architecture • 512K word x 16-bit x 2-bank
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T431616D/E
16bit
16-bit
cycles/64ms
50-pin
60-ball,
T431616D-5S
T431616E
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T4312816B
Abstract: No abstract text available
Text: tm TE CH T4312816B SDRAM 2M x 16bit x 4Banks Synchronous DRAM 8M x 16 SDRAM FEATURES GRNERAL DESCRIPTION • The T4312816B SDRAM is a high-speed CMOS synchronous DRAM containing 128 Mbits. It is internally configured as 4 Banks of 2M word x 16 DRAM with a
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T4312816B
16bit
T4312816B
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lr transistor t7
Abstract: Q 72 t5 T436416D
Text: tm TE CH T436416D 4M x 16 SDRAM SDRAM 1M x 16bit x 4Banks Synchronous DRAM FEATURES GRNERAL DESCRIPTION • Fast access time from clock: 4.5/5/5.4 ns • Fast clock rate: 200/166/143 MHz • Fully synchronous operation • Internal pipelined architecture • 1M word x 16-bit x 4-bank
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T436416D
16bit
16-bit
cycles/64ms
54-pin
60-Ball,
T436416D
lr transistor t7
Q 72 t5
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