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    CY7C162 Price and Stock

    Cypress Semiconductor CY7C1620KV18-250BZXC

    NO WARRANTY
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    DigiKey CY7C1620KV18-250BZXC Tray 400 1
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    Cypress Semiconductor CY7C1625KV18-250BZXC

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    Cypress Semiconductor CY7C1625KV18-250BZXI

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    Infineon Technologies AG CY7C1620KV18-250BZXC

    IC SRAM 144MBIT PAR 165FBGA
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    Infineon Technologies AG CY7C1620KV18-333BZXI

    IC SRAM 144MBIT PAR 165FBGA
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    Rochester Electronics CY7C1620KV18-333BZXI 38 1
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    CY7C162 Datasheets (124)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY7C162 Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Original PDF
    CY7C1620KV18-250BZXC Cypress Semiconductor Integrated Circuits (ICs) - Memory - IC SRAM 144M PARALLEL 165FBGA Original PDF
    CY7C1620KV18-333BZXI Cypress Semiconductor Integrated Circuits (ICs) - Memory - IC SRAM 144M PARALLEL 165FBGA Original PDF
    CY7C162-10DC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-10LC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-10PC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-10VC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-12DC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-12LC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-12PC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Original PDF
    CY7C162-12PC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Scan PDF
    CY7C162-12PC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-12VC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Original PDF
    CY7C162-12VC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-12VC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Scan PDF
    CY7C162-15DC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-15LC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-15PC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Original PDF
    CY7C162-15PC Cypress Semiconductor 16,384 x 4 Static R/W RAM Separate I/O Scan PDF
    CY7C162-15PC Cypress Semiconductor 16K x 4 Static RAM with Separate I/O Scan PDF
    ...

    CY7C162 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    CY7C161

    Abstract: CY7C162 C1624
    Text: CY7C161 CY7C162 16K x 4 Static RAM with Separate I/O Features Easy memory expansion is provided by active LOW chip enables CE1, CE2 and three-state drivers. They have an automatic power-down feature, reducing the power consumption by 65% when deselected.


    Original     		PDF CY7C161 CY7C162 15-ns 7C161) CY7C161 CY7C162 C1624

    CY7C1620KV18-250BZXC

    Abstract: No abstract text available
    Text: CY7C1618KV18, CY7C1620KV18 144-Mbit DDR II SRAM Two-Word Burst Architecture 144-Mbit DDR II SRAM Two-Word Burst Architecture Features Configuration • 144-Mbit density 8 M x 18, 8 M × 36 CY7C1618KV18 – 8 M × 18 ■ 333 MHz clock for high bandwidth


    Original     		PDF CY7C1618KV18, CY7C1620KV18 144-Mbit CY7C1618KV18 CY7C1620KV18-250BZXC

    C1623

    Abstract: C1624 c162 c1627 C1622 CY7C161 CY7C162 C1628 C1625
    Text: 1CY 7C16 2 CY7C161 CY7C162 16K x 4 Static RAM with Separate I/O Features Easy memory expansion is provided by active LOW chip enables CE1, CE2 and three-state drivers. They have an automatic power-down feature, reducing the power consumption by 65% when deselected.


    Original     		PDF CY7C161 CY7C162 15-ns 7C161) C1623 C1624 c162 c1627 C1622 CY7C161 CY7C162 C1628 C1625

    cmos SRAM 35ns 8k X 8 dip

    Abstract: 7C166 CY7C161 CY7C162 CY7C164 CY7C166 CY7C185 CY7C186 CY7C187 7C164
    Text: Qualification Report January 1992 QTP 91094 64K SRAM FAMILY MARKETIN G DEVICE PART NBR DESCRIPTION CY7C161 16K x 4 SIO CY7C162 16K x 4 (SIO) CY7C164 16K x 4 CY7C166 (OE) CY7C185 8K x 8 CY7C186 8K x 8 (.6 DIP) CY7C187 64K x 1 Version 1.2 PRODUCT DESCRIPTION (for qualification)


    Original     		PDF CY7C161 CY7C162 CY7C164 CY7C166 CY7C185 CY7C186 CY7C187 Cypr507/1 200mA cmos SRAM 35ns 8k X 8 dip 7C166 CY7C161 CY7C162 CY7C164 CY7C166 CY7C185 CY7C186 CY7C187 7C164

    CY7C161A

    Abstract: CY7C162A A5624 cy7c161a-35dmb
    Text: CY7C161A CY7C162A 16KĂxĂ4 Static RAM with Separate I/O into the memory location specified on the Features Functional Description D The CY7C161A and CY7C162A are highĆ performance CMOS static RAMs orgaĆ nizes as 16,384 by 4 bits with separate I/O. Easy memory expansion is provided by acĆ


    Original     		PDF CY7C161A CY7C162A 16Kx4 7C162A CY7C161A CY7C162A A5624 cy7c161a-35dmb

    C1623

    Abstract: C1624 C1627 C1622 c1628 C162 CY7C161 CY7C162 7C162 C1625
    Text: CY7C161 CY7C162 16KĂxĂ4 Static RAM with Separate I/O Features Functional Description D The CY7C161 and CY7C162 are highĆperĆ formance CMOS static RAMs organized as 16,384 by 4 bits with separate I/O. Easy memory expansion is provided by active LOW chip enables CE1, CE2 and threeĆ


    Original     		PDF CY7C161 CY7C162 16Kx4 7C162 CY7C161 CY7C162 C1623 C1624 C1627 C1622 c1628 C162 C1625

    Untitled

    Abstract: No abstract text available
    Text: CY7C1618KV18, CY7C1620KV18 144-Mbit DDR II SRAM Two-Word Burst Architecture 144-Mbit DDR II SRAM Two-Word Burst Architecture Features Configuration • 144-Mbit density 8 M x 18, 8 M × 36 CY7C1618KV18 – 8 M × 18 ■ 333 MHz clock for high bandwidth


    Original     		PDF CY7C1618KV18, CY7C1620KV18 144-Mbit CY7C1618KV18

    Untitled

    Abstract: No abstract text available
    Text: CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 144-Mbit QDR II SRAM 2-Word Burst Architecture 144-Mbit QDR ® II SRAM 2-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1625KV18 – 16 M x 9


    Original     		PDF 144-Mbit CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 CY7C1625KV18 CY7C1612KV18 333-MHz

    3M Touch Systems

    Abstract: No abstract text available
    Text: CY7C1623KV18 144-Mbit DDR-II SIO SRAM Two-Word Burst Architecture 144-Mbit DDR-II SIO SRAM Two-Word Burst Architecture Features Configuration • 144-Mbit density 8 M x 18 CY7C1623KV18 – 8 M × 18 ■ 333 MHz clock for high bandwidth Functional Description


    Original     		PDF CY7C1623KV18 144-Mbit 3M Touch Systems

    CY7C161A

    Abstract: CY7C162A
    Text: CY7C161A CY7C162A 16K x 4 Static RAM with Separate I/O Features Easy memory expansion is provided by active LOW chip enables CE1, CE2 and three-state drivers. They have an automatic power-down feature, reducing the power consumption by 60% when deselected.


    Original     		PDF CY7C161A CY7C162A 7C161A) 38-00116-C 28-Lead 300-Mil) 28-Pin MIL-STD-1835 CY7C161A CY7C162A

    Untitled

    Abstract: No abstract text available
    Text: CY7C1625KV18 CY7C1612KV18 CY7C1614KV18 144-Mbit QDR II SRAM Two-Word Burst Architecture 144-Mbit QDR ® II SRAM Two-Word Burst Architecture Features Configurations Separate independent read and write data ports ❐ Supports concurrent transactions CY7C1625KV18 – 16 M x 9


    Original     		PDF CY7C1625KV18 CY7C1612KV18 CY7C1614KV18 144-Mbit 360-MHz

    CY7C1614KV18

    Abstract: CY7C1612KV18-300BZXI CY7C1614KV18-250BZXC CY7C1612KV18
    Text: CY7C1610KV18, CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 ADVANCE INFORMATION 144-Mbit QDR -II SRAM 2-Word Burst Architecture Features Configurations • Separate independent read and write data ports ❐ Supports concurrent transactions ■ 333 MHz clock for high bandwidth


    Original     		PDF CY7C1610KV18, CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 144-Mbit CY7C1610KV18 CY7C1625KV18 CY7C1612KV18 CY7C1614KV18 CY7C1612KV18-300BZXI CY7C1614KV18-250BZXC CY7C1612KV18

    CY7C1614KV18

    Abstract: CY7C1612KV18-300BZXI
    Text: CY7C1610KV18, CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 144-Mbit QDR II SRAM 2-Word Burst Architecture 144-Mbit QDR ® II SRAM 2-Word Burst Architecture Features Configuration Separate independent read and write data ports ❐ Supports concurrent transactions


    Original     		PDF 144-Mbit CY7C1610KV18, CY7C1625KV18 CY7C1612KV18, CY7C1614KV18 CY7C1610KV18 CY7C1625KV18 CY7C1612KV18 CY7C1614KV18 CY7C1612KV18-300BZXI

    Untitled

    Abstract: No abstract text available
    Text: CY7C1611KV18, CY7C1626KV18 CY7C1613KV18, CY7C1615KV18 144-Mbit QDR II SRAM 4-Word Burst Architecture 144-Mbit QDR ® II SRAM 4-Word Burst Architecture Features Configuration Separate independent read and write data ports ❐ Supports concurrent transactions


    Original     		PDF 144-Mbit CY7C1611KV18, CY7C1626KV18 CY7C1613KV18, CY7C1615KV18 CY7C1611KV18 CY7C1626KV18 CY7C1613KV18

    7cl6

    Abstract: D-2501 CY7C161A CY7C162 CY7C162A
    Text: CYPRESS SEMICONDUCTOR 4bE » B SSfl'lbfe.S □ QQbMSb b q c y p CY7C161A CY7C162A • - j/ "— = 16,384 x 4 Static RAV RAM Separate I/O SEMICONDUCTOR Features • Automatic power-down when dese­ lected • Transparent write 7C161A • CMOS for optimum speed/power


    OCR Scan     		PDF CY7C161A CY7C162A 7C161A) CY7C162 au62A-35DMB CY7C162Aâ 35KMB CY7C162A-35LMB CY7C162A-45DMB 7cl6 D-2501 CY7C162A

    Untitled

    Abstract: No abstract text available
    Text: CY7C161 CY7C162 16Kx 4 Static RAM with Separate I/O Features into the memory location specified on the address pins Ao through A13 . Reading the device is accomplished by tak­ ing the chip enables (CEi, CE2) LOW while write enable (WE) remains HIGH. Under these conditions the contents of the


    OCR Scan     		PDF CY7C161 CY7C162 15-ns 7C161) CY7C162arehigh-performance

    ID14771

    Abstract: C1626 A10C A12C CY7C161 CY7C162 V21 PACKAGE DIAGRAM
    Text: CY7C161 CY7C162 16K x 4 Static RAM with Separate I/O CYPRESS Features • High speed — 15-ns • Transparent write 7C161 • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 220 mW • TTL compatible inputs and outputs


    OCR Scan     		PDF CY7C161 CY7C162 15-ns 7C161) 300-Mil) CY7C161â 28-Lead CY7C162-12PC ID14771 C1626 A10C A12C V21 PACKAGE DIAGRAM

    Untitled

    Abstract: No abstract text available
    Text: CY7C161A CY7C162A CYPRESS SEMICONDUCTOR Features • Automatic power-down when dese­ lected • T ransparent write 7C161A • CMOS for optim um speed/power • High speed - 15 ns t* • Low active power - 550 mW • Low standby power - 220 mW • TTL-compatible inputs and outputs


    OCR Scan     		PDF CY7C161A CY7C162A 7C161A) 7C162A chiY7C161A

    Untitled

    Abstract: No abstract text available
    Text: CY7C161A CY7C162A CYPRESS SEMICONDUCTOR Features Functional Description • High speed The CY7C161A and CY7C162A are highperformance CMOS static RAMs orga­ nizes as 16,384 by 4 bits with separate I/O. Easy memory expansion is provided by ac­ tive LOW chip enables C E i, CE2 and


    OCR Scan     		PDF CY7C161A CY7C162A 7C162A CY7C162A

    CY7C161

    Abstract: CY7C162 CY7C162-25VC
    Text: CY7C161 CY7C162 16K x 4 Static RAM with Separate I/O CYPRESS Features • High speed — 15-ns • Transparent write 7C161 • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 220 mW • TTL compatible inputs and outputs


    OCR Scan     		PDF CY7C161 CY7C162 15-ns 7C161) CY7C162 CY7C162-12PC 28-Lead 300-Mil) CY7C162- CY7C162-25VC

    Untitled

    Abstract: No abstract text available
    Text: CY7C161 CY7C162 CYPRESS SEMICONDUCTOR F e a tu re s • A u tom atic pow er-dow n w hen d eselected • T ran sparen t w rite 7C 161 • C M O S for op tim u m sp eed /p ow er • H igh speed • Low active pow er • Low stan d b y power • TT L c o m p a tib le in p u ts and ou tp u ts


    OCR Scan     		PDF CY7C161 CY7C162 62-20L 2-25V 2-35V

    Untitled

    Abstract: No abstract text available
    Text: CY7C161A CY7C162A CYPRESS SEMICONDUCTOR 16K x 4 Static RAM Separate I/O Features Functional Description • High speed The C Y 7C161A and C Y 7C162A are highperform ance C M O S static R A M s orga­ nizes as 16,384 by 4 bits w ith sep a ra te I/O . Easy m em ory expansion is provided by ac­


    OCR Scan     		PDF CY7C161A CY7C162A 7C161A 7C162A

    Untitled

    Abstract: No abstract text available
    Text: CY7C161 CY7C162 CYPRESS SEMICONDUCTOR Features Functional Description • High speed — 15-ns T he CY7C161 an d CY 7C162 are high-per­ form ance C M O S static R A M s organized as 16,384 by 4 bits w ith sep a ra te I/O . Easy m em ory expansion is provided by active


    OCR Scan     		PDF CY7C161 CY7C162 15-ns CY7C161 7C162 28-Lead 300-M 28-Lead 7C162â

    Untitled

    Abstract: No abstract text available
    Text: CY7C161 CY7C162 CYPRESS Features • High speed — 15-ns • Transparent write 7C16I • CMOS for optimum speed/power • Low active power — 633 mW • Low standby power — 220 mW • TTL compatible inputs and outputs • Automatic power-down when deselected


    OCR Scan     		PDF 15-ns CY7C161 CY7C162 --15PC --15V --20V --25P --35P --35V