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74AUP2G80GT Price and Stock

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Nexperia 74AUP2G80GT,115 IC FF D-TYPE DUAL 1BIT 8XSON
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
DigiKey	74AUP2G80GT,115	Digi-Reel	5,000		1	1 $0.67 10 $0.477 100 $0.3738 1000 $0.31995 10000 $0.3065	Buy Now
	74AUP2G80GT,115	Reel	5,000		5,000	1 - 10 - 100 - 1000 - 10000 $0.29172	Buy Now
	74AUP2G80GT,115	Cut Tape	5,000		1	1 $0.67 10 $0.477 100 $0.3738 1000 $0.31995 10000 $0.3065	Buy Now
Avnet Americas	74AUP2G80GT,115	Reel		6 Weeks	5,000	1 - 10 - 100 - 1000 - 10000 $0.2714	Buy Now
Mouser Electronics	74AUP2G80GT,115		3,023			1 $0.67 10 $0.428 100 $0.348 1000 $0.32 10000 $0.275	Buy Now
Rochester Electronics	74AUP2G80GT,115		104,600		1	1 $0.2671 10 $0.2671 100 $0.2511 1000 $0.227 10000 $0.227	Buy Now
TTI	74AUP2G80GT,115	Reel			5,000	1 - 10 - 100 - 1000 - 10000 $0.272	Buy Now

Avnet Asia	74AUP2G80GT,115			6 Weeks	5,000	1 - 10 - 100 - 1000 - 10000 $0.27182	Buy Now
Avnet Silica	74AUP2G80GT,115			8 Weeks	5,000	1 - 10 - 100 - 1000 - 10000 -	Buy Now
EBV Elektronik	74AUP2G80GT,115			8 Weeks	5,000	1 - 10 - 100 - 1000 - 10000 -	Buy Now
NXP Semiconductors 74AUP2G80GT,115 74AUP2G80GT - D Flip-Flop, AUP/ULP/V Series, 2-Func, Positive Edge Triggered, 1-Bit, Inverted Output, CMOS, PDSO8
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Rochester Electronics	74AUP2G80GT,115		124,298		1	1 $0.2671 10 $0.2671 100 $0.2511 1000 $0.227 10000 $0.227	Buy Now
Nexperia 74AUP2G80GT D FLIP-FLOP; Temperature Grade: AUTOMOTIVE; Terminal Form: NO LEAD; No. of Terminals: 8; Package Code: VSON; Package Shape: RECTANGULAR;
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	74AUP2G80GT		87			1 - 10 - 100 - 1000 - 10000 -	Get Quote

74AUP2G80GT Datasheets (5)

Part	ECAD Model	Manufacturer	Description	Curated	Datasheet Type	PDF
74AUP2G80GT		NXP Semiconductors	Low-power dual D-type flip-flop; positive-edge trigger		Original	PDF
74AUP2G80GT		NXP Semiconductors	74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8, FF/Latch		Original	PDF
74AUP2G80GT		Philips Semiconductors	Low-power dual D-type flip-flop, positive-edge trigger		Original	PDF
74AUP2G80GT,115		NXP Semiconductors	Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7"		Original	PDF
74AUP2G80GT,115		NXP Semiconductors	74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-833-1, SON-8, FF/Latch		Original	PDF

74AUP2G80GT Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 8 — 21 January 2013 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80	PDF
Dual D-type flip-flop positive-edge trigger Abstract: No abstract text available Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 03 — 28 March 2008 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80 Dual D-type flip-flop positive-edge trigger	PDF
74AUP2G80 Abstract: 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78 Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 04 — 2 June 2008 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 6 — 7 December 2011 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80	PDF
74AUP2G80 Abstract: 74AUP2G80DC 74AUP2G80GT JESD78 Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 5 — 5 October 2010 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GT JESD78	PDF
Untitled Abstract: No abstract text available Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80	PDF
VSSOP8 Abstract: XSON8 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187 Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.	Original	74AUP2G80 74AUP2G80 VSSOP8 XSON8 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187	PDF
74AUP2G80DC Abstract: SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80 Text: SLG74LB2G80 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is	Original	SLG74LB2G80 LB2G80 000-0074LB2G80-11 74AUP2G80DC SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80	PDF
74AUP2G80 Abstract: 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187 Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 02 — 1 August 2007 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock	Original	74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187	PDF