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    74AUP2G80GT Search Results

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    74AUP2G80GT Price and Stock

    Nexperia 74AUP2G80GT,115

    IC FF D-TYPE DUAL 1BIT 8XSON
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    DigiKey 74AUP2G80GT,115 Digi-Reel 5,000 1
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    74AUP2G80GT,115 Cut Tape 5,000 1
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    74AUP2G80GT,115 Reel 5,000 5,000
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    Avnet Americas 74AUP2G80GT,115 Reel 5,000
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    Mouser Electronics 74AUP2G80GT,115 3,067
    • 1 $0.77
    • 10 $0.467
    • 100 $0.369
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    Rochester Electronics 74AUP2G80GT,115 104,600 1
    • 1 $0.2804
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    • 100 $0.2636
    • 1000 $0.2383
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    TTI 74AUP2G80GT,115 Reel 5,000
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    Avnet Asia 74AUP2G80GT,115 6 Weeks 5,000
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    Avnet Silica 74AUP2G80GT,115 8 Weeks 5,000
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    EBV Elektronik 74AUP2G80GT,115 8 Weeks 5,000
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    NXP Semiconductors 74AUP2G80GT,115

    Flip-Flop Dual D-Type Positive-Edge Trigger 0.8V to 3.6V 8-Pin XSON - Tape and Reel (Alt: 74AUP2G80GT,115)
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Avnet Americas 74AUP2G80GT,115 Reel 4 Weeks 1,301
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    Rochester Electronics 74AUP2G80GT,115 79,798 1
    • 1 $0.2804
    • 10 $0.2804
    • 100 $0.2636
    • 1000 $0.2383
    • 10000 $0.2383
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    74AUP2G80GT Datasheets (5)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    74AUP2G80GT NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80GT NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT833-1, SON-8, FF/Latch Original PDF
    74AUP2G80GT Philips Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G80GT,115 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT833-1 (XSON8U); Container: Reel Pack, SMD, 7" Original PDF
    74AUP2G80GT,115 NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 1 X 1.95 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-833-1, SON-8, FF/Latch Original PDF

    74AUP2G80GT Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 8 — 21 January 2013 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80

    Dual D-type flip-flop positive-edge trigger

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 03 — 28 March 2008 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80 Dual D-type flip-flop positive-edge trigger

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 04 — 2 June 2008 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 6 — 7 December 2011 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GT JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 5 — 5 October 2010 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GT JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80

    VSSOP8

    Abstract: XSON8 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original
    PDF 74AUP2G80 74AUP2G80 VSSOP8 XSON8 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187

    74AUP2G80DC

    Abstract: SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80
    Text: SLG74LB2G80 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is


    Original
    PDF SLG74LB2G80 LB2G80 000-0074LB2G80-11 74AUP2G80DC SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 02 — 1 August 2007 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original
    PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187