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    74AUP2G80 Search Results

    74AUP2G80 Result Highlights (4)

    Part ECAD Model Manufacturer Description Download Buy
    SN74AUP2G80YFPR Texas Instruments Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-DSBGA -40 to 85 Visit Texas Instruments Buy
    SN74AUP2G80RSER Texas Instruments Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-UQFN -40 to 85 Visit Texas Instruments Buy
    SN74AUP2G80DCUR Texas Instruments Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-VSSOP -40 to 85 Visit Texas Instruments Buy
    SN74AUP2G80DQER Texas Instruments Low-Power Dual Positive-Edge-Triggered D-Type Flip-Flop 8-X2SON -40 to 85 Visit Texas Instruments Buy
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    74AUP2G80 Price and Stock

    Rochester Electronics LLC 74AUP2G80GD,125

    IC FF D-TYPE DUAL 1BIT 8XSON
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74AUP2G80GD,125 Bulk 176,611 2,049
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    Rochester Electronics LLC 74AUP2G80GT,115

    NOW NEXPERIA 74AUP2G80GT - D FLI
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    DigiKey 74AUP2G80GT,115 Bulk 124,298 1,080
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    Rochester Electronics LLC SN74AUP2G80RSER

    IC FF D-TYPE DUAL 1BIT 8UQFN
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    DigiKey SN74AUP2G80RSER Bulk 108,202 845
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    Rochester Electronics LLC 74AUP2G80GS,115

    IC FF D-TYPE DUAL 1BIT 8XSON
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74AUP2G80GS,115 Bulk 89,900 1,362
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    Rochester Electronics LLC 74AUP2G80GN,115

    IC FF D-TYPE DUAL 1BIT 8XSON
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74AUP2G80GN,115 Bulk 30,000 1,738
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    Find more 74AUP2G80 price and stock on Findchips.com

    74AUP2G80 Datasheets (29)

    Part ECAD Model Manufacturer Description Curated Type PDF
    74AUP2G80 Philips Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G80DC NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80DC NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8, FF/Latch Original PDF
    74AUP2G80DC Philips Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G80DC,125 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT765-1 (VSSOP8); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G80DC,125 NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 2.30 MM, PLASTIC, MO-187, SOT-765-1, VSSOP-8, FF/Latch Original PDF
    74AUP2G80DC125 NXP Semiconductors IC FF D-TYPE DUAL 1BIT 8VSSOP Original PDF
    74AUP2G80DC/S400,1 NXP Semiconductors 74AUP2G80DC/S400 - Low-power dual D-type flip-flop; positive-edge trigger, SOT765-1 Package, Standard Marking, Reel Pack, Reverse Original PDF
    74AUP2G80DC/S400125 NXP Semiconductors IC FF D-TYPE DUAL 1BIT 8VSSOP Original PDF
    74AUP2G80GD NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80GD NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8, 3 X 2 MM, 0.50 MM HEIGHT, PLASTIC, SOT996-2, SON-8, FF/Latch Original PDF
    74AUP2G80GD,125 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G80GD,125 NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8, 3 X 2 MM, 0.50 MM HEIGHT, PLASTIC, SOT-996-2, XSON-8, FF/Latch Original PDF
    74AUP2G80GF NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80GF,115 NXP Semiconductors 74AUP2G80GF - Low-power dual D-type flip-flop; positive-edge trigger, SOT1089 Package, Standard Marking, Reel Pack, SMD, 7" Original PDF
    74AUP2G80GM NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger Original PDF
    74AUP2G80GM NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-255, SOT902-2, QFN-8, FF/Latch Original PDF
    74AUP2G80GM Philips Semiconductors Low-power dual D-type flip-flop, positive-edge trigger Original PDF
    74AUP2G80GM,125 NXP Semiconductors Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse Original PDF
    74AUP2G80GM,125 NXP Semiconductors 74AUP2G80 - IC AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PQCC8, 1.60 X 1.60 MM, 0.50 MM HEIGHT, PLASTIC, MO-255, SOT-902-1, XQFN-8, FF/Latch Original PDF

    74AUP2G80 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 8 — 21 January 2013 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    Dual D-type flip-flop positive-edge trigger

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 03 — 28 March 2008 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 Dual D-type flip-flop positive-edge trigger

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 04 — 2 June 2008 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GD 74AUP2G80GT JESD22-A114E JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 6 — 7 December 2011 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GT JESD78
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 5 — 5 October 2010 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GT JESD78

    Untitled

    Abstract: No abstract text available
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 7 — 14 June 2012 Product data sheet 1. General description The 74AUP2G80 provides the dual positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80

    VSSOP8

    Abstract: XSON8 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 01 — 25 August 2006 Product data sheet 1. General description The 74AUP2G80 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.


    Original     		PDF 74AUP2G80 74AUP2G80 VSSOP8 XSON8 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT MO-187

    74AUP2G80

    Abstract: 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187
    Text: 74AUP2G80 Low-power dual D-type flip-flop; positive-edge trigger Rev. 02 — 1 August 2007 Product data sheet 1. General description The 74AUP2G80 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock


    Original     		PDF 74AUP2G80 74AUP2G80 74AUP2G80DC 74AUP2G80GM 74AUP2G80GT JESD22-A114E MO-187

    hef4051

    Abstract: 74AUP2G34 74LVT1403 74ABT543A 74LV74 74AVCH1T45 74HC590 CBTD3306 NCX2200 74HC40103
    Text: ロジック IC データスイッチ/アナログスイッチ コンパレータ レベルシフタ 汎用ロジック Index 2 ●● P3 NXP ロジック ●● P4 低抵抗アナログスイッチ/データスイッチ ●● P7 コンパレータ ●●


    Original     		PDF

    74AUP2G80DC

    Abstract: SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80
    Text: SLG74LB2G80 GreenLIBTM DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP General Description Features The GreenLIB provides a low-power, low-voltage dual • Pb-Free / RoHS Compliant positive-edge-triggered D-type flip-flop. When data at the • Halogen-Free data D input meets the setup time requirement, the data is


    Original     		PDF SLG74LB2G80 LB2G80 000-0074LB2G80-11 74AUP2G80DC SN74AUC2G80DCTR 74AUP2G80 74AUP2G80GM 74AUP2G80GT SN74AUC2G80

    74LVC1G18

    Abstract: 5pin L6 inverter cross reference guide 74LVC1G19 SN74AUP1T08 SN74AUP1T02 TC7WZU04 LVC2T45 TC7SZ044 0.3mm pitch csp package
    Text: Little Logic Guide Gate Functions Signal-Switch Functions Configurable Functions Translation Functions > Availability > Quality > Service > Support > Pricing www.ti.com/littlelogic 2011 Little Logic Guide ➔ Table of Contents Overview 3 Little Logic Products by Performance


    Original     		PDF

    NXP 74LVC1G

    Abstract: SN74LVC2G TC7SZU04 "cross-reference" 74AHC1G14 SOT-23 SCYT129E SN74AUP AUP1G00 74AUP3G17 TC7SG125 nxp Cross-reference
    Text: Little Logic Guide Gates Configurables Signal Switches Translators www.ti.com/littlelogic 2012 Little Logic Guide ➔ Table of Contents Overview 3 Little Logic Products by Performance 4 Logic Migration to 1.8-V Future . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4


    Original     		PDF