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    160AT Search Results

    160AT Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    2SK160A-T1B-A Renesas Electronics Corporation Junction Field Effect Tansistors, MM, /Embossed Tape Visit Renesas Electronics Corporation
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    160AT Price and Stock

    Central Semiconductor Corp 1SMC160A-TR13

    TVS DIODE 160VWM 259VC SMC
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    DigiKey 1SMC160A-TR13 Cut Tape 5,740 1
    • 1 $1.25
    • 10 $0.788
    • 100 $1.25
    • 1000 $0.36705
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    1SMC160A-TR13 Digi-Reel 5,740 1
    • 1 $1.25
    • 10 $0.788
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    • 1000 $0.36705
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    Microchip Technology Inc 25AA160AT-I-MS

    IC EEPROM 16KBIT SPI 10MHZ 8MSOP
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    DigiKey 25AA160AT-I-MS Cut Tape 5,522 1
    • 1 $0.8
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    25AA160AT-I-MS Digi-Reel 5,522 1
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    25AA160AT-I-MS Reel 5,000 2,500
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    • 10000 $0.71
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    YAGEO Corporation SMAJ160A-TR7

    SMAJ DO214AC, UNIDIRECTIONAL 160
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    DigiKey SMAJ160A-TR7 Cut Tape 3,700 1
    • 1 $0.37
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    SMAJ160A-TR7 Digi-Reel 3,700 1
    • 1 $0.37
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    SMAJ160A-TR7 Reel 3,000 1,000
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    Microchip Technology Inc 25LC160AT-I-SN

    IC EEPROM 16KBIT SPI 10MHZ 8SOIC
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    DigiKey 25LC160AT-I-SN Reel 3,300 3,300
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    Central Semiconductor Corp 1.5SMC160A-TR13-PBFREE

    TVS DIODE 136VWM 219VC SMC
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    DigiKey 1.5SMC160A-TR13-PBFREE Digi-Reel 3,000 1
    • 1 $1.11
    • 10 $0.693
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    • 1000 $0.31856
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    1.5SMC160A-TR13-PBFREE Cut Tape 3,000 1
    • 1 $1.11
    • 10 $0.693
    • 100 $1.11
    • 1000 $0.31856
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    1.5SMC160A-TR13-PBFREE Reel 3,000 3,000
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    160AT Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    PC100-322-620

    Abstract: PC-100-322-620 PC133-333-520 PC100-222-620 P-TSOPII-54 39S256400AT-8A SMD MARKING CODE t15
    Text: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM Preliminary Datasheet • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125


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    39S256400/800/160AT 256-MBit SPT03933 PC100-322-620 PC-100-322-620 PC133-333-520 PC100-222-620 P-TSOPII-54 39S256400AT-8A SMD MARKING CODE t15 PDF

    TSOP66

    Abstract: HYB25D512400
    Text: HYB25D512400/800/160AT L 512-MBit Double Data Rata SDRAM Preliminary Datasheet 2002-03-17 Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers


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    HYB25D512400/800/160AT 512-MBit DDR200 DDR266A DDR333 DDR333, TSOP66 HYB25D512400 PDF

    T10-T12

    Abstract: T11-T12 SPT03927
    Text: HYB 39S64400/800/160AT L 64 MBit Synchronous DRAM Timing Diagrams 1 Bank Activate Command Cycle 2 Burst Read Operation 3 Read Interrupted by a Read 4 4.1 4.2 4.3 Read to Write Interval Read to Write Interval Minimum Read to Write Interval Non-Minimum Read to Write Interval


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    39S64400/800/160AT SPT03933 T10-T12 T11-T12 SPT03927 PDF

    TSOP66

    Abstract: HYB25D512400AT DDR200 DDR266A DDR333
    Text: HYB25D512400/800/160AT L 512-MBit Double Data Rata SDRAM Preliminary Datasheet 2002-03-17 Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers


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    HYB25D512400/800/160AT 512-MBit DDR200 DDR266A DDR333 TSOP66 HYB25D512400AT DDR200 DDR266A DDR333 PDF

    P-TSOPII-54

    Abstract: PC133 registered reference design
    Text: HYB39S512400/800/160AT L 512MBit Synchronous DRAM 512 MBit Synchronous DRAM Preliminary Datasheet April ’01 • High Performance: -6 -7 -7.5 -8 Units fCK 166 143 133 125 MHz tCK3 6 7 7.5 8 ns tAC3 5 5.4 5.4 6 ns tCK2 7.5 7.5 10 10 ns tAC2 5.4 5.4 6 6 ns


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    HYB39S512400/800/160AT 512MBit P-TSOPII-54 400mil PC166 PC133 PC133 registered reference design PDF

    P-TSOPII-54

    Abstract: 39s64160at-8
    Text: HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns tCK2 10 12 15 ns tAC2 6 7 8 ns • Fully Synchronous to Positive Clock Edge • 0 to 70 °C operating temperature


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    HYB39S64400/800/160AT 64MBit P-TSOPII-54 400mil PC100 39s64160at-8 PDF

    PC100-222-620

    Abstract: PC133-333-520 P-TSOPII-54 pc100-322-620 SMD MARKING CODE M3
    Text: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125 100 MHz tCK3 7.5 8 8


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    39S256400/800/160AT 256-MBit SPT03933 PC100-222-620 PC133-333-520 P-TSOPII-54 pc100-322-620 SMD MARKING CODE M3 PDF

    HYB25D512800AT

    Abstract: TSOP-66
    Text: HYB25D512400/800/160AT L 512-MBit Double Data Rata SDRAM Preliminary Datasheet V0.91, 2002-11-14 Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers


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    HYB25D512400/800/160AT 512-MBit DDR200 DDR266A DDR333 HYB25D512800AT TSOP-66 PDF

    Untitled

    Abstract: No abstract text available
    Text: HYB25D128400/800/160AT L 128-Mbit Double Data Rate SDRAM Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers per clock cycle


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    HYB25D128400/800/160AT 128-Mbit DDR200 DDR266A DDR333 PDF

    Untitled

    Abstract: No abstract text available
    Text: HYB 39S256400/800/160AT 256-MBit Synchronous DRAM 256-MBit Synchronous DRAM Preliminary Information • Multiple Burst Read with Single Write Operation • High Performance: • Automatic and Controlled Precharge Command -7.5 -8 -8A -8B Units fCK 133 125 125


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    39S256400/800/160AT 256-MBit P-TSOPII-54 400mil PC133 PC100 SPT03933 PDF

    Untitled

    Abstract: No abstract text available
    Text: HYB25D128400/800/160AT L 128-Mbit Double Data Rate SDRAM Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers per clock cycle


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    HYB25D128400/800/160AT 128-Mbit DDR200 DDR266A DDR333 PDF

    TSOP66

    Abstract: No abstract text available
    Text: HYB25D512400/800/160AT L /AC(L) 512-MBit Double Data Rata SDRAM Preliminary Version 12/01 Features CAS Latency and Frequency CAS Latency 2 2.5 Maximum Operating Frequency (MHz) DDR200 DDR266A DDR333 -8 -7 -6 100 133 133 125 143 166 • Double data rate architecture: two data transfers


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    HYB25D512400/800/160AT 512-MBit DDR200 DDR266A DDR333 TSOP66 PDF

    39S16800AT-8

    Abstract: smd marking m11 Q67100-Q1323 Q67100-Q1333 Q67100-Q1335 39S16800T 39S16800AT-10 smd marking code M11 smd code m6
    Text: 16 MBit Synchronous DRAM second generation HYB 39S16400/800/160AT-8/-10 Advanced Information • High Performance: CAS latency = 3 • Multiple Burst Read with Single Write Operation -8 -10 Units fCK 125 100 MHz • Automatic and Controlled Precharge Command


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    39S16400/800/160AT-8/-10 cycles/64 P-TSOPII-50 GPX05956 39S16800AT-8 smd marking m11 Q67100-Q1323 Q67100-Q1333 Q67100-Q1335 39S16800T 39S16800AT-10 smd marking code M11 smd code m6 PDF

    39S256160T

    Abstract: PC100-322-620 smd CAY PC100-322 P-TSOPII-54
    Text: HYB39S256400/800/160T 256MBit Synchronous DRAM 256 MBit Synchronous DRAM Preliminary Information • High Performance: -8 -8A -8B Units fCK 125 125 100 MHz tCK3 8 8 10 ns tAC3 6 6 6 ns tCK2 10 12 15 ns tAC2 6 6 7 ns • Fully Synchronous to Positive Clock Edge


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    HYB39S256400/800/160T 256MBit P-TSOPII-54 400mil PC100 3-2T10 HYB39S256400/800/160AT 39S256160T PC100-322-620 smd CAY PC100-322 PDF

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: Multiple Burst Operation -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns Automatic Command and Read with Single Write Controlled


    OCR Scan
    HYB39S64400/800/160AT 64MBit PDF

    BA0A11

    Abstract: No abstract text available
    Text: SIEMENS HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: Multiple Burst Operation -8 -10 Units fCKmax. 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns tCK2 10 15 ns tAC2 6 8 ns Automatic Command and Read with Single Write


    OCR Scan
    HYB39S64400/800/160AT 64MBit P-TSOPII-54 400mil HYB39S 64400/800/160AT BA0A11 PDF

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS HYB39S64400/800/160AT L 64MBit Synchronous DRAM 64 MBit Synchronous DRAM • High Performance: Multiple Burst Operation -8 -8B -10 Units fCKmax. 125 100 100 MHz tCK3 8 10 10 ns tAC3 6 6 7 ns tCK2 10 12 15 ns tAC2 6 7 8 ns Automatic Command and Read


    OCR Scan
    HYB39S64400/800/160AT 64MBit PDF

    Untitled

    Abstract: No abstract text available
    Text: SIEM ENS 16 MBit Synchronous DRAM second generation HYB 39S16400/800/160AT-8/-10 Advanced Information • High Performance: CAS latency = 3 Multiple Burst Read with Single Write Operation -8 -10 Units 125 100 MHz Automatic and Controlled Precharge Command


    OCR Scan
    39S16400/800/160AT-8/-10 cycles/64 PDF

    39S16800AT-8

    Abstract: 39S16800AT-10
    Text: SIEMENS 16 MBit Synchronous DRAM second generation HYB 39S16400/800/160AT-8/-10 Advanced Information High Performance: -8 -10 Units /CK 125 100 MHz Automatic and Controlled Precharge Command CO Multiple Burst Read with Single Write Operation o • 8 10 ns


    OCR Scan
    39S16400/800/160AT-8/-10 cycles/64 P-TSOPII-44-1 P-TSOPII-50-1 39S16400/800/160AT-8/-10 GPX05956 39S16800AT-8 39S16800AT-10 PDF

    Untitled

    Abstract: No abstract text available
    Text: 4M x 16-Bit Dynamic RAM 8k, 4k & 2k Refresh HYB 160AT(L) -40/-50/-60 HYB 160AT(L) -40/-50/-60 HYB 160AT(L) -40/-50/-60 Advanced Information • 4 194 304 words by 16-bit organization • 0 to 70 °C operating temperature • Fast Page Mode operation


    OCR Scan
    16-Bit 3164160AT 3165160AT 3166160AT HYB3166160AT HYB3165160AT HYB3164160AT HYB3164 160AT PDF

    39S256160T

    Abstract: PC100-333-620 IT191 s4 marking code siemens SMD MARKING CODE A12 smd marking KH P-TSOPII-54
    Text: H Y B 39S 25 640 0/8 00/1 60 T 256M B it S ynch ro n o u s DRAM S IE M E N S 2 5 6 M B it S y n c h ro n o u s D R A M P re lim in a ry In fo rm a tio n • High Perform ance: Multiple Burst Operation -8 -8B -10 Units fC K 125 100 100 M Hz tC K 3 8 10 10 ns


    OCR Scan
    HYB39S256400/800/160T 256MBit HYB39S256400/800/160AT 39S256160T PC100-333-620 IT191 s4 marking code siemens SMD MARKING CODE A12 smd marking KH P-TSOPII-54 PDF

    101ZZ

    Abstract: m1s23 PDCR 900 TLCS-900 TMP94C241C TMP94C241CF M2S22 PDCR 940 MNS20 B5WR
    Text: TOSHIBA TMP94C241C CMOS 32-bit Microcontroller TMP94C241CF 1. O u t lin e an d Device Characteristics TMP94C241C is high-speed advanced 32-bit micro-controller developed for controlling equipment which processes mass data. TMP94C241C is a micro-controller which has a high-performance CPU 900/H2 CPU and various


    OCR Scan
    TMP94C241C 32-bit TMP94C241CF TMP94C241C 900/H2 160-pin 101ZZ m1s23 PDCR 900 TLCS-900 TMP94C241CF M2S22 PDCR 940 MNS20 B5WR PDF

    Untitled

    Abstract: No abstract text available
    Text: # H YB39S256400/800/160T 256MBit Synchronous DRAM In fin eon 256 MBit Synchronous DRAM Preliminary Information • High Performance: Multiple Burst Operation -8 -8A -8B Units fC K 125 125 100 M Hz tC K 3 8 8 10 ns tA C 3 6 6 6 ns tC K 2 10 12 15 ns tA C 2


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    YB39S256400/800/160T 256MBit PDF

    Untitled

    Abstract: No abstract text available
    Text: SIEMENS 256 MBit Synchronous DRAM HYB 39S256400/800/160T Preliminary Information • High Performance: Multiple Burst Read with Single W rite Operation -8 -8B -10 Units 125 100 100 MHz fCK3 8 10 10 ns Data M ask for Read/W rite control fAC3 6 6 7 ns Data M ask for byte control


    OCR Scan
    39S256400/800/160T 0235b05 39S256400/80Q/160AT A53SbDS D1113G0 PDF