Untitled
Abstract: No abstract text available
Text: TSOPII54-P-400-0.80-K Unit in millimeters typ., unless otherwise specified. Semiconductor Please consult OKI for soldering, assembly and storage recommendations. Specification are subject to change without notice. The drawings do not substitute or replace a product’s datasheet or the Package Information Databook.
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TSOPII54-P-400-0
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16Mx8
Abstract: pc133 SDRAM DIMM W9D332647LA-333 079R 32X64 32X64 144 pin
Text: REVISIONS DATE REV I. DESCRIPTION: DESCRIPTION ZONE 6/29/01 LUISA T Ÿ W9D332647LA-333 is a 32Mx64 industry standard 168-pin PC-133 SDRAM DIMM Ÿ Manufactured with 16 16Mx8 400-mil TSOPII-54 PC-133 Synchronous DRAM devices of 12-row, 10-column, 4-bank addressing.
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W9D332647LA-333
32Mx64
168-pin
PC-133
16Mx8
400-mil
TSOPII-54
12-row,
10-column,
pc133 SDRAM DIMM
079R
32X64
32X64 144 pin
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222k
Abstract: 079R PC-100 PC100-222 KO9018
Text: REVISION DATE REV DESCRPTION ZONE APPVD 6/26/01 III. TIMING I. DESCRIPTION: Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ W9Q316727KD-222K is a 16Mx72 industry standard 168-pin PC100-222 SDRAM ECC DIMM Manufactured with 18 NEC ELPIDA 8Mx8 400-mil TSOPII-54 100 MHz Synchronous DRAM devices of 12-row, 9-column, 4 -bank addresing.
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W9Q316727KD-222K
16Mx72
168-pin
PC100-222
400-mil
TSOPII-54
12-row,
8Mx72.
W9Q316727KD-222K
D9Q316727KD-222K
222k
079R
PC-100
PC100-222
KO9018
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Untitled
Abstract: No abstract text available
Text: Pr E2G1050-17-X1 el im y 4-Bank ¥ 4,194,304-Word ¥ 4-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62400/H is a 4-bank ¥ 4,194,304-word ¥ 4-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
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E2G1050-17-X1
304-Word
MD56V62400/H
cycles/64
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Untitled
Abstract: No abstract text available
Text: TVP5160EVM User’s Guide SLEU063 – March 2005 TVP5160EVM User’s Guide Digital Video Department 1 2 3 4 5 6 7 8 9 10 Contents Functional
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TVP5160EVM
SLEU063
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active suspension
Abstract: MD56V62800A
Text: Pr E2G1054-18-62 el im y 4-Bank ¥ 2,097,152-Word ¥ 8-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62800A is a 4-bank ¥ 2,097,152-word ¥ 8-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs and
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E2G1054-18-62
152-Word
MD56V62800A
cycles/64
active suspension
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MD56V62160
Abstract: No abstract text available
Text: Pr E2G1052-17-X1 el im y 4-Bank ¥ 1,048,576-Word ¥ 16-Bit SYNCHRONOUS DYNAMIC RAM DESCRIPTION The MD56V62160/H is a 4-bank ¥ 1,048,576-word ¥ 16-bit synchronous dynamic RAM, fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs
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E2G1052-17-X1
576-Word
16-Bit
MD56V62160/H
cycles/64
MD56V62160
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TC59SM816
Abstract: No abstract text available
Text: TC59SM816/08/04BFT/BFTL-70,-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM 8,388,608-WORDS × 4 BANKS × 8-BITS SYNCHRONOUS DYNAMIC RAM 16,777,216-WORDS × 4 BANKS × 4-BITS SYNCHRONOUS DYNAMIC RAM
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TC59SM816/08/04BFT/BFTL-70
304-WORDS
16-BITS
608-WORDS
216-WORDS
TC59SM816BFT/BFTL
TC59SM808BFT/BFTL
TC59SM804BFT/BFTL
TC59SM816
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133M
Abstract: TC59SM816 TC59SM816CFTI-75
Text: TC59SM816CFTI-75,-80 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDS x 4 BANKS × 16-BITS SYNCHRONOUS DYNAMIC RAM DESCRIPTION TC59SM816CFTI is a CMOS synchronous dynamic random access memory organized as 4,194,304-words × 4
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TC59SM816CFTI-75
304-WORDS
16-BITS
TC59SM816CFTI
133M
TC59SM816
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MD56V62400
Abstract: MD56V62400H TSOPII54
Text: お客様各位 資料中の「沖電気」「ＯＫＩ」等名称の OKI セミコンダクタ株式会社への変更について 2008 年 10 月 1 日を以って沖電気工業株式会社の半導体事業は OKI セミコン ダクタ株式会社に承継されました。 従いまして、本資料中には「沖電気工業株
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J2G1050-17-X1
MD56V62400/H
MD56V62400/H
304-Word
MD56V62400/HCMOS4
09664ms
Latency23
54400milTSOP
TSOPII54-P-400-0
80-KMD56V62400/H-xxTA
MD56V62400
MD56V62400H
TSOPII54
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Untitled
Abstract: No abstract text available
Text: V437432E24VD 3.3 VOLT 32M x 72 HIGH PERFORMANCE REGISTERED SDRAM ECC MODULE Features Description • 168 Pin Registered ECC 33,554,432 x 72 bit Oganization SDRAM Modules ■ Utilizes High Performance 32M x 8 SDRAM in TSOPII-54 Packages ■ Fully PC Board Layout Compatible to INTEL’S
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V437432E24VD
TSOPII-54
-75PC,
-10PC,
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P-TSOPII-54
Abstract: caz smd PC133 registered reference design
Text: HYB 39S64400/800/160ET L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM Preliminary Datasheet • Automatic and Controlled Precharge Command • High Performance: -7 -7.5 -8 Units fCKMAX 143 133 125 MHz tCK3 7 7.5 8 ns tAC3 5.4 5.4 6 ns tCK2 7.5 10 10
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39S64400/800/160ET
64-MBit
P-TSOPII-54
caz smd
PC133 registered reference design
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HC49U-V
Abstract: clrc632 antenna clrc632 firmware MAX232 smd MFAN700 RC632 CLRD701 USB Interface IC NXP SAB-C161U-LF antenna 13.56MHz clrc632
Text: CLRM701 Mifare & ICODE contactless reader module Rev. 3.2 — 24 May 2007 Product data sheet 101432 PUBLIC 1. General description This document describes the functionality of the CLRM701 reader module. It includes the functional and electrical specifications and gives the needed details to use this reader
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CLRM701
CLRM701
CLRD701,
CLRC632
CLRC632
HC49U-V
clrc632 antenna
clrc632 firmware
MAX232 smd
MFAN700
RC632
CLRD701
USB Interface IC NXP
SAB-C161U-LF
antenna 13.56MHz clrc632
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active suspension
Abstract: MD56V62800A
Text: Dear customers, About the change in the name such as "Oki Electric Industry Co. Ltd." and "OKI" in documents to OKI Semiconductor Co., Ltd. The semiconductor business of Oki Electric Industry Co., Ltd. was succeeded to OKI Semiconductor Co., Ltd. on October 1, 2008.
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SMD MARKING T20
Abstract: smd marking T22 MARKING A3 SMD MARKING CODE a09
Text: HYB 39S64400/800CT L 64-MBit Synchronous DRAM 64-MBit Synchronous DRAM • High Performance: • Full page (optional) for sequential wrap around • Multiple Burst Read with Single Write Operation -7.5 -8 Units fCKMAX 133 125 MHz tCK3 7.5 8 ns • Automatic and Controlled Precharge
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39S64400/800CT
64-MBit
SPT03933
SMD MARKING T20
smd marking T22
MARKING A3
SMD MARKING CODE a09
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P-TSOPII-54
Abstract: PC133 registered reference design
Text: HYB 39S128400/800/160CT L 128-MBit Synchronous DRAM 128-MBit Synchronous DRAM • High Performance: • Multiple Burst Read with Single Write Operation -7 -7.5 -8 Units fCK 143 133 125 MHz • Automatic and Controlled Precharge Command tCK3 7 7.5 8 ns • Data Mask for Read/Write Control (x4, x8)
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39S128400/800/160CT
128-MBit
P-TSOPII-54
PC133 registered reference design
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marking code EY SMD
Abstract: PC100-222-620 P-TSOPII-54
Text: HYB39L256160AC/T 256MBit 3.3V Mobile-RAM 256 MBit Synchronous Low-Power DRAM Data Sheet Revision Dec. 2002 • Automatic and Controlled Precharge Command Features -7.5 -8 Units fCK,MAX 133 125 MHz • Programmable Burst Length: 1, 2, 4, 8 and full page tCK3,MIN
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HYB39L256160AC/T
256MBit
16Mbit
P-TFBGA-54,
PC133
SPT03919-3
marking code EY SMD
PC100-222-620
P-TSOPII-54
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HYB39S256400FE-7
Abstract: HYI39S256160FE7 HYB39S256160FT-7 hyb39s256800fe HYB39S256800FE-7 HYB39S256400FF-7 HYB39S256407FE HYB39S256160 HYB39S256160FE HYI39S256160
Text: September 2007 HY[B/I]39S256[40/80/16]0FT L HY[B/I]39S256[40/80/16]0FE(L) HYB39S256[40/80/16]0FF(L) HYB39S 256407 F E 256-MBit Synchronous DRAM SDRAM Internet Data Sheet Rev. 1.42 Internet Data Sheet HY[B/I]39S256[40/80/16][0/7]F[E/T/F](L) 256-MBit Synchronous DRAM
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39S256
HYB39S256
HYB39S
256-MBit
HYB39S256400FE-7
HYI39S256160FE7
HYB39S256160FT-7
hyb39s256800fe
HYB39S256800FE-7
HYB39S256400FF-7
HYB39S256407FE
HYB39S256160
HYB39S256160FE
HYI39S256160
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PC133-333-520
Abstract: PC100-222 PC133-222 PC133-333 L-DIM-168-33 PC133 registered reference design
Text: HYS 64/72V32300GU SDRAM-Modules 3.3 V 32M x 64/72-Bit, 256MByte SDRAM Modules 168-pin Unbuffered DIMM Modules • Single + 3.3 V ± 0.3 V power supply • 168 Pin unbuffered 8 Byte Dual-In-Line SDRAM Modules for PC main memory applications using 256Mbit technology.
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64/72V32300GU
64/72-Bit,
256MByte
168-pin
256Mbit
PC100-222,
PC133-333
PC133-222
PC133
PC133-333-520
PC100-222
PC133-222
L-DIM-168-33
PC133 registered reference design
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D56V62160
Abstract: BA RX transistor d56v621 3tr5
Text: O K I Semiconductor MD56V62160/H 4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM D E SCRIPTIO N T he M D 5 6 V 6 2 1 6 0 /H is a 4 -b a n k x 1,048,576-w ord x 16-bit sy n c h ro n o u s d y n a m ic R A M , fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The inputs
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MP56V62160/H_
576-Word
16-Bit
MD56V62160/H
cycles/64
D56V62160
BA RX transistor
d56v621
3tr5
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39S256160T
Abstract: PC100-333-620 IT191 s4 marking code siemens SMD MARKING CODE A12 smd marking KH P-TSOPII-54
Text: H Y B 39S 25 640 0/8 00/1 60 T 256M B it S ynch ro n o u s DRAM S IE M E N S 2 5 6 M B it S y n c h ro n o u s D R A M P re lim in a ry In fo rm a tio n • High Perform ance: Multiple Burst Operation -8 -8B -10 Units fC K 125 100 100 M Hz tC K 3 8 10 10 ns
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HYB39S256400/800/160T
256MBit
HYB39S256400/800/160AT
39S256160T
PC100-333-620
IT191
s4 marking code siemens
SMD MARKING CODE A12
smd marking KH
P-TSOPII-54
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TENTATIVE TC59S6416/08/04CFT/CFTL-75,-80 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 1.048.576-WORDSX4BANKSx 16-BITS SYNCHRONOUS DYNAMIC RAM 2,097,152-WORDSX4BANKSX8-BITS SYNCHRONOUS DYNAMIC RAM 4,194,304-WORDSX4BANKSX4-BITS SYNCHRONOUS DYNAMIC RAM
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TC59S6416/08/04CFT/CFTL-75
576-WORDSX4BANKSx
16-BITS
152-WORDSX4BANKSX8-BITS
304-WORDSX4BANKSX4-BITS
TC59S6416CFT/CFTL
576-wordsX4
TC59S6408CFT/CFTL
TC59S6404CFT/CFTL
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Untitled
Abstract: No abstract text available
Text: TOSHIBA TENTATIVE TC59S6416/08/04CFT/CFTL-75#-80#-10 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 1.048.576-WORDSX4BANKSx 16-BITS SYNCHRONOUS DYNAMIC RAM 2,097,152-WORDSX4BANKSX8-BITS SYNCHRONOUS DYNAMIC RAM 4,194,304-WORDSX4BANKSX4-BITS SYNCHRONOUS DYNAMIC RAM
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TC59S6416/08/04CFT/CFTL-75#
576-WORDSX4BANKSx
16-BITS
152-WORDSX4BANKSX8-BITS
304-WORDSX4BANKSX4-BITS
TC59S6416CFT/CFTL
576-wordsX4
TC59S6408CFT/CFTL
TC59S6404CFT/CFTL
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39S256160T
Abstract: TSOP54-2 APA10 39S256160T-8 39S256400T-8
Text: H YB39S25640x/80x/16xT 256MBit Synchronous DRAM SIEMENS 256 MBit Synchronous DRAM Target Information Rev. 0.6 • High Performance: Multiple Burst Operation -8 -10 Units fCK 125 100 MHz tCK3 8 10 ns tAC3 6 7 ns Automatic Command and Read with Single Controlled
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YB39S25640x/80x/16xT
256MBit
P-TSOPII-54
400mil
P-TSOPII-54
400mil,
TSOPII-54
TSOP54-2
39S256160T
APA10
39S256160T-8
39S256400T-8
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