SDR RECEIVER Search Results

SDR RECEIVER Result Highlights (5)

Part	Manufacturer	Description
LBAA0QB1SJ-295	Murata Manufacturing Co Ltd	SX1262 MODULE WITH OPEN MCU
GRM-KIT-OVER100-DE-D	Murata Manufacturing Co Ltd	0805-1210 over100uF Cap Kit
LBUA5QJ2AB-828	Murata Manufacturing Co Ltd	QORVO UWB MODULE
LXMSJZNCMH-225	Murata Manufacturing Co Ltd	Ultra small RAIN RFID chip tag
LXMS21NCMH-230	Murata Manufacturing Co Ltd	Ultra small RAIN RFID chip tag

SDR RECEIVER Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
sdr sdram pcb layout Abstract: MT46H32M16LFBF sdr sdram pcb layout guidelines MT48H32M16LFBF MT46H32M16LFCK-6 MT46H32M16LFCK MT46V32M16BN AN10935 sdram pcb layout MT46V32M16BN-6 Text: AN10935 Using SDR/DDR SDRAM memories with LPC32xx Rev. 2 — 11 October 2010 Application note Document information Info Content Keywords LPC32x0, LPC32xx, LPC3220, LPC3230, LPC3240, LPC3250, SDR, SDRAM, DDR Abstract This application note covers hardware related issues for interfacing SDR	Original	AN10935 LPC32xx LPC32x0, LPC32xx, LPC3220, LPC3230, LPC3240, LPC3250, LPC32xx sdr sdram pcb layout MT46H32M16LFBF sdr sdram pcb layout guidelines MT48H32M16LFBF MT46H32M16LFCK-6 MT46H32M16LFCK MT46V32M16BN AN10935 sdram pcb layout MT46V32M16BN-6	PDF
V19M2S002 Abstract: transmitter QAM schematic diagram CMX994 CMX7164 RF5110G design examples RF5110G VCTCXO 10MHZ 5V 64 QAM Transmitter block diagram de9941 Direct conversion receiver Text: DE9941 CML Microcircuits COMMUNICATION SEMICONDUCTORS SDR Demonstrator User Manual UM9941/1 September 2012 Advance Information Features 1 Demonstration of SDR wireless data modem	Original	DE9941 UM9941/1 CMX994) CMX998) CMX7164 452MHz 467MHz PE0002 DE9941 16-QAM V19M2S002 transmitter QAM schematic diagram CMX994 RF5110G design examples RF5110G VCTCXO 10MHZ 5V 64 QAM Transmitter block diagram Direct conversion receiver	PDF
Altera Cyclone III Abstract: SDR FPGA adc types of multipliers INVESTMENT MULTIPLIER spartan 3a AT-513 giga media converter interfacing adsp with spartan-3 fpga fpga fsk fpga based Numerically Controlled Oscillator ofdm spartan 3a dsp Text: White Paper Architecture and Component Selection for SDR Applications Introduction In wireless communications, particularly the military space, software-defined radio SDR is the goal. The basic concept of SDR is to position the digital-to-analog separation as close as possible to the antenna. This is	Original		PDF
CLK180 Abstract: MULT18X18 XAPP622 XC2V3000-FF1152 XC2V3000FF1152 sdr receiver Text: Application Note: Virtex-II Series R 644-MHz SDR LVDS Transmitter/Receiver Author: Ed McGettigan XAPP622 v1.2 July 2, 2002 Summary This application note describes single data rate (SDR) transmitter and receiver interfaces operating at up to 644 MHz, using 17 Low-Voltage Differential Signaling (LVDS) pairs (one	Original	644-MHz XAPP622 XC2V3000-FF1152 CLK180 MULT18X18 XAPP622 XC2V3000-FF1152 XC2V3000FF1152 sdr receiver	PDF
XC2V3000-FF1152 Abstract: XC2V3000FF1152 XAPP622 CLK180 MULT18X18 7SV11 Text: Application Note: Virtex-II Series R 644-MHz SDR LVDS Transmitter/Receiver XAPP622 v1.4 August 5, 2003 Summary This application note describes single data rate (SDR) transmitter and receiver interfaces operating at up to 644 MHz, using 17 Low-Voltage Differential Signaling (LVDS) pairs (one	Original	644-MHz XAPP622 XC2V3000-FF1152 XC2V3000-FF1152 XC2V3000FF1152 XAPP622 CLK180 MULT18X18 7SV11	PDF
XC2V3000-FF1152 Abstract: XAPP622 Digital clock MODULE CIRCUIT DIAGRAM CLK180 MULT18X18 X0Y80 XC2V3000FF1152 Text: Application Note: Virtex-II Series R 644-MHz SDR LVDS Transmitter/Receiver XAPP622 v1.7 April 27, 2004 Summary This application note describes single data rate (SDR) transmitter and receiver interfaces operating at up to 644 MHz, using 17 Low-Voltage Differential Signaling (LVDS) pairs (one	Original	644-MHz XAPP622 XC2V3000-FF1152 CS144, FG256, FG456, FG676, BG575, BG728 XAPP622 Digital clock MODULE CIRCUIT DIAGRAM CLK180 MULT18X18 X0Y80 XC2V3000FF1152	PDF
CMX998 Abstract: No abstract text available Text: Product Preview PP/9941/1 September 2012 DE9941 SDR 1 Demonstrator Software Defined Radio Demonstrator for Linear Radio Systems Introduction DE9941 Brief Description There is a growing market requirement for small , flexible Software Defined Radio SDR data modems.	Original	PP/9941/1 DE9941 DE9941 CMX998, CMX994 CMX7164. CMX998	PDF
Untitled Abstract: No abstract text available Text: CY28343 Zero Delay SDR/DDR Clock Buffer Features • External feedback pins FBIN_SDR/FBOUT_SDR are used to synchronize the outputs to the clock input for DDR. • SMBus interface enables/disables outputs. • Conforms to JEDEC SDR/DDR specifications • Low jitter, low skew	Original	CY28343 CY28343	PDF
CY28343 Abstract: CY28343OC CY28343OCT Text: CY28343 Zero Delay SDR/DDR Clock Buffer Features • External feedback pins FBIN_SDR/FBOUT_SDR are used to synchronize the outputs to the clock input for DDR. • SMBus interface enables/disables outputs. • Conforms to JEDEC SDR/DDR specifications • Low jitter, low skew	Original	CY28343 CY28343 CY28343OC CY28343OCT	PDF
DFSDM Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20 Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-STM 64-KByte 6355C 19-Apr-11 DFSDM SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20	PDF
BA 49181 Abstract: BA 49181 IC 6355E 4046 FSK FPS 4579 LED 1310 nm FC receptacle H.264 encoder chip 2012 jpeg encoder AT91SAM9M10B code for mpeg-4 decoder with vlc Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-STM 64-KByte 6355E 16-Dec-11 BA 49181 BA 49181 IC 4046 FSK FPS 4579 LED 1310 nm FC receptacle H.264 encoder chip 2012 jpeg encoder AT91SAM9M10B code for mpeg-4 decoder with vlc	PDF
SAM9M10 Abstract: No abstract text available Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-Sâ 64-KByte 6355Eâ 16-Dec-11 SAM9M10	PDF
ARM926 pin configuration Abstract: H.264 codec D43Y AT91SAM9M10-CU MPEG-4 decoder CI Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-STM 64-KByte 6355CS 8-Apr-11 ARM926 pin configuration H.264 codec D43Y AT91SAM9M10-CU MPEG-4 decoder CI	PDF
IC DS 1242 Abstract: AT91SAM9M10B sam9M10 atmel 946 atmel 935 OF RS 8960 I.C. VC 5022-2 ATMEL 842 NEC JAPAN 46718 Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-STM 64-KByte 6355C 19-Apr-11 IC DS 1242 AT91SAM9M10B sam9M10 atmel 946 atmel 935 OF RS 8960 I.C. VC 5022-2 ATMEL 842 NEC JAPAN 46718	PDF

RF resistor 32-1059 Abstract: lcd 204 HC- 543 SAM9M10 H.264 encoder chip AC97 ARM926EJ-S AT91SAM ISO7816 format h.264 Text: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static	Original	ARM926EJ-STM 64-KByte 6355D 7-Sep-11 RF resistor 32-1059 lcd 204 HC- 543 SAM9M10 H.264 encoder chip AC97 ARM926EJ-S AT91SAM ISO7816 format h.264	PDF
MachXO2-1200 Abstract: TN1203 TN1199 GDDR71 Lattice XO2 IDDRX71A ODDRX71A MACHXO2 1200 pinout file ddrx2 Text: Implementing High-Speed Interfaces with MachXO2 Devices November 2010 Advance Technical Note TN1203 Introduction In response to the increasing need for higher data bandwidth, the industry has migrated from the traditional Single Data Rate SDR to the Double Data Rate (DDR) architecture. SDR uses either the rising edge or the falling edge	Original	TN1203 1-800-LATTICE MachXO2-1200 TN1203 TN1199 GDDR71 Lattice XO2 IDDRX71A ODDRX71A MACHXO2 1200 pinout file ddrx2	PDF
PLL103-03 Abstract: PLL202-04 Text: Preliminary PLL103-03 DDR SDRAM Buffer with 4 DDR or 3 SDR/2 DDR DIMMS FEATURES • • • Generates 24-output buffers from one input. Supports up to 4 DDR DIMMS or 3 SDR DIMMS and 2 DDR DIMMS. Supports 266MHz DDR SDRAM. One additional output for feedback.	Original	PLL103-03 24-output 266MHz SDRAM10 DDR11T SDRAM11 DDR11C DDR10T DDR10C PLL103-03 PLL202-04	PDF
ISERDES Abstract: OSERDES XAPP856 XAPP860 P/N146071 XAPP855 FIFO36 ML550 samtec QSE iodelay Text: Application Note: Virtex-5 FPGAs R XAPP856 v1.2 May 19, 2007 SFI-4.1 16-Channel SDR Interface with Bus Alignment Author: Greg Burton Summary This application note describes an SFI-4.1 interface, a 16-channel, source-synchronous LVDS interface operating at single data rate (SDR). The transmitter (TX) requires 16 LVDS pairs for	Original	XAPP856 16-Channel 16-channel, ISERDES OSERDES XAPP856 XAPP860 P/N146071 XAPP855 FIFO36 ML550 samtec QSE iodelay	PDF
Untitled Abstract: No abstract text available Text: Product Preview PP/9944/1 December 2013 DE9944 SDR Demonstrator Software Defined Radio Demonstrator for FDMA Digital/Analogue PMR Introduction DE9944 Brief Description FDMA 6.25 kHz digital PMR is an enabler to achieve highly functional solutions by using low	Original	PP/9944/1 DE9944 DE9944 STD-T98, T-102,	PDF
ASR-2300 Abstract: No abstract text available Text: TM Advanced Software Radio MIMO SDR / Motion Sensing Module Loctronix Advanced Software Radio™ ASR waveform and hardware solutions enable high-performance navigation for GNSS challenged environments. The ASR-2300 is Loctronix’s multiple-input, multiple-output (MIMO) software	Original	ASR-2300 A2300-HK-1 139th	PDF
M1535 Abstract: ali m1535 ACER LABORATORIES INC M1646 northbridge DSTN Panel Data Mapping cyberblade lcd monitor acer South Bridge ALI M1535 Acer Laboratories Incorporated Text: M1646 Trident Athlon K7 TM Super Northbridge Internal 4XAGP, PCI and SDR/DDR Memory Controller DX7 Integrated Graphics Product Brief INTRODUCTION The M1646 is ALi and Trident’s new generation of PCI Northbridge chip supporting all AMD Slot-A/Socket A Athlon	Original	M1646 M1646 200/266MHz PC-266 PC-133/ PC-266 M1535 ali m1535 ACER LABORATORIES INC northbridge DSTN Panel Data Mapping cyberblade lcd monitor acer South Bridge ALI M1535 Acer Laboratories Incorporated	PDF
M1535 Abstract: ali m1535 Ali M1644 cyberblade South Bridge ALI M1535 northbridge ACER LABORATORIES INC M1644 T Trident tvxpress addressing modes of pentium Text: M1644 Trident Slot-1/Socket-370 Super Northbridge Internal 4XAGP, PCI and SDR/DDR Memory Controller DX7 Integrated Graphics Product Brief INTRODUCTION The M1644 is ALi and Trident’s new generation of PCI Northbridge chip supporting all Intel Slot-1/Socket 370	Original	M1644 Slot-1/Socket-370 M1644 PC-266 PC-133/ PC-266 M1535 ali m1535 Ali M1644 cyberblade South Bridge ALI M1535 northbridge ACER LABORATORIES INC M1644 T Trident tvxpress addressing modes of pentium	PDF
XC6SLX45-FGG484 Abstract: xc6slx45fgg484 SPARTAN 6 xc6slx45 spartan-6 XC6SLX45 DSP48Es XC6SLX45-FGG484-2 EP 2000 5754 datasheet DS558 DSP48 Text: DDS Compiler v3.0 DS558 June 24, 2009 Product Specification Features Applications • • Digital radios and modems • Software-defined radios SDR • Digital down/up converters for cellular and PCS base stations • Waveform synthesis in digital phase locked loops	Original	DS558 DSP48 XC6SLX45-FGG484 xc6slx45fgg484 SPARTAN 6 xc6slx45 spartan-6 XC6SLX45 DSP48Es XC6SLX45-FGG484-2 EP 2000 5754 datasheet DSP48	PDF
DE9943 Abstract: No abstract text available Text: Product Preview PP/9943/1 September 2013 DE9943 SDR Demonstrator Software Defined Radio Demonstrator for Two-slot TDMA Digital Radio Introduction DE9943 Brief Description Two-slot TDMA Digital Radio is a growing market leading the PMR migration to digital technology.	Original	PP/9943/1 DE9943 DE9943 CMX7161 CMX7262 CMX994	PDF

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SDR RECEIVER Search Results

SDR RECEIVER Result Highlights (5)

SDR RECEIVER Datasheets Context Search

sdr sdram pcb layout

V19M2S002

Altera Cyclone III

CLK180

XC2V3000-FF1152

XC2V3000-FF1152

CMX998

Untitled

CY28343

DFSDM

BA 49181

SAM9M10

ARM926 pin configuration

IC DS 1242

RF resistor 32-1059

MachXO2-1200

PLL103-03

ISERDES

Untitled

ASR-2300

M1535

M1535

XC6SLX45-FGG484

DE9943