Untitled
Abstract: No abstract text available
Text: Revised August 2000 100331 Low Power Triple D-Type Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset
|
Original
|
PDF
|
|
100331PC
Abstract: 100331QC 100331QI 100331SC M24B MO-047 MS-013 N24E V28A
Text: Revised August 2000 100331 Low Power Triple D-Type Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset
|
Original
|
PDF
|
|
100331PC
Abstract: 100331QC 100331QI 100331SC M24B MO-047 MS-011 MS-013 N24E V28A
Text: Revised November 1999 100331 Low Power Triple D-Type Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset
|
Original
|
PDF
|
|
F100K
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
Original
|
PDF
|
|
CERPAK
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
Original
|
PDF
|
100331DMQB
9153601MX
5962Full
9153601MYA
5962Cerdip
9153601VXA
100331J
9153601VYA
CERPAK
|
F100K
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
Original
|
PDF
|
oper959
F100K
|
5962-9153601vya
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
Original
|
PDF
|
5962-9153601VXA
100331J-QMLV
5962-9153601VXA
5962-9153601VYA
100331WQMLV
1-Sep-2000]
|
ecl 100131
Abstract: No abstract text available
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Common Clock CPC , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
Original
|
PDF
|
5-Aug-2002]
ecl 100131
|
b1565
Abstract: B1565 transistor 100131 NSC C1995 F100K J24E M24B N24E V28A W24B
Text: 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type edge-triggered master slave flip-flops with true and complement outputs a Common Clock CPC and Master Set (MS) and Master Reset (MR) inputs Each flip-flop has individual Clock (CPn) Direct
|
Original
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: SCANSTA101 SCANSTA101 Low Voltage IEEE 1149.1 System Test Access STA Master Literature Number: SNLS057I SCANSTA101 Low Voltage IEEE 1149.1 System Test Access (STA) Master General Description Features The SCANSTA101 is designed to function as a test master
|
Original
|
PDF
|
SCANSTA101
SCANSTA101
SNLS057I
SCANPSC100.
|
Untitled
Abstract: No abstract text available
Text: Master Heat Gun Varitemp® Proheat® Variair® Masterflow® Master-Mite® Ecoheat® Ultratorch® Ultratip® Ultratane® EconoIron® PortaPro® Multiseal Solderseal™ Proseal™ www.masterappliance.com Master Appliance® Table of Contents • Electric Heat Guns
|
Original
|
PDF
|
-18th
|
Untitled
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.20 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 9 Mbps1 General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
PDF
|
16-bit
|
psoc full projects
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.30 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
PDF
|
16-bit
psoc full projects
|
cypress flash 370
Abstract: No abstract text available
Text: PSoC Creator Component Datasheet Serial Peripheral Interface SPI Master 2.40 Features • 3- to 16-bit data width • Four SPI operating modes Bit rate up to 18 Mbps* General Description The SPI Master component provides an industry-standard, 4-wire master SPI interface. It can
|
Original
|
PDF
|
16-bit
cypress flash 370
|
|
Untitled
Abstract: No abstract text available
Text: Waber-by-Tripp Lite 6-outlet Power Strip with Illuminated Master Switch and 6-ft. Cord MODEL NUMBER: 6SPDX Highlights 6 outlets 6-ft. cord 12.5-in. length Lighted master switch All-metal housing Applications Offers multiple outlet power distribution in workbench,
|
Original
|
PDF
|
5-15R
UL1363
|
Untitled
Abstract: No abstract text available
Text: 100331 ¡33National ÆM Semiconductor 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset
|
OCR Scan
|
PDF
|
33National
TL/F/10262-9
TL/F/10262-10
|
F100131
Abstract: F100331
Text: F100131 Triple D Flip-Flop General Description The F100131 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
OCR Scan
|
PDF
|
F100131
F100131
F100331
TL/F/9653-10
|
Untitled
Abstract: No abstract text available
Text: Se mi c o n dut July 1992 t o r 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset
|
OCR Scan
|
PDF
|
|
Untitled
Abstract: No abstract text available
Text: National ÆSA Semiconductor F100131 Triple D Flip-Flop General Description The F100131 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
OCR Scan
|
PDF
|
F100131
F100331
|
Untitled
Abstract: No abstract text available
Text: EM ICONDUCTQ R r 100331 Low Power Triple D Flip-Flop General Description Features The 100331 contains three D-type, edge-triggered master/ slave flip-flops with true and complement outputs, a Com mon Clock CPc , and Master Set (MS) and Master Reset (MR) inputs. Each flip-flop has individual Clock (CPn), Direct
|
OCR Scan
|
PDF
|
|
HD100131
Abstract: No abstract text available
Text: H D 100131 Triple D -ty p e F lip -F lo p s The HD100131 contains three D-type Master Slave Flip Flops with true and complement outputs, a Common Clock CPc , and Master Set (MS) and Master Reset (M R) inputs. Each flip-flop has individual clocks (CPn), Direct Set (SDn) and
|
OCR Scan
|
PDF
|
HD100131
HD100131
HD100131F
|
Untitled
Abstract: No abstract text available
Text: F100131 TRIPLE D FLIP-FLOP F100K SERIES ECL ' DESCRIPTION—The F100131 contains three D type master/slave flip -flop s w ith true and com plem ent outputs, a Com mon Clock iCPcK and Master Set MS and Master Reset (MR) inputs. Each flip -flo p has individual Clocks (CPn>, Direct Set (SDn) and Direct
|
OCR Scan
|
PDF
|
F100131
F100K
F100131
|
Untitled
Abstract: No abstract text available
Text: H D 100131 Triple D -typ e F lip -F lo p s The HD100131 contains three D-type Master Slave Direct Clear CDn inputs. Data enters a master Flip Flops with true and complement outputs, a Common Clock (CPc), and Master Set (MS) and when both CPn and CPc are low and transfers to a
|
OCR Scan
|
PDF
|
HD100131
HD100131
|
Untitled
Abstract: No abstract text available
Text: Not Intended For New Designs 100130 National ÆM Semiconductor 100130 Triple D Latch General Description The 100130 contains three D-type latches with true and complement outputs and with Common Enable Ec , Master Set (MS) and Master Reset (MR) inputs. Each latch has its
|
OCR Scan
|
PDF
|
TL/F/9852-6
TL/F/98S2-9
|