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    MARKING A3A Search Results

    MARKING A3A Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MG8097/B Rochester Electronics LLC 8097 - Math Coprocessor - Dual marked (8506301ZA) Visit Rochester Electronics LLC Buy
    5490/BCA Rochester Electronics LLC 5490 - Decade Counter - Dual marked (M38510/01307BCA) Visit Rochester Electronics LLC Buy
    5405/BCA Rochester Electronics LLC 5405 - Gate - Dual marked (M38510/00108BCA) Visit Rochester Electronics LLC Buy
    54AC20/SDA-R Rochester Electronics LLC 54AC20/SDA-R - Dual marked (M38510R75003SDA) Visit Rochester Electronics LLC Buy
    UHD503R/883 Rochester Electronics LLC UHD503R/883 - Dual marked (5962-8855101CA) Visit Rochester Electronics LLC Buy

    MARKING A3A Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    A09 N03 MOSFET

    Abstract: marking B3A sot23-5 t7G SOT23-6 marking H2A sot-23 ADM2004 marking moy sot-23 A06 N03 MOSFET SOT23-5 D2Q M05 SOT-23 M2A MARKING SOT-23
    Text: Tiny Part Number Cross Reference Package Marking Model Function Package Description Package Marking Model Function Package Description 0Axx 0Bxx 2A0A 2B0A 2C0A 3A0A 3B0A 3C0A 4A0A 4B0A 4C0A 5A0A 5B0A 5C0A 9Jxx 9Lxx 9Mxx 9Rxx 9Sxx 9Txx 9Zxx A00 A01 A02 A04


    Original     		PDF AD1580-A AD1580-B AD1582-A AD1582-B AD1582-C AD1583-A AD1583-B AD1583-C AD1584-A AD1584-B A09 N03 MOSFET marking B3A sot23-5 t7G SOT23-6 marking H2A sot-23 ADM2004 marking moy sot-23 A06 N03 MOSFET SOT23-5 D2Q M05 SOT-23 M2A MARKING SOT-23

    NT6SM32M16AG-S1

    Abstract: NT6SM16M32 128M32 NT6SM16M32AK NT6SM32M16AG Lpddr2 Idd1 8M32R NT6SM16M32AK-S1 lpddr2 layout lpddr2 256mb
    Text: 512Mb LPSDR SDRAM NT6SM32M16AG / NT6SM16M32AK / NT6SM16M32RAK Feature  Options Fully synchronous; all signals registered on positive edge of  Marking VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed


    Original     		PDF 512Mb NT6SM32M16AG NT6SM16M32AK NT6SM16M32RAK -32Meg -16Meg -54-ball -90-ball x13mm) 32M16 NT6SM32M16AG-S1 NT6SM16M32 128M32 Lpddr2 Idd1 8M32R NT6SM16M32AK-S1 lpddr2 layout lpddr2 256mb

    Lpddr2 Idd7

    Abstract: COMMAND42 lpddr2 256mb lpddr2 layout NT6SM32M16AG-S2 LPDDR2 1Gb Memory NT6SM16M32
    Text: 512Mb LPSDR SDRAM NT6SM32M16AG / NT6SM16M32AK / NT6SM16M32RAK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed


    Original     		PDF 512Mb NT6SM32M16AG NT6SM16M32AK NT6SM16M32RAK -32Meg -16Meg -54-ball -90-ball x13mm) 32M16 Lpddr2 Idd7 COMMAND42 lpddr2 256mb lpddr2 layout NT6SM32M16AG-S2 LPDDR2 1Gb Memory NT6SM16M32

    Lpddr2 Idd7

    Abstract: 216-ball LPDDR2 NT6SM16M32 NT6SM16M32AK-S1
    Text: 512Mb LPSDR SDRAM NT6SM16M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


    Original     		PDF 512Mb NT6SM16M32AK -16Meg -90-ball x13mm) 16M32 Lpddr2 Idd7 216-ball LPDDR2 NT6SM16M32 NT6SM16M32AK-S1

    Lpddr2 Idd7

    Abstract: Jedec lpddr2 216-ball LPDDR 8Gb lpddr2-s2
    Text: 256Mb LPSDR SDRAM NT6SM8M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


    Original     		PDF 256Mb NT6SM8M32AK -16Meg -54-ball -90-ball x13mm) 16M16 Lpddr2 Idd7 Jedec lpddr2 216-ball LPDDR 8Gb lpddr2-s2

    NTC 200-9

    Abstract: a2240 128M16 A1930 NT6SM16M32
    Text: 512Mb LPSDR SDRAM NT6SM16M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


    Original     		PDF 512Mb NT6SM16M32AK -16Meg 16M32 NTC 200-9 a2240 128M16 A1930 NT6SM16M32

    lpddr2 256mb

    Abstract: NT6DM8M32AC-T1 NT6DM16M16AD NT6DM8M32AC lpddr2 layout NT6DM8M32 Dual LPDDR2 lpddr2 256mb kgd lpddr2-s2
    Text: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking  VDD /VDDQ


    Original     		PDF 256Mb NT6DM16M16AD NT6DM8M32AC -16Meg 16M16 lpddr2 256mb NT6DM8M32AC-T1 NT6DM8M32AC lpddr2 layout NT6DM8M32 Dual LPDDR2 lpddr2 256mb kgd lpddr2-s2

    A1930

    Abstract: No abstract text available
    Text: 256Mb LPSDR SDRAM NT6SM8M32AK Feature  Options Fully synchronous; all signals registered on positive edge of Marking  VDD /VDDQ system clock -1.8V/1.8V  M Internal, pipelined operation; column address can be changed  Configuration every clock cycle


    Original     		PDF 256Mb NT6SM8M32AK -16Meg 16M16 A1930

    NT6DM16M16AD-T1

    Abstract: 64M32 HP 3458 NT6DM16M16AD-T1I
    Text: 256Mb LPDDR SDRAM NT6DM16M16AD / NT6DM8M32AC Options Feature  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with data, to be used in capturing data at the receiver Marking  VDD /VDDQ


    Original     		PDF 256Mb NT6DM16M16AD NT6DM8M32AC -16Meg 16M16 NT6DM16M16AD-T1 64M32 HP 3458 NT6DM16M16AD-T1I

    P6SBMJ24A

    Abstract: B17C B14A A17a B14A equivalent MARKING A19c marking A32A P4SSMJ24A A12A a32a
    Text: SURFACE MOUNT DEVICES FOR HYBRID APPLICATIONS PLASTIC MATERIAL USED CARRIES UL 94V-0 TYPE Marking Break Down Voltage VBR V @ IZT Test Current Min Nom Max Volts Volts Volts @IT Working Peak Reverse Voltage Maximum Reverse Leakage Current Maximum Reverse Current


    Original     		PDF A40CA 5SCMJ120CA 5SCMJ130CA 5SCMJ150CA 5SCMJ160CA 5SCMJ170CA 5SCMJ180CA 5SCMJ200CA P6SBMJ24A B17C B14A A17a B14A equivalent MARKING A19c marking A32A P4SSMJ24A A12A a32a

    NT6SM16M16AG-S1

    Abstract: lpddr2-s2 NT6SM16M16AG NT6SM16M16AG-S1I 128T64
    Text: 256Mb LPSDR SDRAM NT6SM16M16AG NT6SM8M32AK Feature Options Fully synchronous; all signals registered on positive edge of z z Marking VDD /VDDQ system clock -1.8V/1.8V M Internal, pipelined operation; column address can be changed z z every clock cycle


    Original     		PDF 256Mb NT6SM16M16AG NT6SM8M32AK -16Meg -54-ball -90-ball x13mm) 16M16 NT6SM16M16AG-S1 lpddr2-s2 NT6SM16M16AG-S1I 128T64

    B14A equivalent

    Abstract: zener b14a P6SBMJ24A B17C tvs2315pt TVSS5VESPT diode B14A B14A zener equivalent A17a P4SSMJ24A
    Text: SURFACE MOUNT DEVICES FOR HYBRID APPLICATIONS PLASTIC MATERIAL USED CARRIES UL 94V-0 Zener Voltage VZ V @ IZT TYPE Test current Working Peak Reverse Voltage IZT(mA) Vrwm(V) Marking Min Nom Max Volts Volts Volts Maximum Maximum Maximum Reverse reverse Reverse


    Original     		PDF 11ACE TVSP05PT OT-23 LTVSJ12ESPT LTVSJ15ESPT SC-79 B14A equivalent zener b14a P6SBMJ24A B17C tvs2315pt TVSS5VESPT diode B14A B14A zener equivalent A17a P4SSMJ24A

    NT6DM16M

    Abstract: No abstract text available
    Text: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with Marking  VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver


    Original     		PDF 512Mb NT6DM32M16AD NT6DM16M32AC -32Meg 32M16 -16Meg 16M32 NT6DM16M

    NT6DM32M16AD-T1

    Abstract: NT6DM32M16AD NT6DM16M32AC-T1 NT6DM16M32AC NT6DM16M32AC-T3 216-ball NT6DM32M16AD-T3 256M16 lpddr2 256mb lpddr2 layout
    Text: 512Mb LPDDR SDRAM NT6DM32M16AD / NT6DM16M32AC Feature Options  Double-data rate architecture; two data transfer per clock cycle  Bidirectional, data strobe DQS is transmitted/received with Marking  VDD /VDDQ -1.8V/1.8V M data, to be used in capturing data at the receiver


    Original     		PDF 512Mb NT6DM32M16AD NT6DM16M32AC -32Meg -16Meg -60-ball -90-ball NT6DM32M16AD-T1 NT6DM16M32AC-T1 NT6DM16M32AC NT6DM16M32AC-T3 216-ball NT6DM32M16AD-T3 256M16 lpddr2 256mb lpddr2 layout

    Untitled

    Abstract: No abstract text available
    Text: FLASH PRELIMINARY AS8FLC1M32A Hermetic, Multi-Chip Module MCM FIGURE 1: PIN ASSIGNMENT (Top View) •      OPTION Access Speed 70ns 90ns 100ns 120ns MARKING -70 -90 -100 -120 61 62 63 64 65 66 67 68 01 02 03 04 05 06 07 59


    Original     		PDF AS8FLC1M32A I/O10 I/O11 I/012 I/O13 I/O14 I/O15 I/O16 I/O17 I/O18

    Omron

    Abstract: 91a100 touch switch pushbutton 32AAA 90K-1 A3AA-91A1-00E
    Text: A3A Lighted Pushbutton Switch Compact High-capacity Push-button Switch ●Ideal for use as a high breaking capacity Power Switch. ●Switches from micro load minimum applicable load: 5 VDC 1mA to high capacity load. RoHS Compliant A 3 A Refer to Safety Precautions for All Pushbutton Switches and


    Original     		PDF 1-00E@ A025-E1-05 Omron 91a100 touch switch pushbutton 32AAA 90K-1 A3AA-91A1-00E

    Untitled

    Abstract: No abstract text available
    Text: 16 M E G :x4,x8 MICRON I TECHNOLOGY, INC. Q FEATURES 44-Pin TSOP x4 NC DQ0 NC DQ1 - MARKING 4M 4 2M 8 - - • W RITE Recovery OWR/tDPL *WR = 1 CLK *WR = 2 CLK C on tact facto ry for availability.) Al A2 • Plastic Package - OCPL 44-pin TSOP (400 mil) Note:


    OCR Scan     		PDF 44-Pin 096-cycle

    krc 118 048

    Abstract: ZM02
    Text: ADVANCE 2. 4 WIEG X 64 SDRAM DIMMs l^ iid R o r s i SYNCHRONOUS DRAM MODULE MT8LSD T 264A MT16LSD(T)464A FEATURES OPTIONS (DE-9) 2 Meg x 64 TSO P (shown), (DE-10) 4 Meg x 64 TSOP, (DE-25) 2 Meg x 64 SOJ, (DE-26) 4 Meg x 64 SOJ Sm Tm Q pj MARKING • Components


    OCR Scan     		PDF 168-pin, MT16LSD 096-cycle krc 118 048 ZM02

    Untitled

    Abstract: No abstract text available
    Text: - PRELIMINARYD ecem ber 1995 Edition 2.1 FUJITSU _ P R O D U C T P R O F IL E S H E E T : MB81G83222-010/-012/-015 CMOS 2 X 128K X 3 2 SYNCHRONOUS GRAM CMOS 2 BANKS OF 131,072-WORDS x 32-BIT SYNCHRONOUS GRAPHIC RANDOM ACCESS MEMORY Marking side The Fujitsu MB81G83222 is a CMOS Synchronous Graphic Random Access Memory


    OCR Scan     		PDF MB81G83222-010/-012/-015 072-WORDS 32-BIT MB81G83222 32-bit 374175b MB81G83222-010 MB81G83222-012

    Untitled

    Abstract: No abstract text available
    Text: PRELIMINARY MICRON I TECHNOLOGY, 1 6 M l n b XAM INC. FEATURES 50-Pin TSOP V cc DQ0 DQ1 V ssQ DQ2 DQ3 V ccQ DQ4 DQ5 V ssQ DQ6 DQ7 V ccQ DQ M L W E# C AS# RAS# C S# BA A10 A0 A1 A2 A3 V cc MARKING 1M16 • Plastic Package - OCPL 50-pin TSOP 400 mil TG • Timing


    OCR Scan     		PDF 50-Pin MT48LC1M16A1TG-8A

    48LC

    Abstract: MT18LSDT472
    Text: ADVANCE 2. 4 M E G X 72 S D R A M DIM Ms |U |IC = R O N SYNCHRONOUS DRAM MODULE MT9LSD T 272A MT18LSD(T)472A FEATURES OPTIONS (DE-7) 2 Meg x 72 TSOP (shown), (DE-8) 4 Meg x 72 TSOP, (DE-27) 2 Meg x 72 SOJ, (DE-28) 4 Meg x 72 SOJ MARKING • Components SO J


    OCR Scan     		PDF 168-pin, MT18LSD 096-cycle 48LC MT18LSDT472

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE 2 MEG X 64 S D R A M SO DIM M IC Z R O fM SMALL-OUTLINE SDRAM MODULE MT8LSDT264H FEATURES OPTIONS 144-Pin Small-Outline DIMM DF-6 umilimi MARKING • Package 144-pin SODIM M (gold) G • F requen cy/C A S Latency 66 M H z /C L = 2 (10ns, 100 M Hz SDRAM s) -66CL2


    OCR Scan     		PDF 144-pin, 096-cycle

    Untitled

    Abstract: No abstract text available
    Text: ADVANCE M IC R O N I MT41 LC256K32D4 S 256K x 32 SGRAM f ^ D A D U I f ^ C n A R /l w r iM IV I n M r n l V / O 256K x 32 SGRAM PULSED RAS, DUAL BANK, p i p e lin e d ,3 .3 V o p e r a t io n NEW SYNCHRONOUS FEATURES OPTIONS MARKING • Timing 10ns access


    OCR Scan     		PDF LC256K32D4 100-pin MT41LC256K32D4LG-15 00123bb 01pm5-Rev

    Untitled

    Abstract: No abstract text available
    Text: Filter connectors Solder cup with threaded insert accepts cable AWG 26 Socket connector Plug connector Kat 1 i A4A Kat 1 i A3A B + 0,25 A - 0,76 B - 0,25 C 9 31,19 16,46 25,00 9 31,19 16,79 25,00 6,12 15 39,52 24,79 33,30 15 39,52 25,12 33,30 \%\% 6,12 25


    OCR Scan     		PDF