Untitled
Abstract: No abstract text available
Text: 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O Document Title 4Bank x 2M x 16bits Synchronous DRAM Revision History Revision No. History Draft Date 1.0 First Version Release Dec. 2004 1.1 1. Corrected PIN ASSIGNMENT A12 to NC Jan. 2005 1.2 1. Changed IDD3P and IDD3PS 3mA to 5mA
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128Mb
16bits
-40oC
128Mbit
8Mx16bit)
HY57V281620E
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PDF
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HY57V281620ELT
Abstract: HY57V281620ET
Text: 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O Document Title 4Bank x 2M x 16bits Synchronous DRAM Revision History Revision No. History Draft Date 1.0 First Version Release Dec. 2004 1.1 1. Corrected PIN ASSIGNMENT A12 to NC Jan. 2005 1.2 1. Changed IDD3P and IDD3PS 3mA to 5mA
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128Mb
16bits
-40oC
128Mbit
8Mx16bit)
HY57V281arge
HY57V281620E
400mil
HY57V281620ELT
HY57V281620ET
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PDF
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hy57v281620etp
Abstract: 35A11 HY57V281620ELT HY57V281620ET
Text: 128Mb Synchronous DRAM based on 2M x 4Bank x16 I/O Document Title 4Bank x 2M x 16bits Synchronous DRAM Revision History Revision No. History Draft Date 1.0 First Version Release Dec. 2004 1.1 1. Corrected PIN ASSIGNMENT A12 to NC Jan. 2005 1.2 1. Changed IDD3P and IDD3PS 3mA to 5mA
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128Mb
16bits
-40oC
500uA
128Mbit
8Mx16bit)
HY57V281620E
400mil
54pin
hy57v281620etp
35A11
HY57V281620ELT
HY57V281620ET
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PDF
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Untitled
Abstract: No abstract text available
Text: 240PIN DDR2 667 Unbuffered DIMM 1GB With 64Mx8 CL5 TS128MLQ64V6J Description Placement The TS128MLQ64V6J is a 128M x 64bits DDR2-667 Unbuffered DIMM. The TS128MLQ64V6J consists of 16pcs 64Mx8bits DDR2 SDRAMs in 60 ball FBGA packages and a 2048 bits serial EEPROM on a 240-pin
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240PIN
64Mx8
TS128MLQ64V6J
TS128MLQ64V6J
64bits
DDR2-667
16pcs
64Mx8bits
240-pin
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Untitled
Abstract: No abstract text available
Text: 240PIN DDR2 533 Registered DIMM 1024MB With 64Mx8 CL4 TS128MQR72V5J Placement Description The TS128MQR72V5J is a 128M x 72bits DDR2-533 Registered DIMM. The TS128MQR72V5J consists of 18 pcs 64Mx8 bits DDR2 SDRAMs in 60 ball FBGA package, 2 pcs register in 96 ball uBGA package, 1 pcs
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240PIN
1024MB
64Mx8
TS128MQR72V5J
TS128MQR72V5J
72bits
DDR2-533
240-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: 200PIN DDR2 400 SO-DIMM 256MB With 32Mx16 CL3 TS32MSQ64V4M Description Placement The TS32MSQ64V4M is a 32M x 64bits DDR2-400 SO-DIMM. The TS32MSQ64V4M consists of 4pcs 32Mx16its DDR2 SDRAMs in 84 ball FBGA packages and a 2048 bits serial EEPROM on a 200-pin printed
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200PIN
256MB
32Mx16
TS32MSQ64V4M
TS32MSQ64V4M
64bits
DDR2-400
32Mx16its
200-pin
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PDF
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Untitled
Abstract: No abstract text available
Text: 214PIN DDR2 533 Micro-DIMM 256MB With 32Mx16 CL4 TS32MMQ64V5M Description Placement The TS32MMQ64V5M is a 32M x 64bits DDR2-533 J Micro-DIMM. The TS32MMQ64V5M consists of 4pcs 32Mx16bits DDR2 SDRAMs in 84 ball FBGA packages and a 2048 bits serial EEPROM on printed circuit board
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214PIN
256MB
32Mx16
TS32MMQ64V5M
TS32MMQ64V5M
64bits
DDR2-533
32Mx16bits
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PDF
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Untitled
Abstract: No abstract text available
Text: 240PIN DDR2 800 Unbuffered DIMM 512MB With 64Mx8 CL5 TS64MLQ64V8J Description Placement The TS64MLQ64V8J is a 64M x 64bits DDR2-800 Unbuffered DIMM. The TS64MLQ64V8J consists of 8 pcs 64Mx8bits DDR2 SDRAMs in 60 ball FBGA packages and a 2048 bits serial EEPROM on a 240-pin printed
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240PIN
512MB
64Mx8
TS64MLQ64V8J
TS64MLQ64V8J
64bits
DDR2-800
64Mx8bits
240-pin
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Untitled
Abstract: No abstract text available
Text: 240PIN DDR2 800 Unbuffered DIMM 1GB With 64Mx8 CL5 TS128MLQ64V8J Description Placement The TS128MLQ64V8J is a 128M x 64bits DDR2-800 Unbuffered DIMM. The TS128MLQ64V8J consists of 16pcs 64Mx8bits DDR2 SDRAMs in 60 ball FBGA packages and a 2048 bits serial EEPROM on a 240-pin
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240PIN
64Mx8
TS128MLQ64V8J
TS128MLQ64V8J
64bits
DDR2-800
16pcs
64Mx8bits
240-pin
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PDF
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45VM32160D
Abstract: No abstract text available
Text: IS42/45VM32160D 4M x 32Bits x 4Banks Mobile Synchronous DRAM Description These IS42/45VM32160D are mobile 536,870,912 bits CMOS Synchronous DRAM organized as 4 banks of 4,194,304 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are
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IS42/45VM32160D
32Bits
IS42/45VM32160D
-40oC
16Mx32
IS42VM32160D-6BLI
IS42VM32160D-75BLI
90-ball
45VM32160D
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SM81600E
Abstract: IS42SM16800E IS42SM81600E IS42SM16800E-7TLI IS42SM32400E IS42SM32400E-7T IS42SM16800E-7BLI
Text: IS42SM81600E / IS42SM16800E / IS42SM32400E IS42RM81600E / IS42RM16800E / IS42RM32400E 16Mx8, 8Mx16, 4Mx32 128Mb Mobile Synchronous DRAM APRIL 2011 DESCRIPTION FEATURES • Fully synchronous; all signals referenced to a positive clock edge • Internal bank for hiding row access and precharge
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IS42SM81600E
IS42SM16800E
IS42SM32400E
IS42RM81600E
IS42RM16800E
IS42RM32400E
16Mx8,
8Mx16,
4Mx32
128Mb
SM81600E
IS42SM16800E-7TLI
IS42SM32400E-7T
IS42SM16800E-7BLI
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IS43DR81280B
Abstract: IS46DR16640B IS43DR16640B-25DBL IS46DR16640B-3DBLA IS43DR16640B IS43DR16640B-3DBL
Text: IS43/46DR81280B/L, IS43/46DR16640B/L PRELMINARY INFORMATION AUGUST 2012 1Gb x8, x16 DDR2 SDRAM FEATURES • Clock frequency up to 400MHz 8 internal banks for concurrent operation
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IS43/46DR81280B/L,
IS43/46DR16640B/L
400MHz
cycles/64
60ball
60-ball
IS43DR81280B
IS46DR16640B
IS43DR16640B-25DBL
IS46DR16640B-3DBLA
IS43DR16640B
IS43DR16640B-3DBL
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IS42S16160D
Abstract: IS42S16160D-7TLI
Text: IS42S83200D, IS42S16160D IS45S83200D, IS45S16160D 32Meg x 8, 16Meg x16 JUNE 2009 256-MBIT SYNCHRONOUS DRAM FEATURES • Clock frequency: 166, 143 MHz • Fully synchronous; all signals referenced to a positive clock edge OVERVIEW ISSI's 256Mb Synchronous DRAM achieves high-speed
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IS42S83200D,
IS42S16160D
IS45S83200D,
IS45S16160D
32Meg
16Meg
256-MBIT
256Mb
IS42S83200D
IS42S16160D
IS42S16160D-7TLI
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DDR2-400
Abstract: DDR2-533 K4T56043QF K4T56083QF
Text: 256MB, 512MB, Registered DIMMs DDR2 SDRAM DDR2 Registered SDRAM MODULE 240pin Registered Module based on 256Mb F-die 72-bit ECC Revision 1.0 January 2004 Rev. 1.0 Jan. 2004 DDR2 SDRAM 256MB, 512MB, Registered DIMMs DDR2 Registered DIMM Ordering Information
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256MB,
512MB,
240pin
256Mb
72-bit
M393T3253FG0-CD5/CC
256MB
32Mx72
DDR2-400
DDR2-533
K4T56043QF
K4T56083QF
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PDF
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ba1s
Abstract: No abstract text available
Text: IS43LR32400E Advanced Information 1M x 32Bits x 4Banks Mobile DDR SDRAM Description The IS43LR32400E is 134,217,728 bits CMOS Mobile Double Data Rate Synchronous DRAM organized as 4 banks of 1,048,576 words x 32 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The address lines are multiplexed with the Data
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IS43LR32400E
32Bits
IS43LR32400E
Figure38
90Ball
-25oC
4Mx32
IS43LR32400E-6BLE
ba1s
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PDF
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NT1GT64U8HA0BN
Abstract: NT1GT64U8HA0BN-3C DDR2-400 DDR2-533 DDR2-667 PC2-3200 PC2-5300 SSTL-18 NT1GT64U8HA0BN-37B
Text: NT1GT64U8HA0BN Green 1GB : 128M x 64 PC2-3200 / PC2-4200 / PC2-5300 Unbuffered DDR2 SO-DIMM 200 pin Unbuffered DDR2 SO-DIMM Based on 64Mx8 DDR2 SDRAM Features • 200-Pin Small Outline Dual In-Line Memory Module (SO-DIMM) • 128Mx64 Unbuffered DDR2 SO-DIMM based on 64Mx8 DDR2
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NT1GT64U8HA0BN
PC2-3200
PC2-4200
PC2-5300
64Mx8
200-Pin
128Mx64
PNT1GT64U8HA0BN
NT1GT64U8HA0BN
NT1GT64U8HA0BN-3C
DDR2-400
DDR2-533
DDR2-667
SSTL-18
NT1GT64U8HA0BN-37B
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NT5TU32M16CG-BD
Abstract: NT5TU32M16CG-be NT5TU64M8CE
Text: NT5TU128M4CE / NT5TU64M8CE /NT5TU32M16CG 512Mb DDR2 SDRAM C-Die Features • 1.8V ± 0.1V Power Supply Voltage • Data-Strobes: Bidirectional, Differential • Programmable CAS Latency: 3,4,5,6 and 7 • 4 internal memory banks • Programmable Additive Latency: 0, 1, 2, 3, and 4
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NT5TU128M4CE
NT5TU64M8CE
/NT5TU32M16CG
512Mb
NT5TU32M16CG-BD
NT5TU32M16CG-be
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PDF
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dm 533
Abstract: K4T5108 M393T5750BS0-CD5 DDR2-533
Text: 512MB, 1GB, 2GB Registered DIMMs DDR2 SDRAM DDR2 Registered SDRAM MODULE 240pin Registered Module based on 512Mb B-die 72-bit ECC Revision 1.0 January 2004 Rev. 1.0 Jan. 2004 DDR2 SDRAM 512MB, 1GB, 2GB Registered DIMMs DDR2 Registered DIMM Ordering Information
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512MB,
240pin
512Mb
72-bit
M393T6553BG0-CD5/CC
512MB
64Mx72
64Mx8
K4T51083QB)
dm 533
K4T5108
M393T5750BS0-CD5
DDR2-533
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HY57V641620B
Abstract: HY57V651620B HY57V651620BLTC-55 HY57V651620BTC-10 HY57V651620BTC-10P HY57V651620BTC-10S HY57V651620BTC-55 HY57V651620BTC-6 HY57V651620BTC-7 HY57V651620BTC-75
Text: HY57V651620B 4 Banks x 1M x 16Bit Synchronous DRAM DESCRIPTION The Hynix HY57V641620B is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V641620B is organized as 4banks of 1,048,576x16.
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HY57V651620B
16Bit
HY57V641620B
864-bit
576x16.
400mil
54pin
HY57V651620B
HY57V651620BLTC-55
HY57V651620BTC-10
HY57V651620BTC-10P
HY57V651620BTC-10S
HY57V651620BTC-55
HY57V651620BTC-6
HY57V651620BTC-7
HY57V651620BTC-75
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PDF
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7F7F7F0B00000000
Abstract: PC2-5300 PC2-6400 NT512T64UH8B0FN NT1GT64U8HB0BN-3C 32MX16
Text: NT256T64UH4B0FN / NT512T64UH8B0FN NT1GT64U8HB0BN 256MB: 32M x 64 / 512MB: 64M x 64 / 1GB: 128M x 64 PC2-4200 / PC2-5300 / PC-6400 Unbuffered DDR2 SO-DIMM 200 pin Unbuffered DDR2 SO-DIMM Based on DDR2-533/667/800 32Mx16/64Mx8 SDRAM B-Die Features • Performance:
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NT256T64UH4B0FN
NT512T64UH8B0FN
NT1GT64U8HB0BN
256MB:
512MB:
PC2-4200
PC2-5300
PC-6400
DDR2-533/667/800
32Mx16/64Mx8
7F7F7F0B00000000
PC2-6400
NT512T64UH8B0FN
NT1GT64U8HB0BN-3C
32MX16
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Untitled
Abstract: No abstract text available
Text: FMD4A32LCx–30Ex 128M 4Mx32 Low Power DDR SDRAM Revision 0.2 Jan. 2009 Rev. 0.2, Jan. ‘09 1 FMD4A32LCx–30Ex Document Title 128M(4Mx32) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark Jul. 2nd , 2008 Preliminary 0.0 Initial Draft
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FMD4A32LCxâ
4Mx32)
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Untitled
Abstract: No abstract text available
Text: FMD4B32LBx–37Ex 256M 8Mx32 Low Power DDR SDRAM Revision 1.0 Jan. 2009 Rev. 1.0, Jan. ‘09 1 FMD4B32LBx–37Ex Document Title 256M(8Mx32) Low Power DDR SDRAM Revision History Revision No. History Draft date Remark Preliminary 0.0 Initial Draft Jan. 17th, 2008
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FMD4B32LBxâ
8Mx32)
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PDF
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W971GG6JB
Abstract: 8X12 DDR2-667 DDR2-800 0A80
Text: W971GG6JB 8M 8 BANKS 16 BIT DDR2 SDRAM Table of Contents1. GENERAL DESCRIPTION . 4 2. FEATURES . 4
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W971GG6JB
W971GG6JB
8X12
DDR2-667
DDR2-800
0A80
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PDF
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Untitled
Abstract: No abstract text available
Text: 240PIN DDR2 533 Unbuffered DIMM 512MB With 64Mx8 CL4 TS64MLQ72V5J Description Placement The TS64MLQ72V5J is a 64M x 64bits DDR2-533 Unbuffered DIMM. The TS64MLQ72V5J consists of 9 pcs 64Mx8 bits DDR2 SDRAMs in 60 ball FBGA packages and a 2048 bits serial EEPROM on a 240-pin printed
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240PIN
512MB
64Mx8
TS64MLQ72V5J
TS64MLQ72V5J
64bits
DDR2-533
240-pin
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PDF
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