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    HCT107 Search Results

    HCT107 Result Highlights (1)

    Part ECAD Model Manufacturer Description Download Buy
    CD74HCT107E Texas Instruments High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-PDIP -55 to 125 Visit Texas Instruments Buy
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    HCT107 Price and Stock

    Rochester Electronics LLC 74HCT107D-Q100J

    74HCT107 - DUAL JK FLIP-FLOP WIT
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey 74HCT107D-Q100J Bulk 46,866 1,967
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    Rochester Electronics LLC CD74HCT107E

    IC FF JK TYPE DUAL 1BIT 14DIP
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    DigiKey CD74HCT107E Tube 26,205 540
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    Rochester Electronics LLC 74HCT107D,652

    IC FF JK TYPE DUAL 1BIT 14SO
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    DigiKey 74HCT107D,652 Bulk 11,408 1,410
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    Nexperia 74HCT107D,653

    IC FF JK TYPE DUAL 1BIT 14SO
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    DigiKey 74HCT107D,653 Reel 2,500 2,500
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    74HCT107D,653 Cut Tape 2,348 1
    • 1 $0.62
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    74HCT107D,653 Digi-Reel 1
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    Avnet Americas 74HCT107D,653 Reel 8 Weeks 5,000
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    Mouser Electronics 74HCT107D,653 2,454
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    • 100 $0.373
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    Rochester Electronics 74HCT107D,653 35,000 1
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    TTI 74HCT107D,653 Reel 5,000
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    Texas Instruments CD74HCT107E

    IC FF JK TYPE DUAL 1BIT 14DIP
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    DigiKey CD74HCT107E Tube 586 1
    • 1 $0.9
    • 10 $0.806
    • 100 $0.6287
    • 1000 $0.48125
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    Mouser Electronics CD74HCT107E 398
    • 1 $0.9
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    • 100 $0.587
    • 1000 $0.481
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    Bristol Electronics CD74HCT107E 425
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    Rochester Electronics CD74HCT107E 26,205 1
    • 1 $0.5615
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    • 100 $0.5278
    • 1000 $0.4773
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    Find more HCT107 price and stock on Findchips.com

    HCT107 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74HC

    Abstract: TTL Schmitt-Trigger LOW POWER SCHOTTKY
    Text: Philips Semiconductors Product specification Dual JK flip-flop with reset; negative-edge trigger 74HC/HCT107 The 74HC/HCT107 are dual negative-edge triggered JK-type flip-flops featuring individual J, K, clock nCP and reset (nR) inputs; also complementary Q and Q outputs.


    Original     		PDF 74HC/HCT107 74HC/HCT107 74HC TTL Schmitt-Trigger LOW POWER SCHOTTKY

    74HC/HCT/HCU/HCMOS Logic Family Specifications

    Abstract: 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC 74HCT HCT107
    Text: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT107


    Original     		PDF 74HC/HCT/HCU/HCMOS 74HC/HCT107 74HC/HCT107 74HC/HCT/HCU/HCMOS Logic Family Specifications 74HC/HCT/HCU/HCMOS Logic Package Information IC06 74HC/HCT/HCU/HCMOS Logic Package Information 74HC 74HCT HCT107

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 HC/HCT107

    CD74HCT107

    Abstract: CD54HC107F3A CD54HCT107F3A CD74HC107E HC107 HCT10
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/HCT107 Data sheet acquired from Harris Semiconductor SCHS139B Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised December 2002


    Original     		PDF HC107 HCT10 CD54/74HC107, CD54/74HCT107 SCHS139B HC107 HCT107 CD74HCT107 CD54HC107F3A CD54HCT107F3A CD74HC107E HCT10

    HC-107

    Abstract: HC107
    Text: [ /Title CD74 HC107 , CD74 HCT10 7 /Subject (Dual J-K FlipFlop with Reset Negative- CD54/74HC107, CD54/HCT107 Data sheet acquired from Harris Semiconductor SCHS139A Dual J-K Flip-Flop with Reset Negative-Edge Trigger March 1998 - Revised May 2000 Features


    Original     		PDF HC107 HCT10 CD54/74HC107, CD54/74HCT107 SCHS139A HC107 HCT107 HC-107

    CD54HC73

    Abstract: CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M CD74HCT73 HC73
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF HCT73 CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 CD54HC73 CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M HC73

    CD54HC73

    Abstract: CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M CD74HCT73 HC73
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF HCT73 CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 CD54HC73 CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M HC73

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 HC/HCT107

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134C Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised January 2003 Features Description • Hysteresis on Clock Inputs for Improved Noise


    Original     		PDF CD54/74HC73, CD74HCT73 SCHS134C CD74HCT73 HC/HCT107 59628515301CA CD54HC73F CD54HC73F3A 5962View 8515301CA

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134C Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised January 2003 Features Description • Hysteresis on Clock Inputs for Improved Noise


    Original     		PDF CD54/74HC73, CD74HCT73 SCHS134C CD74HCT73 HC/HCT107

    CD54HC73

    Abstract: CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M CD74HCT73 HC73
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF HCT73 CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 CD54HC73 CD54HC73F3A CD74HC73 CD74HC73E CD74HC73M HC73

    Untitled

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54HC73, CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134E Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised September 2003 Features Description


    Original     		PDF CD54HC73, CD74HC73, CD74HCT73 SCHS134E CD74HCT73 HC/HCT107

    Untitled

    Abstract: No abstract text available
    Text: CD74HC73, CD74HCT73 S E M I C O N D U C T O R Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times The Harris CD74HC73 and CD74HCT73 utilize silicon gate


    Original     		PDF CD74HC73, CD74HCT73 CD74HC73 CD74HCT73 HC/HCT107 74HCT 1-800-4-HARRIS

    74HCT

    Abstract: 74LS CD74HC73 CD74HC73E CD74HCT73 CD74HCT73E HC73
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134 Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise


    Original     		PDF HCT73 CD74HC73, CD74HCT73 SCHS134 CD74HC73 CD74HCT73 74HCT 74LS CD74HC73E CD74HCT73E HC73

    74HC73

    Abstract: No abstract text available
    Text: [ /Title CD74 HC73, CD74 HCT73 /Subject (Dual J-K FlipFlop CD54/74HC73, CD74HCT73 Data sheet acquired from Harris Semiconductor SCHS134A Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 - Revised May 2000 Features Description • Hysteresis on Clock Inputs for Improved Noise


    Original     		PDF CD54/74HC73, CD74HCT73 SCHS134A CD74HCT73 HC/HCT107 SZZU001B, SDYU001N, SCET004, SCAU001A, CD74HCT73E 74HC73

    Untitled

    Abstract: No abstract text available
    Text: 74HC/HCT107 flip-flops D U A L JK FLIP-F LO P W ITH R E SE T ; N E G A T IV E -E D G E T R IG G E R FEATURES T Y P IC A L • Output capability: standard • I q q category: flip-flops SYM BO L T h e reset {n R is an asy n ch ron ou s active L O W input. W hen L O W , it overrides the


    OCR Scan     		PDF 74HC/HCT107

    Untitled

    Abstract: No abstract text available
    Text: High-Reliability High-Speed CMOS Logic ICs CD54HC107/3A HCT107/3A Burn-ln Test-Circuit Connections Static OPEN CD54HC/HCT107 2,3,5,6 Dynamic GROUND OPEN CD54HC/HCT107 Use Static II for /3A burn-in and Dynamic for Life Test. STATIC BURN-IN I Vcc(6V) GROUND


    OCR Scan     		PDF CD54HC107/3A CD54HCT107/3A CD54HC/HCT107 2k-47k CD54HC109/3A CD54HCT109/3A RCA-CD54HC109 CD54HCT109 CD54HC112/3A

    220 NK

    Abstract: 74HC 74HCT 7Z9319
    Text: 74HC/HCT107 flip-flops DUAL JK FLIP-FLOP WITH RESET; NEGATIVE-EDGE TRIGGER FEATURES • • TYPICAL Output capability: standard ICC category: flip-flops GENERAL DESCRIPTION The 74HC/HCT107 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky


    OCR Scan     		PDF 74HC/HCT107 220 NK 74HC 74HCT 7Z9319

    Untitled

    Abstract: No abstract text available
    Text: 74HC/HCT107 fiip-fiops DUAL JK FLIP-FLOP WITH RESET; NEGATIVE-EDGE TRIGGER FEA TU R E S • • TYPICAL O utput capability: standard I q c category: flip-flops SYMBOL The 74HC/HCT107 are dual negativeedge triggered JK-type flip-flops _ featuring individual J, K, clock nCP


    OCR Scan     		PDF 74HC/HCT107 74HC/HCT107

    BPW22A

    Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
    Text: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey


    OCR Scan     		PDF BS9000, D3007 HE4000B 80RIBUTION BS9000 BPW22A cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8

    Untitled

    Abstract: No abstract text available
    Text: INTEGRATED CIRCUITS [M m S P I E 74LV107 Dual JK flip-flop with reset; negative-edge trigger Product specification Supersedes data of 1997 Feb 03 IC24 Data Handbook Philips Semiconductors 1998 Apr 20 PHILIPS Philips Semiconductors Product specification Dual JK flip-flop with reset; negative-edge trigger


    OCR Scan     		PDF 74LV107 74LV107

    Untitled

    Abstract: No abstract text available
    Text: CD74HC73, CD74HCT73 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Semiconductor SCHS134 Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times


    OCR Scan     		PDF CD74HC73, CD74HCT73 SCHS134 CD74HC73 CD74HCT73

    74LV107

    Abstract: 74LV107D 74LV107DB 74LV107N
    Text: Philips Semiconductors Product Specification Dual JK flip-flop with reset; negative-edge trigger FEATURES • • • • • • 74LV107 QUICK REFERENCE DATA GNP = 0 V; T*, = 25 °C; t, = t, < 2.5 ns Optimized fo r Low Voltage applications: 1.0 to 3.6 V


    OCR Scan     		PDF 74LV107 74LV107 74HC/HCT107. 711062b 74LV107D 74LV107DB 74LV107N

    HS-134

    Abstract: No abstract text available
    Text: CD74HC73, CD74HCT73 ^ Texas In s t r u m e n t s Data sheet acquired from Harris Sem iconductor SC HS134 Dual J-K Flip-Flop with Reset Negative-Edge Trigger February 1998 Features Description • Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times


    OCR Scan     		PDF HS134 CD74HC73, CD74HCT73 CD74HC73 CD74HCT73 HC/HCT107 HS-134