FPGA 144 CPGA 172 PLCC ASIC Search Results

FPGA 144 CPGA 172 PLCC ASIC Result Highlights (5)

Part	Manufacturer	Description
TE512S32-25LC	Rochester Electronics LLC	TE512S32 - Field Programmable Gate Array, CMOS, PQFP128
TE505S16-40QC-G	Rochester Electronics LLC	TE505S16 - Field Programmable Gate Array, CMOS, PQFP208
TE505S16-40QI	Rochester Electronics LLC	TE505S16 - Field Programmable Gate Array, CMOS, PQFP208
TE505S16-25QC-G	Rochester Electronics LLC	TE512S32 - Field Programmable Gate Array, CMOS
TE512S32-40LC	Rochester Electronics LLC	TE512S32 - Field Programmable Gate Array, CMOS, PQFP128

FPGA 144 CPGA 172 PLCC ASIC Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
verilog code for histogram Abstract: verilog hdl code for multiplexer 4 to 1 FPGA 144 CPGA 172 PLCC ASIC cmos logic 4000 series 5-input-XOR verilog code for pci to pci bridge verilog code for johnson counter vhdl code for multiplexer 16 to 1 using 4 to 1 3 to 8 line decoder vhdl IEEE format QL2003 Text: QuickLogic Corporation provides very-high-speed programmable ASIC solutions for designers of high-performance systems who must get their products to market quickly. The company was founded by the engineers who invented the PAL device and PALASM software. Through fast time-to-market, low development	Original	RS-232 verilog code for histogram verilog hdl code for multiplexer 4 to 1 FPGA 144 CPGA 172 PLCC ASIC cmos logic 4000 series 5-input-XOR verilog code for pci to pci bridge verilog code for johnson counter vhdl code for multiplexer 16 to 1 using 4 to 1 3 to 8 line decoder vhdl IEEE format QL2003	PDF
5-input-XOR Abstract: verilog code for correlate verilog code for pci express schematic XOR Gates pASIC 1 Family 3-input-XOR FPGA 144 CPGA 172 PLCC ASIC antifuse programming technology TRANSISTOR D 1978 verilog code for pci Text: 7-31 Leading The Revolution in FPGAs 7-32 1993 1994 1995 1996 1997 1998 1999 2000 SPLD CPLD* FPGA • * = CPLD numbers include FLEX 8000 Source: Pace Technologies, Feb ‘96 PLD Market will see a 25% compound growth, reaching $6.7B in the year 2000, ■ FPGAs will see a compound growth rate of 27%, reaching $3.0B by the year 2000	Original		PDF
cnc router plan Abstract: 68 pin plcc socket cnc schematic knew 2033 Text: ‘ s Welcome to our First Issue! Welcome to QuickNews - QuickLogic’s quarterly user’s newsletter. In this issue you will be introduced to our Customer Engineering and Customer Service groups if you haven’t already met us in person! . Hopefully, we	Original	QP-CG4144 QL16X24B QP-PF4144 QP-CF4160 1-800832-FPGA cnc router plan 68 pin plcc socket cnc schematic knew 2033	PDF
vhdl code dds Abstract: PL84 chip dmd ti dlp vhdl code direct digital synthesizer QAN19 QL16x24BL QD-PQ208 dlp dmd chip sequential multiplier Vhdl 8 bit sequential multiplier VERILOG Text: ‘s 'HVN,- 3URJUDPPHU [SDQGV 3URJUDPPLQJ &DSDELOLW\ With the introduction of the first DeskFabTM Multisite Programming Adapter, QuickLogic has expanded the programming capability of its DeskFab Programmer to support volume programming of pASIC 2 devices. Multisite adapters allow	Original	208-pin QL2005 PB256 QL2003 QL2005 QP-PL44 QP-PL68 QP-CG68 QP-PF100 vhdl code dds PL84 chip dmd ti dlp vhdl code direct digital synthesizer QAN19 QL16x24BL QD-PQ208 dlp dmd chip sequential multiplier Vhdl 8 bit sequential multiplier VERILOG	PDF
aldec g2 Abstract: No abstract text available Text: Military QuickRAM Family Data Sheet • • • • • • Up to 90,000 Usable PLD Gates QuickRAM Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density • Up to 90,000 usable PLD gates with up to 316 I/Os • 300 MHz 16-bit counters, 400 MHz datapaths,	Original	16-bit aldec g2	PDF
QL4016 Abstract: QL4016-1CF100M QL4016-1CG84M QL4016-1PL84C QL4036-1PF144C QL4036-1PQ208C QL4090 QL4090-1PQ208C CQFP 240 aldec g2 Text: Military QuickRAM Family Data Sheet •••••• Up to 90,000 Usable PLD Gates QuickRAM Combining Performance, Density and Embedded RAM Device Highlights High Performance & High Density • Up to 90,000 usable PLD gates with up to 316 I/Os • 300 MHz 16-bit counters, 400 MHz datapaths,	Original	16-bit QL4016 QL4016-1CF100M QL4016-1CG84M QL4016-1PL84C QL4036-1PF144C QL4036-1PQ208C QL4090 QL4090-1PQ208C CQFP 240 aldec g2	PDF
programmer manual EPLD cypress Abstract: pASIC380 programming manual EPLD CY7C383A GAL programmer schematic Text: filename: Tuesday, August 11, 1992 Revision: October 9, 1995 pASIC380 Family UltraLogict Very High Speed CMOS FPGAs D Robust routing resources Features D Very high speed D D D D D D D Ċ Loadable counter frequencies greater than 150 MHz Ċ ChipĆtoĆchip operating frequencies	Original	pASIC380 16bit programmer manual EPLD cypress pASIC380 programming manual EPLD CY7C383A GAL programmer schematic	PDF
CY7C387P-1AC Abstract: CY7C387P-1AI CY7C387P-2AC CY7C387P-2AI CY7C388P-0NI U208 Text: 7C387P/8a: Tuesday, May 24, 1994 Revision: October 23, 1995 CY7C387P CY7C388P UltraLogict Very High Speed 8K Gate CMOS FPGA D Low power, high output drive Features Ċ Standby current typically 2 mA Ċ 16Ćbit counter operating at 100 MHz consumes 50 mA Ċ Minimum IOL and IOH of 20 mA	Original	7C387P/8a: CY7C387P CY7C388P 16bit CY7C387P-1AC CY7C387P-1AI CY7C387P-2AC CY7C387P-2AI CY7C388P-0NI U208	PDF
m6845 Abstract: NA51 transistor AMI 52 732 V DL651 M82530 MXI21 dl541 DF421 DF101 grid tie inverter schematics Text: “The new 0.6µm gate array and standard cell families from AMI provide outstanding quality and selection . . . setting performance standards in 0.6µm ASIC products . . . ” • 130 ps gate delays fanout = 2, interconnect length = 0mm ■ Double and Triple Metal Interconnect; up to 900,000 gate	Original	Table128, m6845 NA51 transistor AMI 52 732 V DL651 M82530 MXI21 dl541 DF421 DF101 grid tie inverter schematics	PDF
132-PIN CERAMIC PIN GRID ARRAY CPGA Abstract: A3265DX Actel A1240 WD109 A1225XL A1240XL A1280XL A32100DX A32140DX A32200DX Text: Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM	Original	1200XL 3200DX 132-PIN CERAMIC PIN GRID ARRAY CPGA A3265DX Actel A1240 WD109 A1225XL A1240XL A1280XL A32100DX A32140DX A32200DX	PDF
PQFP 176 Abstract: No abstract text available Text: Military Plastic pASIC 3 Family 60,000 Usable PLD Gate pASIC3 FPGA Combining High Performance and High Density last updated 5/4/2000 Military pASIC 3 - 3.3V Family DEVICE HIGHLIGHTS FEATURES Device Highlights Features High Performance and High Density Total of 180 I/O pins	Original	16-bit 456-PBGA PQ208 84-pin PQ208 208-pin PQFP 176	PDF
CI 3060 elsys Abstract: 84-PIN QL3012 QL3025 QL3040 QL3060 QL3060-1PQ208M Text: Military Plastic pASIC 3 Family 60,000 Usable PLD Gate pASIC3 FPGA Combining High Performance and High Density Military pASIC 3 - 3.3V Family DEVICE HIGHLIGHTS FEATURES Device Highlights Features High Performance and High Density Total of 180 I/O pins •	Original	16-bit 456-PBGA PQ208 84-pin PQ208 208-pin CI 3060 elsys QL3012 QL3025 QL3040 QL3060 QL3060-1PQ208M	PDF
A1280XL Abstract: rq20 A1225XL A1240XL A32100DX A32140DX A32200DX A32300DX A3265DX actel a1240 Text: Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM	Original	1200XL 3200DX 172-Pin 172-Pin A1280XL rq20 A1225XL A1240XL A32100DX A32140DX A32200DX A32300DX A3265DX actel a1240	PDF
A1240XL Abstract: actel a1240 CQFP 172 PIN A3265DX actel cqfp 84 Text: BACK Integrator Series FPGAs – 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, IST, Mentor Graphics, Synopsys and Viewlogic • JTAG 1149.1 Boundary Scan Testing High Capacity • • • • 2,500 to 40,000 logic gates Up to 4 Kbits configurable dual-port SRAM	Original	1200XL 3200DX 35-bit 172-Pin A1240XL actel a1240 CQFP 172 PIN A3265DX actel cqfp 84	PDF

Actel a1280 Abstract: VKS FPGA CQFP 106 wd5080 74 series family A1280 A32200DX-RQ208 Actel A1225 A1225XL A1240XL A1280XL Text: v3.0 Integrator Series FPGAs: 1200XL and 3200DX Families Fe a t ur es G en er al D e sc r i p t i on High C apaci t y Actel’s Integrator Series FPGAs are the first programmable logic devices optimized for high-speed system logic integration. Based on Actel’s proprietary antifuse	Original	1200XL 3200DX Actel a1280 VKS FPGA CQFP 106 wd5080 74 series family A1280 A32200DX-RQ208 Actel A1225 A1225XL A1240XL A1280XL	PDF
actel a1240 Abstract: No abstract text available Text: Advanced 3.0 Integrator Series FPGAs: 1200XL and 3200DX Families Fe a t ur es • IEEE Standard 1149.1 JTAG Boundary Scan Testing. High C apaci t y • • • • G en er al D e sc r i p t i on 2,500 to 30,000 Logic Gates Up to 3Kbits Configurable Dual-Port SRAM	Original	1200XL 3200DX 35-Bit actel a1240	PDF
FPGA 144 CPGA 172 PLCC ASIC Abstract: A144 CY7C386A CY7C387A CY7C387A-2GC CY7C388A CY7C387A2AI Text: CY7C387A CY7C388A PRELIMINARY CYPRESS Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum I o l of 12 mA and Ioh °f • Very high speed — Loadable counter frequencies greater than 100 MHz — Chip-to-chip operating frequencies	OCR Scan	CY7C387A CY7C388A 145-pin 245-pin 144-pin 208-pin 160-pin 225-pin 16-bit FPGA 144 CPGA 172 PLCC ASIC A144 CY7C386A CY7C387A-2GC CY7C388A CY7C387A2AI	PDF
btd 41 Abstract: 160LEAD CPGA schematics Text: CY7C385A CY7C386A ^ CYPRESS Very High Speed 4K 12K Gate CMOS FPGA — Fast, fully automatic place and route — Waveform simulation with back an notated net delays — PC and workstation platforms Robust routing resources — Fully automatic place and route of	OCR Scan	CY7C385A CY7C386A 84-pin 100-pin 144-pin 145-pin 160-pin 16-bit CY7C386Aâ btd 41 160LEAD CPGA schematics	PDF
U208 Abstract: A144 CY7C386P CY7C387P CY7C388P G223 Text: CY7C387P CY7C388P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,	OCR Scan	CY7C387P CY7C388P 144-pin 208-pin 223-pin CY7C388P- CY7C388P-0GMB CY7C388P-0UMB U208 A144 CY7C386P CY7C388P G223	PDF
A144 Abstract: G223 U208 Text: CY7C387P CY7C388P CYPRESS Features • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies up to 110 MHz — Input + logic cell + output delays under 6 ns • Unparalleled FPGA performance for counters, data path, state machines,	OCR Scan	CY7C387P CY7C388P 144-pin 208-pin 223-pin 16-bit CY7C388P- A144 G223 U208	PDF
P/N146071 Abstract: No abstract text available Text: /u o o /d /o d . 1»»*+ lu w ò u d y , iv id y Revision: Friday, June 24,1994 3f CYPRESS PRELIMINARY Very High Speed 8K 24K Gate CMOS FPGA — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iol of 12 mA and Ioh of 8mA • Flexible logic cell architecture	OCR Scan	16-bit P/N146071	PDF
Untitled Abstract: No abstract text available Text: CY7C387A CY7C388A ¿r C Y P R E S S Very High Speed 8K 24K Gate CMOS FPGA Features — 16-bit counter operating at 100 MHz consumes 50 mA — Minimum Iql of 12 mA and Iqh of 8 mA • Very high speed — Loadable counter frequencies greater than 150 MHz — Chip-to-chip operating frequencies	OCR Scan	CY7C387A CY7C388A 145-pin 144-pin 208-pin 160-pin 16-bit	PDF
pioneer PAL 005 A Abstract: K1603 FPGA 144 CPGA 172 PLCC ASIC VKS FPGA CQFP 106 8-bit interfacing ic 7447 AVNET uto 512 of 16-1 multiplexer BPW 40 pin connection in circuit Text: ACTLSOOl ACT 3 Field Programmable Gate Arrays Features Description • The ACT 3 family, based on Actel’s proprietary PLICE antifuse technology and 0.8-micron double-metal, double-poly CMOS process, offers a high-performance programmable solution capable of 167 MHz on-chip performance and 7.5 nanosecond	OCR Scan	20-pin pioneer PAL 005 A K1603 FPGA 144 CPGA 172 PLCC ASIC VKS FPGA CQFP 106 8-bit interfacing ic 7447 AVNET uto 512 of 16-1 multiplexer BPW 40 pin connection in circuit	PDF
Untitled Abstract: No abstract text available Text: I ntegrator Series FPGAs - 1200XL and 3200DX Fami Ies Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsysand Vi ewl ogi c • JTAG 1149.1 Boundary Scan Testing Features High C a p a c i t y • • • • 2,5001o 40,0001ogi c gat es Up to 4 Kbits configurable dual-port SRAM	OCR Scan	1200XL 3200DX 5001o MO-136	PDF

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FPGA 144 CPGA 172 PLCC ASIC Search Results

FPGA 144 CPGA 172 PLCC ASIC Result Highlights (5)

FPGA 144 CPGA 172 PLCC ASIC Datasheets Context Search

verilog code for histogram

5-input-XOR

cnc router plan

vhdl code dds

aldec g2

QL4016

programmer manual EPLD cypress

CY7C387P-1AC

m6845

132-PIN CERAMIC PIN GRID ARRAY CPGA

PQFP 176

CI 3060 elsys

A1280XL

A1240XL

Actel a1280

actel a1240

FPGA 144 CPGA 172 PLCC ASIC

btd 41

U208

A144

P/N146071

Untitled

pioneer PAL 005 A

Untitled