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    HSP43216

    Abstract: HSP43216JC-52 HSP43216VC-52 HSP45106 HSP45116 Q100 BOUT12
    Text: HSP43216 TM Data Sheet September 2000 File Number Halfband Filter Features The HSP43216 Halfband Filter addresses a wide variety of applications by combining fS/4 fS = sample frequency quadrature up/down convert circuitry with a fixed coefficient halfband filter processor as shown in the block diagram.


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    PDF HSP43216 HSP43216 HSP43216JC-52 HSP43216VC-52 HSP45106 HSP45116 Q100 BOUT12

    Untitled

    Abstract: No abstract text available
    Text: LF3304 LF3304 DEVICES INCORPORATED Dual Line Buffer/FIFO Dual Line Buffer/FIFO DEVICES INCORPORATED FEATURES DESCRIPTION ❑ 100 MHz Data Rate for Video and other High-Speed Applications ❑ One 24-bit, Two 12-bit, Three 8-bit Data Paths, or One Double Depth 12-bit


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    PDF LF3304 LF3304 12-bit AOUT10

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 25MHz 10-bit 12-bit 16-bit 20-bit 24-bit

    LF3312

    Abstract: LF3312BGC position sensitive diode circuit
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 25MHz 10-bit 12-bit 16-bit 20-bit 24-bit LF3312 LF3312BGC position sensitive diode circuit

    LF9502

    Abstract: LMU217 ACCM 5 pin digital video mixer - tbc power supply 5 Volt LF3347 9027 scl110 LF3310 LF3311
    Text: Company Profile LOGIC Devices Incorporated develops and markets high-performance integrated circuits that are utilized in a wide range of video and medical imaging processing, telecommunications, computing and military smart weapon applications. LOGIC Devices is commited to providing its customers with the highest performing


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    PDF 2002Short LF3310 LF3311 LF9502 LMU217 ACCM 5 pin digital video mixer - tbc power supply 5 Volt LF3347 9027 scl110 LF3310 LF3311

    LF3312

    Abstract: DSA00113352
    Text: Image Manipulation - Reflect Image on Vertical Axis DEVICES INCORPORATED Video Memory Application Note FRAME MEMORY Overview With the LF3312’s flexible memory address architecture, data can be sequentially stored in memory and then accessed using a completely reordered address. An application such as creating the ‘mirror image’ of a frame of


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    PDF LF3312 BIN11 BOUT11 DSA00113352

    LF3312 m

    Abstract: LF3312 LF3312BGC
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 25MHz 10-bit 12-bit 16-bit 20-bit 24-bit LF3312 m LF3312 LF3312BGC

    Tuner sharp QPSK

    Abstract: 9031 code fir filter Numerically Controlled Oscillator HSP50210 HSP50214 HSP50214VC HSP50214VI
    Text: February 2000 Programmable Downconverter Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts digitized IF data into filtered baseband data which can be


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    PDF HSP50214 100dB 255-Tap 625kHz Tuner sharp QPSK 9031 code fir filter Numerically Controlled Oscillator HSP50210 HSP50214VC HSP50214VI

    Untitled

    Abstract: No abstract text available
    Text: STV9556 7.5 NS TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER PRELIMINARY DATA above is required, ensuring a maximum quality of the still pictures or moving video. Perfecly matched with the STV921x ST preamplifiers, it provides a highly performant and very cost effective video system.


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    PDF STV9556 STV921x

    Untitled

    Abstract: No abstract text available
    Text: STV9555 9.5 ns TRIPLE-CHANNEL HIGH VOLTAGE VIDEO AMPLIFIER above is required, ensuring a maximum quality of the still pictures or moving video. Perfecly matched with the STV921x ST preamplifiers, it provides a highly performant and very cost effective video system.


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    PDF STV9555 STV921x

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel) • 1,036,800 x 12-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 10-bit 12-bit 16-bit 20-bit 24-bit

    tuner 3402

    Abstract: HSP50210 HSP50214B HSP50214BVC HSP50214BVI
    Text: HSP50214B Semiconductor Data Sheet February 1999 File Number 4450.2 Programmable Downconverter Features The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The


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    PDF HSP50214B HSP50214B 55MHz 14-bit tuner 3402 HSP50210 HSP50214BVC HSP50214BVI

    Untitled

    Abstract: No abstract text available
    Text: HSP50214B S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55MHz Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous • Processing Capable of >100dB SFDR


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    PDF HSP50214B HSP50214B 14-bit 255-ts 1-800-4-HARRIS

    96330

    Abstract: No abstract text available
    Text: HSP50214A S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 65 MSPS Front-End Processing Rates CLKIN and 55 MSPS (41 MSPS Using the Discriminator) Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous


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    PDF HSP50214A HSP50214A 14-bit 255-RL 96330

    LF3304QC12G

    Abstract: LF3304
    Text: LF3304 LF3304 DEVICES INCORPORATED Dual Line Buffer/FIFO Dual Line Buffer/FIFO DEVICES INCORPORATED FEATURES DESCRIPTION 100 MHz Data Rate for Video and other High-Speed Applications One 24-bit, Two 12-bit, Three 8-bit Data Paths, or One Double Depth 12-bit


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    PDF LF3304 24-bit, 12-bit, 12-bit 100-lead LF3304 12-bit LF3304QC12G

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 25MHz 10-bit 12-bit 16-bit 20-bit 24-bit

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Advance Information Features 12,441,600-bit Frame Memory May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel) • 1,036,800 x 12-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 10-bit 12-bit 16-bit 20-bit 24-bit

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel) • 1,036,800 x 12-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 10-bit 12-bit 16-bit 20-bit 24-bit

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet AR Y Features EL IM IN 12,441,600-bit Frame Memory May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 10-bit 12-bit 16-bit 20-bit 24-bit

    LF3304

    Abstract: No abstract text available
    Text: LF3304 LF3304 DEVICES INCORPORATED Dual Line Buffer/FIFO Dual Line Buffer/FIFO DEVICES INCORPORATED DESCRIPTION ❑ One 12-bit, One 24-bit, Two 12-bit, or Three 8-bit Data Paths ❑ Dual Mode: Line Buffer or FIFO ❑ User-Programmable FIFO Flags ❑ User-Resettable Read and Write


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    PDF LF3304 12-bit, 24-bit, 100-lead LF3304 AOUT11-0 BOUT11-0

    HSP43216

    Abstract: HSP43216GC-52 HSP43216JC-52 HSP43216VC-52 HSP45106 HSP45116 Q100
    Text: HSP43216 Data Sheet January 1999 File Number Halfband Filter Features The HSP43216 Halfband Filter addresses a wide variety of applications by combining fS/4 fS = sample frequency quadrature up/down convert circuitry with a fixed coefficient halfband filter processor as shown in the block diagram.


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    PDF HSP43216 HSP43216 HSP43216GC-52 HSP43216JC-52 HSP43216VC-52 HSP45106 HSP45116 Q100

    transistor EN 13003 A

    Abstract: sw 13003 transistor EN 13003 X 13003 AL 13003 70 13003 complement 47-16 n2 LG 631 IC 13003 application notes ISL5416
    Text: ISL5416 Data Sheet February 2003 Four-Channel Wideband Programmable DownConverter FN6006.2 Features • Up to 95MSPS Input The ISL5416 Four-Channel Wideband Programmable Digital DownConverter WPDC is designed for high dynamic range applications such as cellular basestations where the


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    PDF ISL5416 FN6006 95MSPS ISL5416 16-bit 17-bit 32-Bit 110dB 20-bit transistor EN 13003 A sw 13003 transistor EN 13003 X 13003 AL 13003 70 13003 complement 47-16 n2 LG 631 IC 13003 application notes

    Untitled

    Abstract: No abstract text available
    Text: LF3312 12-Mbit Frame Buffer / FIFO DEVICES INCORPORATED Preliminary Datasheet Features 12,441,600-bit Frame Memory 74.25MHz Max Data Rate May be Organized Into the Following Configurations: • 1,555,200 x 8-bit single channel • 1,244,160 x 10-bit (single channel)


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    PDF LF3312 12-Mbit 600-bit 25MHz 10-bit 12-bit 16-bit 20-bit 24-bit

    Untitled

    Abstract: No abstract text available
    Text: HSP50214 HARRIS S E M I C O N D U C T O R Programmable Downconverter February 1998 Features Description • Up to 52 MSPS Front-End Processing Rates CLKIN and 35 MSPS Back-End Processing Rates (PROCCLK) Clocks May Be Asynchronous The HSP50214 Programmable Downconverter converts


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    PDF HSP50214 HSP50214 100dB 255-Tap 1-800-4-HARRIS