cy7c136
Abstract: EME-6300H CY7C13X
Text: Qualification Report January 1996 QTP# 95152/95487, Version 1.0 2K/1K x 8 Dual-Port Static RAM MARKETING PART NUMBER DEVICE DESCRIPTION CY7C130/131 1K x 8 Dual-Port Static RAM CY7C140/141 1K x 8 Dual-Port Static RAM CY7C132/142 2K X 8 Dual-Port Static RAM
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CY7C130/131
CY7C140/141
CY7C132/142
CY7C136/146
CY7C136
CY7C136-JC
CY7C13X
CY7C14X
cy7c136
EME-6300H
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IR5L
Abstract: PLCC-44 cr16 AR10-AR0 CMOS 16-Bit Priority Encoder QS761480 QS762470 44-PIN MU9C1 ST27-ST16 0804H
Text: QS761480, QS762470 High-Speed CMOS 1k x 64, 2k x 64 Content-Addressable Memory QCAM QUALITY Associative Processor SEMICONDUCTOR, INC. Q QS761480 QS762470 FEATURES DESCRIPTION • 1k/2k x 64 CAM architecture The QS761480 and QS762470 is a family of 1k and
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QS761480,
QS762470
QS761480
QS761480
QS762470
64-bit
16-bit
MU9C1480/A
MU9C2480/A
IR5L
PLCC-44 cr16
AR10-AR0
CMOS 16-Bit Priority Encoder
44-PIN
MU9C1
ST27-ST16
0804H
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XA-G37
Abstract: SCR Handbook, General electric
Text: INTEGRATED CIRCUITS XA-G39 XA 16-bit microcontroller family 32K FLASH/1K RAM, watchdog, 2 UARTs Preliminary data Philips Semiconductors 2002 Mar 13 Philips Semiconductors Preliminary data XA 16-bit microcontroller family 32K Flash/1K RAM, watchdog, 2 UARTs
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XA-G39
16-bit
XA-G39
80C51
XA-G37
SCR Handbook, General electric
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Untitled
Abstract: No abstract text available
Text: 8 BIT SINGLE CHIP MICROCONTROLLER LC875532A/24A/16A Preliminary LC875532A 8-Bit Single Chip Microcontroller incorporating 32K-byte ROM and 1K-byte RAM on chip. LC875524A 8-Bit Single Chip Microcontroller incorporating 24K-byte ROM and 1K-byte RAM on chip.
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LC875532A
LC875532A/24A/16A
32K-byte
LC875524A
24K-byte
LC875516A
16K-byte
LC875532A,
LC875524A,
LC875516A
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CY7C421-40JI
Abstract: CY7C425 CY7C419 CY7C420 CY7C421
Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features Functional Description • Asynchronous First-In First-Out FIFO Buffer Memories ❐ 256 x 9 (CY7C419) ❐ 512 x 9 (CY7C421) ❐ 1K x 9 (CY7C425)
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CY7C419/21/25/29/33256/512/1K/2K/4K
CY7C419/21/25/29/33
256/512/1K/2K/4K
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil,
600-mil
CY7C421-40JI
CY7C425
CY7C419
CY7C420
CY7C421
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DATASHEET AM7202
Abstract: CY7C429-20JC 330 j65 CY7C433-30JI CY7C425 CY7C433-30JC CY7C429-15JI CY7C419 CY7C421 CY7C429
Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)
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CY7C419/21/25/29/33256/512/1K/2K/4K
CY7C419/21/25/29/33
256/512/1K/2K/4K
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil
600-mil
DATASHEET AM7202
CY7C429-20JC
330 j65
CY7C433-30JI
CY7C425
CY7C433-30JC
CY7C429-15JI
CY7C419
CY7C421
CY7C429
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C1303
Abstract: CY7C131 CY7C130 CY7C140 CY7C141
Text: 40 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C130/CY7C131
CY7C140/CY7C141
65-micron
CY7C130/CY7C131
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
C1303
CY7C131
CY7C130
CY7C140
CY7C141
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CY7C425
Abstract: CY7C419 CY7C421 CY7C429 CY7C433 IDT7200 IDT7201 IDT7202
Text: CY7C419/21/25/29/33256/512/1K/2K/4K x 9 Asynchronous FIFO CY7C419/21/25/29/33 256/512/1K/2K/4K x 9 Asynchronous FIFO Features • Asynchronous first-in first-out FIFO buffer memories • 256 x 9 (CY7C419) • 512 x 9 (CY7C421) • 1K x 9 (CY7C425) • 2K x 9 (CY7C429)
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CY7C419/21/25/29/33256/512/1K/2K/4K
CY7C419/21/25/29/33
256/512/1K/2K/4K
CY7C419)
CY7C421)
CY7C425)
CY7C429)
CY7C433)
300-mil
600-mil
CY7C425
CY7C419
CY7C421
CY7C429
CY7C433
IDT7200
IDT7201
IDT7202
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PLCC-52
Abstract: CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-25JC CY7C131-35J Z1014
Text: CY7C130, CY7C130A CY7C131, CY7C131A CY7C140, CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True dual-ported memory cells, which allow simultaneous reads of the same memory location ■ 1K x 8 organization ■ 0.65 micron CMOS for optimum speed and power
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CY7C130,
CY7C130A
CY7C131,
CY7C131A
CY7C140,
CY7C141
CY7C130/130A/CY7C131/131A/CY7C140
CY7C130/130A/
CY7C131/131A
PLCC-52
CY7C130
CY7C131
CY7C140
CY7C141
CY7C131-25JC
CY7C131-35J
Z1014
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7C130
Abstract: 7c131 CY7C130 CY7C131 CY7C140 CY7C141 CY7C131-55JXC CY7C131-55NXC MIL-STD-183 Z1014
Text: CY7C130, CY7C130A CY7C131, CY7C131A 1K x 8 Dual-Port Static RAM Features Functional Description The CY7C130/130A/CY7C131/131A/CY7C140[1] and CY7C141 are high speed CMOS 1K by 8 dual-port static RAMs. Two ports are provided permitting independent access to any location in
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CY7C130,
CY7C130A
CY7C131,
CY7C131A
CY7C130/130A/CY7C131/131A/CY7C140
CY7C141
CY7C130/130A/
CY7C131/131A
CY7C140/CY7C141
16-bit
7C130
7c131
CY7C130
CY7C131
CY7C140
CY7C141
CY7C131-55JXC
CY7C131-55NXC
MIL-STD-183
Z1014
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Untitled
Abstract: No abstract text available
Text: 1KLoader User Guide Downloader for DSP-1K Development System ver 08.00a 1KLoader User Guide Invoking the Downloader To invoke the downloader from the command line, type: 1KLoader object_filename RAM_space [COM1|COM2|COM3|COM4] where, object_filename is the name of the DSP-1K Object file to download
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1KLOADER-1103
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CY7C130
Abstract: CY7C131 CY7C140 CY7C141
Text: CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static RAM Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power • High-speed access: 15 ns
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CY7C130/CY7C131
CY7C140/CY7C141
65-micron
CY7C130/CY7C131
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
CY7C130
CY7C131
CY7C140
CY7C141
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C1307
Abstract: cY7c131 I CY7C130 CY7C131 CY7C140 CY7C141 C130-15 C1303 C13017
Text: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C130/CY7C131
CY7C140/CY7C141
65-micron
CY7C130/CY7C131
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
C1307
cY7c131 I
CY7C130
CY7C131
CY7C140
CY7C141
C130-15
C1303
C13017
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C1303
Abstract: CY7C130 CY7C131 CY7C140 CY7C141 7c130 CY7C131-35JC C1307
Text: fax id: 5200 1CY 7C14 0 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Features Functional Description • True Dual-Ported memory cells which allow simultaneous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power
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CY7C130/CY7C131
CY7C140/CY7C141
65-micron
CY7C130/CY7C131
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
C1303
CY7C130
CY7C131
CY7C140
CY7C141
7c130
CY7C131-35JC
C1307
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cmos 16 bit counter
Abstract: Z89340 Z89462
Text: Consumer DSP Zilog Superintegration Pr oducts Guide DSP Core Block Diagram DSP Core 512 RAM 4K ROM/ EPROM 512 RAM 8K ROM/ EPROM 1K RAM Data 1K RAM (Program) GeneralPurpose I/O CODEC I/F 3 Timer/ Counter SPI 2 Timer/ Counter CODEC I/F APUs CODEC Interface
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Z89321/371/391
Z89462
Z89323/373/393
Z89340
16-Bit
Z89371-OTP
Z89391-ROMless
Z89373-OTP
Z89393-ROMless
cmos 16 bit counter
Z89340
Z89462
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B1317
Abstract: B1318 b1319 b1316 B1314 CY7B131
Text: CY7B131 CY7B141 1K x 8 DualĆPort Static RAM output enable OE . BUSY flags are proĆ Features Functional Description D The CY7B131 and CY7B141 are highĆ speed BiCMOS 1K by 8 dualĆport static RAMS. Two ports are provided to permit independent access to any location in
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CY7B131
CY7B141
CY7B131
CY7B141
16bit
B1317
B1318
b1319
b1316
B1314
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intel 16k 8bit RAM chip
Abstract: MCS15 MCS-151 100L 87L51FC 80C251SB 256-3 80C51GB 81c51 81C51SLAL
Text: MCS 251 microcontrollers Product ROM/ EPROM Bytes Register RAM (Bytes) Timer/ Serial Counters Port Analog I/O Input Pins Channels Speed (MHz) Process Package 87C251SA 8K 1K 3 1 32 16 CHMOS 87C251SB 16K 1K 3 1 32 16 87C251SP 8K 512 3 1 32 87C251SQ 16K 512
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87C251SA
87C251SB
87C251SP
87C251SQ
83C251SA
87C251SA,
83C251SB
87C251SB,
83C251SP
87C251SP,
intel 16k 8bit RAM chip
MCS15
MCS-151
100L
87L51FC
80C251SB
256-3
80C51GB
81c51
81C51SLAL
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52001HR
Abstract: IN3064 1K x 4 static ram ttl
Text: 52001 H 1K BIT 128 x 8 NVRAM Q 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit EEPROM Changes SRAM Cycle Time less than 300 ns Power-Failure Protection Unlimited Recall Cycles Memory Margining Capability
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52212HR
Abstract: IN3064 256X4 ncr 400 256x4 static ram
Text: C 52212 R 1K BIT 2 5 6 x 4 NVRAM 1K Bit Static RAM backed by 1K Bit Electrically Erasable PROM Fully 5V Only Operation Directly TTL Compatible In Circuit E2PROM Changes SRAM Cycle Time less than 300 ns • • • • Power-Failure Protection Unlimited Recall Cycles
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256x4)
52212HR
IN3064
256X4
ncr 400
256x4 static ram
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RJ017
Abstract: 2Kx36 LL014
Text: 1K x 36 2K x 36 CMOS DUAL-PORT STATIC RAM MODULE PRELIMINARY IDT7M1011 IDT7M1012 FEATURES DESCRIPTION • T h e ID T 7 M 1 0 1 1/1 012 are 1K/2K x 36 high speed C M O S Dual-Port static RAM modules constructed on a co-fired ceram ic substrate using 4 ID T 7 0 1 0 1K x 9 Dual-Port RAMs
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IDT7M1011
IDT7M1012
121-pin
IDT7M1011/1012
IDT7010
IDT7M1011/1DT7M1012
MIL-STD883,
7M1011
7M1012
RJ017
2Kx36
LL014
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3246A
Abstract: No abstract text available
Text: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 CYPRESS 1K x 8 Dual-Port Static RAM Functional Description Features True Dual-Ported memory ceils which allow simulta neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power
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PDF
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65-micron
CY7C130/CY7C131
CY7C140/CY7C141
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
IDT713CVIDT7140
3246A
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Untitled
Abstract: No abstract text available
Text: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 W CYPRESS 1K x 8 Dual-Port Static Ram Features Functional Description True Dual-Ported memory cells which allow simulta neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power
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130/C
140/C
65-micron
CY7C130/CY7C131
CY7C140/CY7C141
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
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MK4118
Abstract: MK4118A-2 MK4118A MOSTEK ROM mk4801
Text: MOSTEK MEMORY COMPONENTS 1K x 8-Bit Static RAM MK4118A/M K4801 A P /J/N Series FEATURES □ MKB version screened to MIL-STD-883 □ Static operation Part No. □ Organization: 1K x 8 bit RAM JEDEC pinout Access Time R /W Cycle Time □ High performance
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OCR Scan
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MK4118A/MK4801
MIL-STD-883
MK4118A-1
MK4118A-2
MK4118A-3
MK4118A-4
MK4118A
MK4118
MOSTEK ROM
mk4801
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893Q
Abstract: CY7C131-55JI bit-slice t913 CY7C1312
Text: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 1K x 8 Dual-Port Static Ram Featu res Functional Description • True Dual-Ported memory cells which allow sim ulta neous reads of the same memory location • 1K x 8 organization • 0.65-micron CMOS for optimum speed/power
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PDF
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CY7C130/CY7C131
CY7C140/CY7C141
65-micron
Y7C140/CY7C141
CY7C130/CY7C131;
48-pin
CY7C130/140)
52-pin
893Q
CY7C131-55JI
bit-slice
t913
CY7C1312
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