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    XC2VP125 Search Results

    XC2VP125 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    XC2VP125 Xilinx Virtex-ii Pro Field Programmable Gate Array Original PDF

    XC2VP125 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    PPC405

    Abstract: XAPP655 XC2VP125 Virtex-II Platform FPGA Complete All Four Module "routing tables"
    Text: Application Note: Virtex-II Pro Family R Mixed-Version IP Router MIR Author: Gordon Brebner XAPP655 (v1.0) November 19, 2002 Summary This application note describes a reference design for a mixed-version IP router (MIR) servicing up to four gigabit Ethernet ports. MIRs are useful where several gigabit Ethernet networks are


    Original     		XAPP655 PPC405 XAPP655 XC2VP125 Virtex-II Platform FPGA Complete All Four Module "routing tables" PDF

    Untitled

    Abstract: No abstract text available
    Text: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded


    Original     		DS083-1 18-bit FF1148) FF1517) FF1696) DS083-4 PDF

    Untitled

    Abstract: No abstract text available
    Text: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.3 November 20, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded


    Original     		DS083-1 18-bit DS083-4 PDF

    PC44

    Abstract: SO20 VQ44 XC17V00 XC18V00 XC2VP20 XC2VP30 XC2VP40
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v5.0 April 5, 2004 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		XC18V00 DS026 XC18V04 XC18V02, XC18V01 XC18V512, PC44 SO20 VQ44 XC17V00 XC2VP20 XC2VP30 XC2VP40 PDF

    AB38R

    Abstract: tag l9 225 400 XC2VP20 XC2VP50
    Text: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.0 June 13, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-performance Platform FPGA solution including - Up to twenty-four Rocket I/O™ embedded multi-gigabit transceiver blocks (based on


    Original     		DS083-1 18-bit and255-7778 DS083-4 AB38R tag l9 225 400 XC2VP20 XC2VP50 PDF

    xc2vp1257

    Abstract: 2VP125 XC2VP70 FF1704 FG456 2vp12 XC2VP50
    Text: Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.2 September 27, 2002 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four Rocket I/O™ embedded


    Original     		DS083-1 18-bit XC2VP30, FF1152 DS083-4 xc2vp1257 2VP125 XC2VP70 FF1704 FG456 2vp12 XC2VP50 PDF

    XCF04S

    Abstract: xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb
    Text: 47 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.13.1 April 3, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


    Original     		DS123 XCF04S xcf16pfs XCF32P-VOG48 XCF02S RELIABILITY REPORT 48-pin TSOP Package VO48 Xilinx Spartan-II 2.5V FPGA Family FSG48 XCF02S pcb PDF

    xcf16pfs

    Abstract: Xilinx XCF04S XCF01S XC2V80 DS026
    Text: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.3 May 7, 2004 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS FLASH Process • Endurance of 20,000 Program/Erase Cycles


    Original     		DS123 xcf16pfs Xilinx XCF04S XCF01S XC2V80 DS026 PDF

    XC3S250E design guide

    Abstract: csb 485 E2
    Text: <BL Blue> R DS123 v2.11 February 1, 2007 Platform Flash In-System Programmable Configuration PROMs Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process


    Original     		DS123 LVCMOS25 XC3S250E design guide csb 485 E2 PDF

    vhdl code for uart communication

    Abstract: XC2VP50
    Text: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded


    Original     		DS083-1 18-bit FG676 XC2VP20, XC2VP30, XC2VP40. FF1517 vhdl code for uart communication XC2VP50 PDF

    vhdl code for uart communication

    Abstract: XC2VP50 XC2VP70 FF1704 pinout
    Text: ` Virtex-II Pro Platform FPGAs: Introduction and Overview R DS083-1 v2.4.1 March 24, 2003 Advance Product Specification Summary of Virtex-II Pro Features • • High-Performance Platform FPGA Solution, Including - Up to twenty-four RocketIO™ embedded


    Original     		DS083-1 18-bit DS083-4 vhdl code for uart communication XC2VP50 XC2VP70 FF1704 pinout PDF

    xc18v02 Date Marking

    Abstract: XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C XC18V00
    Text: XC18V00 Series In-System Programmable Configuration PROMs R DS026 v3.10 April 17, 2003 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		XC18V00 DS026 XC2S400E XC2S600E xc18v02 Date Marking XC18V04 XC18V02 XC18V128 XC18V04VQ44C xilinx SO20 MARKING CODE XC18V01VQ44C XC18V01pc20c marking XC18V01SO20C PDF

    ra1613

    Abstract: FB360 HSTL18 XC2V3000-BG728 XC3S1000-FT256 XC3S200-ft256 X2P376 X2P528 X2P680 BGA 728 35x35 1.27
    Text: XPressArray-II 0.15mm Structured ASIC Data Sheet 1.0 Key Features • Next-generation 0.15mm hybrid structured ASIC • Initializable distributed memory at speeds up to 210MHz • Platform for high-performance 1.5V/1.2V ASICs and FPGAto-ASIC conversions • Configurable signal, core and I/O power supply pin locations


    Original     		210MHz PCI33, PCI66, ra1613 FB360 HSTL18 XC2V3000-BG728 XC3S1000-FT256 XC3S200-ft256 X2P376 X2P528 X2P680 BGA 728 35x35 1.27 PDF

    XCF32PVO48

    Abstract: 48-pin TSOP Package VO48 XCF08PVO48C XCF32PVOG48C XCF32PVO48C ieee 1532 XCF04SVO20C pcb footprint for XCF08PFSG48C Platform XCF01SVOG20C XCF08PFS48C
    Text: 35 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.17 October 26, 2009 Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


    Original     		DS123 VOG20 XCF32PVO48 48-pin TSOP Package VO48 XCF08PVO48C XCF32PVOG48C XCF32PVO48C ieee 1532 XCF04SVO20C pcb footprint for XCF08PFSG48C Platform XCF01SVOG20C XCF08PFS48C PDF

    infiniband Physical Medium Attachment

    Abstract: CX27201 TLK3101 VSC7123 VSC7216-01 XC2VP20 XC2VP30 XC2VP40 XC2VP70 SIGNAL PATH DESIGNER
    Text: White Paper: Virtex-II Pro Family R WP160 v1.1 October 22, 2002 Emulating External SERDES Devices with Embedded RocketIO Transceivers By: Matt DiPaolo The Virtex-II Pro Platform FPGA provides an attractive single-chip solution to serial transceiver design problems that previously required multiple


    Original     		WP160 VSC7123, VSC7216-01, TLK3101, CX27201. infiniband Physical Medium Attachment CX27201 TLK3101 VSC7123 VSC7216-01 XC2VP20 XC2VP30 XC2VP40 XC2VP70 SIGNAL PATH DESIGNER PDF

    spartan 3a

    Abstract: SPARTAN-3 XC3S400 24v 12v 20A regulator circuit diagram power supply SAMSUNG MONITOR str panasonic 614 battery 10nF 50V X7R samsung 7 pin str for 24v 3 amp to 220 package Circuit diagram of Regulated Power supply 6V 5A EL7566 ISL6401
    Text: HIGH PERFORMANCE ANALOG Power Management Application Guide for Xilinx FPGAs Using Switchers to Power Xilinx FPGAs and DDR Memory Increased gate counts and higher clock speeds in programmable logic ICs have resulted in higher current requirements while smaller device geometries are driving lower core supply voltages. Both


    Original     		PDF

    48-pin TSOP Package VO48

    Abstract: XCF16PFSG48C XCF08PFS48C XCF02SVO20C XCF16PFS48C XCF32PFSG48C XCF02SVOG20C pcb footprint FS48, and FSG48 XCF16PVOG48C XCF02SVO20C RELIABILITY REPORT
    Text: 35 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.18 May 19, 2010 Product Specification Features • XCF01S/XCF02S/XCF04S • In-System Programmable PROMs for Configuration of Xilinx FPGAs • 3.3V Supply Voltage • Low-Power Advanced CMOS NOR Flash Process


    Original     		DS123 XCF01S/XCF02S/XCF04S VOG20 48-pin TSOP Package VO48 XCF16PFSG48C XCF08PFS48C XCF02SVO20C XCF16PFS48C XCF32PFSG48C XCF02SVOG20C pcb footprint FS48, and FSG48 XCF16PVOG48C XCF02SVO20C RELIABILITY REPORT PDF

    XCF02S

    Abstract: pcb footprint FS48, and FSG48 XCF32P DS123 FS48 VO20 VO48 XCF01S XCF32PVO48C XCF08PFS48C
    Text: R DS123 v2.6 March 14, 2005 4 2 Platform Flash In-System Programmable Configuration PROMS Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • Low-Power Advanced CMOS NOR FLASH Process • Endurance of 20,000 Program/Erase Cycles


    Original     		DS123 XCF08P/XCF16P/XCF32P VOG48, FSG48 XCF01S/XCF02S/XCF04S XCF02S pcb footprint FS48, and FSG48 XCF32P DS123 FS48 VO20 VO48 XCF01S XCF32PVO48C XCF08PFS48C PDF

    XC18V01SO20C

    Abstract: 18V256 XC18V00 XC18V04 XC2S100 XC18V04VQ44I XC18V01PC20I
    Text: XC18V00 Series of In-System Programmable Configuration PROMs R DS026 v3.5 June 14, 2002 Features • Product Specification • Dual configuration modes - Serial Slow/Fast configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) In-system programmable 3.3V PROMs for


    Original     		XC18V00 DS026 XC18V01SO20C 18V256 XC18V04 XC2S100 XC18V04VQ44I XC18V01PC20I PDF

    256x16* STATIC RAM

    Abstract: 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50
    Text: Single-Port Block Memory Core v6.2 DS234 April 28, 2005 Features • Fully synchronous drop-in module for Virtex , Virtex-II, Virtex-II Pro, Virtex-4, Spartan™-II, Spartan-IIE, Spartan-3, and Spartan-3E FPGAs • Supports all three Virtex-II write mode options:


    Original     		DS234 256x16* STATIC RAM 32Kx1 false RAMB16 XC2S100 XC2S15 XC2S150 XC2S200 XC2S30 XC2S50 PDF

    XCF08PFSG48C

    Abstract: XCF01S Xilinx XCF04S pcb footprint FS48, and FSG48 XC3S500E XCF01SVO20 XCF32P DS123 FS48 VO20
    Text: 47 Platform Flash In-System Programmable Configuration PROMS R DS123 v2.8 December 29, 2005 Product Specification Features • • • • • • • • • • In-System Programmable PROMs for Configuration of Xilinx FPGAs Low-Power Advanced CMOS NOR FLASH Process


    Original     		DS123 XCF08PFSG48C XCF01S Xilinx XCF04S pcb footprint FS48, and FSG48 XC3S500E XCF01SVO20 XCF32P DS123 FS48 VO20 PDF

    csb 485 E2

    Abstract: Xilinx XCF08P XCF01SVO20 XCF32P XCF128X fs48 xc3s400 pinout XCF32PVO48 DS123 VO48
    Text: 48 Platform Flash In-System Programmable Configuration PROMs R DS123 v2.16 November 14, 2008 Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • ♦ 3.3V Supply Voltage Low-Power Advanced CMOS NOR Flash Process


    Original     		DS123 VOG20 csb 485 E2 Xilinx XCF08P XCF01SVO20 XCF32P XCF128X fs48 xc3s400 pinout XCF32PVO48 DS123 VO48 PDF

    XCF32P

    Abstract: XCF32PFS48C XCF08 xcf02s-vo20 pcb footprint FS48, and FSG48 XCF01S xcf32p-vog48 DS123 FS48 VO20
    Text: <BL Blue> Platform Flash In-System Programmable Configuration PROMS R DS123 v2.9 May 09, 2006 Product Specification Features • • In-System Programmable PROMs for Configuration of Xilinx FPGAs ♦ • 3.3V supply voltage Low-Power Advanced CMOS NOR FLASH Process


    Original     		DS123 VOG20 LVCMOS25 XCF32P XCF32PFS48C XCF08 xcf02s-vo20 pcb footprint FS48, and FSG48 XCF01S xcf32p-vog48 DS123 FS48 VO20 PDF

    XCF16PFS48C

    Abstract: XC2V80
    Text: Platform Flash In-System Programmable Configuration PROMs R DS123 v2.0 November 5, 2003 Preliminary Product Specification Features • In-System Programmable PROMs for Configuration of Xilinx FPGAs • I/O Pins Compatible with Voltage Levels Ranging From


    Original     		DS123 XCF01SVO20 XCF02SVO20 XCF04SVO20 XCF08PVO48 XCF16PVO48 XCF32PVO48 XCF08PFS48 XCF16PFS48 XCF32PFS48 XCF16PFS48C XC2V80 PDF