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    TTL IC PARAMETER Search Results

    TTL IC PARAMETER Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    74HC4053FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SPDT(1:2)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    74HC4051FT Toshiba Electronic Devices & Storage Corporation CMOS Logic IC, SP8T(1:8)/Analog Multiplexer, TSSOP16B, -40 to 125 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    TB67H451AFNG Toshiba Electronic Devices & Storage Corporation Brushed Motor Driver/1ch/Vout(V)=50/Iout(A)=3.5 Visit Toshiba Electronic Devices & Storage Corporation

    TTL IC PARAMETER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    FT232R

    Abstract: FT232RQ TTL232R-3V3 ft232r MAX232 MAX232 TTL232R TTL-232R TTL-232R-3V3 UART TTL buffer serial port to ttl using max232
    Text: Future Technology Devices International Ltd. TTL-232R USB to TTL Serial Converter Cable The TTL-232R is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It is designed


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    PDF TTL-232R TTL-232R FT232RQ FT232R TTL232R-3V3 ft232r MAX232 MAX232 TTL232R TTL-232R-3V3 UART TTL buffer serial port to ttl using max232

    max232 rts cts

    Abstract: TTL-232R-3V3 cmos 3v3 TTL232R-3V3 FT232RQ FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232
    Text: Future Technology Devices International Ltd. TTL-232R-3V3 USB to TTL Serial Converter Cable The TTL-232R-3V3 is a USB to TTL serial converter cable incorporating FTDI’s FT232RQ USB - Serial UART interface IC device, the latest device to be added to FTDI’s range of USB UART interface Integrated Circuit Devices. It


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    PDF TTL-232R-3V3 TTL-232R-3V3 FT232RQ FT232R max232 rts cts cmos 3v3 TTL232R-3V3 FT232R USB UART ttl drive USB CABLE MAX232 for level converter notes on serial communication MAX232

    Untitled

    Abstract: No abstract text available
    Text: CMOS LOGIC IC ELM7SU04BW Unbuffer Inverterx2 •General description ELM7SU04BW is CMOS unbuffer inverter IC includes 2 circuits IC. It realizes high speed operation similar to LS-TTL with lower power consumption by CMOS features. ■Features • • • •


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    PDF ELM7SU04BW OT-26 ELM7SU04BW

    ELM7SU04BW

    Abstract: 74HC 5v cmos inverter ELM7SU04BWEL
    Text: CMOS LOGIC IC ELM7SU04BW Unbuffer Inverterx2 •General description ELM7SU04BW is CMOS unbuffer inverter IC includes 2 circuits IC. It realizes high speed operation similar to LS-TTL with lower power consumption by CMOS features. ■Features • • • •


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    PDF ELM7SU04BW OT-26 ELM7SU04BW 74HC 5v cmos inverter ELM7SU04BWEL

    Logic IC

    Abstract: ELM7SU04BW
    Text: CMOS LOGIC IC ELM7SU04BW Unbuffer Inverterx2 •General description ELM7SU04BW is CMOS unbuffer inverter IC includes 2 circuits IC. It realizes high speed operation similar to LS-TTL with lower power consumption by CMOS features. ■Features • • • •


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    PDF ELM7SU04BW OT-26 ELM7SU04BW Logic IC

    uA 741 IC pin configuration

    Abstract: internal circuit diagram of IC 741 ic 741 datasheet internal diagram of 741 IC uA 741 OF IC 741 pin diagram of ic 741 uA 741 IC shift register ic pdf of 741 ic
    Text: VITESSE SEMICONDUCTOR CORPORATION Preliminary Datasheet 500 Mb/s Video Shift Register IC VSC6424 Features • ECL and TTL I/Os: ECL for high-speed interface, TTL for low-speed interface • Multiplex or Demultiplex Operation • Selectable Shift Register Length


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    PDF VSC6424 500Mb/s 250Mb/s Bt424 VSC6424 40-bit G52236-0, uA 741 IC pin configuration internal circuit diagram of IC 741 ic 741 datasheet internal diagram of 741 IC uA 741 OF IC 741 pin diagram of ic 741 uA 741 IC shift register ic pdf of 741 ic

    signal path designer

    Abstract: No abstract text available
    Text: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency


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    PDF /D1203-0589 signal path designer

    ic 3525 internal block diagram

    Abstract: ic 3525
    Text: SYNERGY SINGLE SUPPLY OCTAL PECL/TTL-tO -TTL C'° SY100H646 S E M IC O N D U C T O R FEATURES PECL/TTL-to-TTL version of popular ECLinPS El 11 Meets specifications required to drive highperformance x86 processors Guaranteed low skew specification Three-state enable


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    PDF SY100H646 SY10/100H646 28-lead SY10H646 IVT01 300pF 200pF SY10H646JC SY10H646JCTR ic 3525 internal block diagram ic 3525

    Untitled

    Abstract: No abstract text available
    Text: MBM93419 FUJITSU M IC R O E L E C T R O N IC S . INC. TTL 576-BIT BIPOLAR RANDOM ACCESS MEMORY DESCRIPTION The Fujitsu MBM93419 is a high speed TTL read/write randomaccess memory, organized as 64 words by 9 bits, with opencollector outputs. M BM93419 is packaged in a


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    PDF MBM93419 576-BIT MBM93419 BM93419 28-pin F93419.

    Untitled

    Abstract: No abstract text available
    Text: « 9-BIT TTL-TO-ECL WITH TTL, ECL ENABLE SYNERGY SY10H600 SY100H600 S E M IC O N D U C T O R FEATURES DESCRIPTION • 9-bit ideal for byte-parity applications ■ Flow-through configuration ■ Extra TTL and ECL power/ground pins to minimize switching noise


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    PDF SY10H600 SY100H600 10Hxxx) 100Hxxx) MC10H/100H600 SY10H600JC SY10H600JCTR SY100H600JC 100H600JCTR J28-1

    eel -16-2005

    Abstract: SY100H842 SY100H842ZC SY10H842 SY10H842ZC
    Text: * SINGLE SUPPLY PECL-TTL 1:4 CLOCK DRIVER SYNERGY SEM IC O N D U C TO R FEATURES • ■ ■ ■ C lockw orks SY10H842 SY100H842 DESCRIPTION Translates positive ECL to TTL PECL-TTL 300ps pin-to-pin skew Guaranteed skew spec Differential Internal design for Increased noise


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    PDF SY10H842 SY100H842 300ps SY100H842 SY10H842 SY10H842ZC Z16-1 SY100H842ZC eel -16-2005

    Untitled

    Abstract: No abstract text available
    Text: * 9-BIT LATCHED ECL-TO -TTL SYNERGY SY10H603 SY100H603 S E M IC O N D U C T O R FEATURES DESCRIPTION 9-bit ideal for byte-parity applications 3-state TTL outputs Flow-through configuration Extra TTL and ECL power/ground pins to minimize switching noise Dual supply


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    PDF SY10H603 SY100H603 200pF 10Hxxx) 100Hxxx) MC10H/100H603 200pF

    16f8

    Abstract: No abstract text available
    Text: data detayW devices;inc. 7a s t L o g ic Programmable Delay Units SERIES: PDU-16F 6-Bit TTL Interfaced Features: T es t C o nditions: • Input & Output TTL buffered ■ 6-Bit TTL program m able delay line ■ Two (2) Separate outputs; inverting and non-inverting.


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    PDF PDU-16F-0 PDU-16F-1 PDU-16F-2 PDU-16F-3 PDU-16F-4 PDU-16F-5 PDU-16F-6 PDU-16F-8 PDU-16F-10 16f8

    SY100S811

    Abstract: SY100S811JC SY100S811JCTR SY100S811ZC SY100S811ZCTR
    Text: * SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL SYNERGY S E M IC O N D U C T O R FEATURES DESCRIPTION PECL version of popular ECLinPS E111 Low skew Guaranteed skew spec V bb output TTL enable input Selectable TTL or PECL clock input Single +5V supply Differential internal design


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    PDF SY100S811 SY100S811 SY100S811JC J28-1 SY100S811JCTR SY100S811ZC Z16-1 SY100S811ZCTR

    Untitled

    Abstract: No abstract text available
    Text: *SYNERGY SINGLE SUPPLY QUAD PECL-TO-TTL WITH OUTPUT ENABLE S E M IC O N D U C T O R DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise


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    PDF SY10HB41 SY100H841 300ps 500ps SY10H841 SY10H841ZC SY10H841ZCTR SY100H841ZC SY100H841ZCTR

    Untitled

    Abstract: No abstract text available
    Text: O SING LE SUPPLY PEC L-TTL 1:4 C LO C K DRIVER SYNERGY S E M IC O N D U C T O R FEATURES S Y ^o'lo'ohS l DESCRIPTION • Translates positive ECL to TTL PECL-TTL The SY10H841 and SY100H841 are single supply, low skew translating 1:4 clock drivers. The devices feature a 24m A TTL output stage, with AC


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    PDF SY10H841 SY100H841 40MHz 300ps) SY10/100H841 SY10H841ZC SY100H841ZC Z16-1

    SN74ALS900

    Abstract: Advanced Schottky Family ci 741 SN54ALS900 LS 741
    Text: Attachment B-15 y PRELIMINARY DATA SHEET ADVANCED LOW-POWER SCHOTTKY TTL TYPES SN54ALS900 and SN74ALS900 QUAD 2 - INPUT NAND BUFFERS QUAD 2- INPUT NAND BUFFERS * * * ELECTRICAL PINOUT ADVANCED OX IDE-ISOLATED, IONIMPLANTED SCHOTTKY TTL PROCESS pos itive 1og ic :


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    PDF SN54ALS900 SN74ALS900 Advanced Schottky Family ci 741 LS 741

    SY100H841

    Abstract: SY10H841 SY10H841ZC
    Text: * SINGLE SUPPLY QUAD PECL-TO-TTL WITH OUTPUT ENABLE SYNERGY S E M IC O N D U C T O R Clockworks SY10H841 SY100H841 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise


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    PDF SY10H841 SY100H841 300ps 500ps SY10/100H841 SY10H841 SY10H841ZC Z16-1 SY10H841ZCTR SY100H841

    100HF646

    Abstract: ATT10 H600 H646 0D023
    Text: SING LE SUPPLY OCTAL SYNERGY Clockworks P EC L/TTL-to-TTL S E M IC O N D U C T O R FEA TU R E S S Y 100 H 646 5 Y1 ° ° H 6 4 6 D ES C R IPTIO N I PECL/TTL-to-TTL version of popular ECLinPS El 11 I Meets specifications required to drive high­ performance x86 processors


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    PDF SY10H646 SY100H646 10Hor100K MC10/100H646 ATT10/100HF646/B SY10/100H646 SY10H646 IVT01 OVT01 100HF646 ATT10 H600 H646 0D023

    F100K

    Abstract: SY100S324 SY100S324DC D2418
    Text: * LOW PO W ER HEX TTL-to-E C L TRANSLATO R SYNERGY S E M IC O N D U C T O R FEATURES SY100S324 DESCRIPTION Max. propagation delay of 1,4ns min. of —70mA The SY100S324 is a hex translator designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL


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    PDF SY100S324 F100K D24-1 TD013Ã 0DD21Ã SY100S324DC D24-1 SY100S324FC F24-1 F100K SY100S324 D2418

    Untitled

    Abstract: No abstract text available
    Text: * SINGLE SUPPLY QUAD PECL-TO-TTL WITH O UTPUT ENABLE SYNERGY S E M IC O N D U C T O R Clockworks SY10H841 SY100H841 DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-to-TTL ■ 300ps pin-to-pin skew ■ 500ps part-to-part skew ■ Differential internal design for increased noise


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    PDF SY10H841 SY100H841 300ps 500ps Z16-1

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm 100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compat­ ible with standard or Schottky TTL. A common Enable E ,


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    Untitled

    Abstract: No abstract text available
    Text: SINGLE_SUPPLY PECL-TTL 1:4 CLOCK DRIVER SYNERGY p rE f LIM m m IN IIIII rv PR AR Y SY1Q 1D0H843 SEM IC O N D U C TO R DESCRIPTION FEATURES • Translates positive ECL to TTL PECL-TTL ■ 300ps pln-to-pin skew ■ Guaranteed skew spec ■ Differential internal design for Increased noise


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    PDF 1D0H843 300ps SY10H843 SY100H843 SY10/100H843 SY10H843ZC SY100H843ZC Z16-1

    CY101E383

    Abstract: diode SKE 39
    Text: W r CY10E383 CY101E383 CYPRESS ECL/TTL/ECL Translator and High-Speed Bus Driver Features Functional Description • B iC M O S for optim um speed/power • H igh speed max. — 2.5 n s Ipu TTL-to-EC L — 3.5 n s tpo EC L-to-TTL The CY10/101E383 is a new-generation


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    PDF CY10E383 CY101E383 80-pin CY10/101E383 CY10E383â 84-Lead 80-Lead CY101E383 diode SKE 39