Aeroflex UTMC lvds receiver
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet September 24, 2003 INTRODUCTION FEATURES The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 75MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
75MHz
MIL-STD-883
48-lead
Aeroflex UTMC lvds receiver
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lcd Voltmeter
Abstract: CXA3197 HI3197 HI3197JCQ C2274
Text: HI3197 Data Sheet October 1998 10-Bit, 125 MSPS D/A Converter • Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Bits • Conversion Rate HI3197JCQ -20 to 75 125 MSPS PECL 100 MSPS (TTL) • Data Input Level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TTL
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HI3197
10-Bit,
HI3197JCQ
400mW
lcd Voltmeter
CXA3197
HI3197
HI3197JCQ
C2274
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Untitled
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet September, 2006 FEATURES INTRODUCTION The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 75MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
75MHz
MIL-STD-883
48-lead
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LVDS218
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet September 2002 FEATURES INTRODUCTION q q q q q q q q q q q q The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 50MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
50MHz
MIL-STD-883
50MHz,
48-lead
LVDS218
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Untitled
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet December, 2008 FEATURES INTRODUCTION The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 75MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
75MHz
MIL-STD-883
48-lead
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MC10ELT/100ELT28
Abstract: DL140 MC100ELT28 MC10ELT28
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information MC10ELT28 TTL to Differential PECL/Differ- MC100ELT28 ential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL
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MC10ELT28
MC100ELT28
MC10ELT/100ELT28
ELT28
10ELT
DL140
MC10ELT28/D*
MC10ELT28/D
MC100ELT28
MC10ELT28
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54LVDS218
Abstract: UT54LVDS218 lvds217 Aeroflex UTMC lvds receiver LVDS218
Text: Standard Products UT54LVDS218 Deserializer Data Sheet December, 2008 FEATURES INTRODUCTION The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 75MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
75MHz,
525Mbps
75MHz
54LVDS218
lvds217
Aeroflex UTMC lvds receiver
LVDS218
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lm 2309
Abstract: DL122 MC100H605 MC10H605
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Registered Hex ECL/TTL MC10H605 Translator MC100H605 The MC10/100H605 is a 6–bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24mA sink/source capabilities for
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MC10H605
MC100H605
MC10/100H605
MC10H605/D*
MC10H605/D
DL122
lm 2309
MC100H605
MC10H605
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UT54LVDS218
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet October 28, 2008 FEATURES INTRODUCTION The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 75MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
75MHz
MIL-STD-883
48-lead
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DL122
Abstract: H607 MC100H607 MC10H607
Text: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Registered Hex PECL/TTL MC10H607 Translator MC100H607 The MC10H/100H607 is a 6–bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving
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MC10H607
MC100H607
MC10H/100H607
MC10H607/D*
MC10H607/D
DL122
H607
MC100H607
MC10H607
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Untitled
Abstract: No abstract text available
Text: Standard Products UT54LVDS218 Deserializer Data Sheet August 14, 2002 FEATURES INTRODUCTION q q q q q q q q q q q q The UT54LVDS218 Deserializer converts the three LVDS data streams back into 21 bits of CMOS/TTL data. At a transmit clock frequency of 50MHz, 21 bits of TTL data are transmitted at a
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UT54LVDS218
50MHz
MIL-STD-883
50MHz,
48-lead
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Untitled
Abstract: No abstract text available
Text: Issued July 1983 004-923 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL
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VSC7125
Abstract: AN-20 T9631
Text: VITESSE SEMICONDUCTOR CORPORATION Data Sheet 1.0625 Gbits/sec Fibre Channel Transceiver VSC7125 Features • ANSI X3T11 Fibre Channel Compatible 1.0625 Gbps Full-duplex Transceiver • 106.25 MHz TTL Reference Clock • 10 Bit TTL Interface for Transmit and
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VSC7125
X3T11
VSC7125
10-bit
8B/10B
G52121-0,
AN-20
T9631
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MC10H605-D
Abstract: MC100H605 MC10H605 MC10H605FN
Text: MC10H605, MC100H605 Registered Hex ECL to TTL Translator Description The MC10/100H605 is a 6−bit, registered, dual supply ECL to TTL translator. The device features differential ECL inputs for both data and clock. The TTL outputs feature balanced 24 mA sink/source
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MC10H605,
MC100H605
MC10/100H605
MC10H605/D
MC10H605-D
MC100H605
MC10H605
MC10H605FN
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ut8q512
Abstract: No abstract text available
Text: Standard Products UT8Q512 512K x 8 SRAM Advanced Data Sheet July 30, 1999 FEATURES q 25ns maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs, output levels specified for both TTL
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UT8Q512
100Krad
1E-10cm2
0E-11errors/bit-day,
0E14n/cm2
36-lead
8Q512)
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ut8q512
Abstract: No abstract text available
Text: Standard Products UT8Q512 512K x 8 SRAM Preliminary Data Sheet September 1, 1999 FEATURES q 25ns maximum address access time q Asynchronous operation for compatibility with industrystandard 512K x 8 SRAMs q TTL compatible inputs, output levels specified for both TTL
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UT8Q512
1E-10cm2
0E-11errors/bit-day,
0E14n/cm2
36-lead
8Q512)
30Krad)
10Krad)
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FTDI-FT232
Abstract: Prolific usb uart
Text: MODULE DATA SHEET RN-SRL-FTD5V-DGL USB to 5V Serial UART dongle, FTDI Chipset Features • Enables USB-to-Serial TTL conversion/bridging Connects to device Microcontroller UART or I/O Data transfer rates from 300 to 3M baud at TTL levels I/O includes TX, RX, RTS, CTS, VCC, and GND
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Untitled
Abstract: No abstract text available
Text: Transfer Electromechanical Relay Switch DC to 12.4 GHz, N, 50 Watts, 28V Control with Indicators, Latching, TTL TECHNICAL DATA SHEET PE71S6173 The PE71S6173 is a Transfer Switch that operates from DC to 12.4 GHz. The switch has a Latching actuator, Indicators, TTL
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PE71S6173
PE71S6173
ransfer-electromechanical-relay-switch-12
-indicators-latching-ttl-logicpe71s6173-p
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Untitled
Abstract: No abstract text available
Text: Order this data sheet by MC10H680/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10H680 MC100H680 4-Bit Differential ECL Bus to TTL Bus Transceiver • Differential ECL Bus 25 £2 I/O Ports • High Drive TTL Bus I/O Ports • Extra TTL and ECL Power/Ground Pins to Minimize Switching Noise
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MC10H680/D
MC10H680
MC100H680
10Hxxx)
100Hxxx)
OH/100H680
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Untitled
Abstract: No abstract text available
Text: Order this data sheet by MC10H681/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC10H681 MC100H681 Hex ECL-TTL Transceiver with Latches • Separate Latch Enable Controls for each Direction • ECL Single Ended 50 £1 I/O Port • High Drive TTL I/O Ports • Extra TTL and ECL Power/Ground Pins to Minimize
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MC10H681/D
MC10H681
MC100H681
10Hxxx)
100Hxxx)
MC10/100H681
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Sequencers
Abstract: No abstract text available
Text: Data Sheets TTL/CMQS PAL Devices TTL/CMOS AmPAL Devices PROSE/PLS Sequencers FPC/PEG Sequencers ECL PAL Devices HAL/ZHAL Devices Military PAL Devices Logic Ceil Array Electrical Definitions £1 MonoffMoilOnfoinorfes 5-1
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Untitled
Abstract: No abstract text available
Text: GD74F04 PRELIMINARY DATA SHEET HEX INVERTER Description Pin Configuration The GD74F04 contains 6 logic inverters which accept standard TTL input signal and standard TTL output level. They have a greater noise margin than conventional inverters. Vcc 6Y 6A 5Y
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GD74F04
GD74F04
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GD74F04
Abstract: No abstract text available
Text: GD74F04 PRELIMINARY DATA SHEET HEX INVERTER Description The GD74F04 contains 6 logic inverters which accept standard TTL input signal and standard TTL output level. They have a greater noise margin than conventional inverters. Pin Configuration Vcc 6Y 6A 5Y
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GD74F04
GD74F04
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Untitled
Abstract: No abstract text available
Text: Attachment B-17 PRELIMINARY DATA SHEET ADVANCED LOW-POWER SCHOTTKY TTL TYPES SN54ALS903 and SN74ALS903 QUAD 2 - INPUT NAND BUFFERS with OPEN COLLECTOR OUTPUTS * QUAD 2- INPUT NAND BUFFERS w/O.C. OUTPUTS * ADVANCED OX IDE-ISOLATED, IONIMPLANTED SCHOTTKY TTL PROCESS
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SN54ALS903
SN74ALS903
ALS21
ALS22
ALS27
ALS30
ALS32
ALS133
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