TSOP 48 PACKAGE TRAY Search Results

TSOP 48 PACKAGE TRAY Result Highlights (5)

Part	Manufacturer	Description
TPH9R00CQH	Toshiba Electronic Devices & Storage Corporation	MOSFET, N-ch, 150 V, 64 A, 0.009 Ohm@10V, SOP Advance / SOP Advance(N)
TPH2R408QM	Toshiba Electronic Devices & Storage Corporation	MOSFET, N-ch, 80 V, 120 A, 0.00243 Ohm@10V, SOP Advance
XPH2R106NC	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 60 V, 110 A, 0.0021 Ω@10V, SOP Advance(WF)
XPH3R206NC	Toshiba Electronic Devices & Storage Corporation	N-ch MOSFET, 60 V, 70 A, 0.0032 Ω@10V, SOP Advance(WF)
TPH4R008QM	Toshiba Electronic Devices & Storage Corporation	MOSFET, N-ch, 80 V, 86 A, 0.004 Ohm@10V, SOP Advance(N)

TSOP 48 PACKAGE TRAY Datasheets Context Search

Catalog Datasheet	MFG & Type	Document Tags	PDF
TSOP 48 thermal resistance Abstract: TSOP 48 thermal resistance type1 thin TSOP 8x20 package tray TSOP 32 thermal resistance TSOP 48 package tray JEDEC tray standard 13 Ablestik 12-1 signetics TSOP package tray TSOP1-48 Text: Signetics Flip Chip Package Data Sheet Signetics Data Sheet Signetics TSOP Type 1 Signetics Thin Small Outline Package Type1 Cross Section View of TSOP Type 1 Mold Compound Gold Wire Lead frame Die Die Attach Adhesive Signetics’ s TSOP Type1 packages are available in 32 - 48 lead counts with 0.50mm lead	Original	12x20 TSOP 48 thermal resistance TSOP 48 thermal resistance type1 thin TSOP 8x20 package tray TSOP 32 thermal resistance TSOP 48 package tray JEDEC tray standard 13 Ablestik 12-1 signetics TSOP package tray TSOP1-48	PDF
TSOP 48 package tray Abstract: 48-pin TSOP package tray tsop 48 PIN tray TSOP package tray TSOP I JEDEC TRAY DIMENSIONS TRAY TSOP Text: 150° MAX. 14.90 A 8x12=96 15.80 104.3 TSOP I 12.0×20.0mm A' 12.3 20.3 25.50 17.25 280.5 315.0 322.6 SECTION A – A' 5.62 (6.35) 20.3 7.62 135.9 UNIT : mm Applied Package Quantity (pcs) 48-pin Plastic TSOP (I) (12×20) MAX. 96 Tray Material Heat Proof Temp.	Original	48-pin TSOP 48 package tray 48-pin TSOP package tray tsop 48 PIN tray TSOP package tray TSOP I JEDEC TRAY DIMENSIONS TRAY TSOP	PDF
TSOP 48 package tray Abstract: 48-pin TSOP package tray tsop 48 PIN tray JEDEC tray standard TSOP package tray tsop TRAY TSOP TRAY 40 PIN Text: TRAY CONTAINER UNIT : mm 8x13=104 NEC 7 135°C MAX. 14.90 15.80 A' 23.50 12.10 104.3 TSOP 1 12×18 135.9 PPE A 18.40 282.0 315.0 (322.6) 16.50 SECTION A – A' 5.62 (6.35) 7.62 18.40 Applied Package Quantity (pcs) 48-pin Plastic TSOP (I) (12 × 18) MAX. 104	Original	48-pin SSD-A-H6761 TSOP 48 package tray 48-pin TSOP package tray tsop 48 PIN tray JEDEC tray standard TSOP package tray tsop TRAY TSOP TRAY 40 PIN	PDF
A6 TSOP-6 MARKING Abstract: No abstract text available Text: S29AL016D 16 Megabit 2 M x 8-Bit/1 M x 16-Bit CMOS 3.0 Volt-only Boot Sector Flash Memory Datasheet ADVANCE INFORMATION Distinctive Characteristics Architectural Advantages Package Options Single power supply operation 48-ball FBGA 48-pin TSOP — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications	Original	S29AL016D 16-Bit) 48-ball 48-pin 200nm Am29LV160D MBM29LV160E S29AL016D A6 TSOP-6 MARKING	PDF
48-pin TSOP package tray Abstract: TSOP 48 package tray tsop 48 PIN tray Text: TRAY CONTAINER Unit : mm 335±1.0 23.5±0.5 288±0.5 21.25±0.5 137.5±0.5 180±1.0 27.5±0.1 32±0.1 18.3 A' NEC LA-2503B-1 HEAT PROOF A 15.5 SECTION A – A' 18.3 6.3 5.8 8.8 15 Applied Package Quantity pcs 48-pin Plastic TSOP (I) (12x18) MAX. 60 Tray	Original	LA-2503B-1 48-pin SSD-A-H5743 48-pin TSOP package tray TSOP 48 package tray tsop 48 PIN tray	PDF
48-pin TSOP package tray Abstract: TSOP 48 package tray tsop 48 PIN tray Text: Unit : mm 335±1.0 23.5±0.5 288±0.5 21.25±0.5 137.5±0.5 180±1.0 27.5±0.1 32±0.1 18.3 A' NEC LA-2503B-1 HEAT PROOF A 15.5 SECTION A – A' 18.3 6.3 5.8 8.8 15 Applied Package Quantity pcs 48-pin Plastic TSOP (I) (12x18) MAX. 60 Tray LA-2503B-1 Material	Original	LA-2503B-1 48-pin 48-pin TSOP package tray TSOP 48 package tray tsop 48 PIN tray	PDF
pd0008 Abstract: tray 8 x 8 TSOP TRAY 40 PIN TSOP package tray N1N213 Package and Packing Information ST Text: PD0008 Packing information Tray for TSOP packages type 1 Introduction TSOP type-1 packages can be supplied in tray packing. Refer to Table 1 for the list of TSOP type-1 packages supplied in trays. The objective of this document is provide a detailed description of the tray. It applies to all	Original	PD0008 105cm. PD0008 tray 8 x 8 TSOP TRAY 40 PIN TSOP package tray N1N213 Package and Packing Information ST	PDF
CY62148E Abstract: R1LP0108ESA-7SR Text: Selection Guide Low Power SRAM www.renesas.eu 2014.03 About Renesas Electronics Corporation Renesas Electronics Corporation TSE: 6723 , the world’s number one supplier of microcontrollers, is a premier supplier of advanced semiconductor solutions including microcontrollers, SoC solutions and a broad range of analog and power devices.	Original	R1WV6416RSD-5SI R1WV6416RSD-7SI HM6216514LTTI-5SL R10PF0003ED0700 CY62148E R1LP0108ESA-7SR	PDF
HN58V1001TI-25E Abstract: R1EX25256ATA00I renesas tcam tcam renesas cypress tcam idt tcam r1qaa7218rbg R1LV0816A M5M51008DFP-55H R1LV1616RBG-7SI Text: 2009.04 Renesas General-Purpose Memory General Catalog www.renesas.com Highly Reliable Technological Innovation Ever faster, ever more power efficient…. Our advanced technology delivers To give your products the edge in today’s tough competitive higher quality and reliability,	Original	REJ01C0001-1000 HN58V1001TI-25E R1EX25256ATA00I renesas tcam tcam renesas cypress tcam idt tcam r1qaa7218rbg R1LV0816A M5M51008DFP-55H R1LV1616RBG-7SI	PDF
tsop tray matrix outline Abstract: tsop Shipping Trays JEDEC Matrix Tray outlines Atmel 918 EIA-481-x ATMEL Packing Methods and Quantities JEDEC Matrix Tray outlines soic ATMEL Tape and Reel PLCC JEDEC tray Shipping Trays Text: Packages Available Packing Methods and Quantities Atmel provides four different packing methods to provide maximum protection for our product and to best suit our customer’s needs: 1 Shipping Tubes, 2) Shipping Trays, 3) Unit Packing, and 4) Tape and Reel. These first three methods are our standard pack, but we also	Original		PDF
MD300-10A Abstract: QFN tray tray datasheet bga SIP 400B TSOP TRAY 40 PIN BGA package tray 64 NEC A39A 240 TSOP package tray 6-tsop TRAY DIMENSIONS 132 PGA Text: CHAPTER 4 CHAPTER 4 4.1 PACKING STYLES AND NOTES 4.1.1 Packing Styles 4.1.2 Notes on Handling 4.2 PACKING OF IC PACKAGES 4.2.1 List of Packing 1 DIP (2) SIP, V-DIP, ZIP (3) QUIP, Piggyback (4) PGA (5) SOP, SSOP (6) TSOP (I) (II) (7) QFP, QFP (FP) (8) SVP	Original	S64F1-CA1 S108S1-YHC P116S1-YJC S144S1-YKC S176S1-2C S224S1-3C-1 S304S1-6C S256N7-B6 S352N7-F6-1 S420N7-F6 MD300-10A QFN tray tray datasheet bga SIP 400B TSOP TRAY 40 PIN BGA package tray 64 NEC A39A 240 TSOP package tray 6-tsop TRAY DIMENSIONS 132 PGA	PDF
AMD AM28F010 ca Abstract: AM29 flash 48-pin TSOP package tray tsop 48 PIN SOCKET pin identification AMD 2m flash memory Meritec Am29LV033B AM29F010 Am29F002N AM29F002 Text: Flash Memory Quick Reference Guide Summer ’98 Package Migration Low-Voltage Am29LV004 Am29LV008B Am29LV081 Am29LV116B Am29LV017B 2 Mb 4 Mb 8 Mb 16 Mb Am29LV010B Am29LV001B Am29LV020B Am29LV102B Am29LV040B Am29LV104B 1 Mb 2 Mb 4 Mb Am29LV200 Am29DL400B Am29LV400	Original	Am29LV004 Am29LV008B Am29LV081 Am29LV116B Am29LV017B Am29LV010B Am29LV001B Am29LV020B Am29LV102B Am29LV040B AMD AM28F010 ca AM29 flash 48-pin TSOP package tray tsop 48 PIN SOCKET pin identification AMD 2m flash memory Meritec Am29LV033B AM29F010 Am29F002N AM29F002	PDF
28 TSSOP JEDEC Thin Matrix Tray outlines Abstract: tsop tray matrix outline Shipping Trays ATMEL Packing Methods and Quantities ATMEL EIA-481-x Packing ATMEL 234 tsop Shipping Trays atmel tape and reel JEDEC Matrix Tray outlines EIA-481-x Text: Available Packing Methods and Quantities Atmel provides four different packing methods to provide maximum protection for our product and to best suit our customer’s needs: 1 Shipping Tubes, 2) Shipping Trays, 3) Unit Packing, and 4) Tape and Reel. These first three	Original	0637D 09/99/xM 28 TSSOP JEDEC Thin Matrix Tray outlines tsop tray matrix outline Shipping Trays ATMEL Packing Methods and Quantities ATMEL EIA-481-x Packing ATMEL 234 tsop Shipping Trays atmel tape and reel JEDEC Matrix Tray outlines EIA-481-x	PDF
TSOP 48 thermal resistance Abstract: TSOP 48 stacked die package MS-024 MO-142 TSOP 32 thermal resistance TSOP 48 package tray MO-183 marking code 56l jedec ms-024 Text: LEADFRAME data sheet TSOP Features: Thin Small Outline Package TSOP : Amkor offers a family of popular TSOP packages to serve the needs of IC designers, PCB/system engineers and component specifiers. Small and thin, these 1.0 mm thick packages were designed and introduced to operate	Original	MS-024 TSOP 48 thermal resistance TSOP 48 stacked die package MS-024 MO-142 TSOP 32 thermal resistance TSOP 48 package tray MO-183 marking code 56l jedec ms-024	PDF

ATMEL 234 Abstract: ATMEL Packing Methods and Quantities ATMEL 210 atmel tape and reel ATMEL shipping label ATMEL Tape and Reel code ATMEL SOIC tape and reel ATMEL JEDEC SOIC atmel tape and reel JEDEC SOIC ATMEL Packing information JEDEC SOIC Text: Available Packing Methods and Quantities Atmel provides four different packing methods to provide maximum protection for our product and to best suit our customer's needs: 1 Shipping Tubes, 2) Shipping Trays, 3) Unit Packing, and 4) Tape and Reel. These first three	Original	0637B 10/98/xM ATMEL 234 ATMEL Packing Methods and Quantities ATMEL 210 atmel tape and reel ATMEL shipping label ATMEL Tape and Reel code ATMEL SOIC tape and reel ATMEL JEDEC SOIC atmel tape and reel JEDEC SOIC ATMEL Packing information JEDEC SOIC	PDF
NEC A39A Abstract: NEC A39A 240 SOP28 330 mil land pattern NEC A39A 8 PIN mjh 106 120-PIN 282 185 01 smd TRANSISTOR code b6 ED-7500 transistor a39a SIP 400B Text: IC PACKAGE MANUAL 1991, 1992, 1994, 1996 Document No. C10943XJ6V0IF00 Previous No. IEI-635, IEI-1213 Date Published January 1996 P Printed in Japan CHAPTER 1 PACKAGE OUTLINES AND EXPLANATION CHAPTER 2 CHAPTER 3 1 THROUGH HOLE PACKAGES 2 SURFACE MOUNT PACKAGES	Original	C10943XJ6V0IF00 IEI-635, IEI-1213) ED-7411 NEC A39A NEC A39A 240 SOP28 330 mil land pattern NEC A39A 8 PIN mjh 106 120-PIN 282 185 01 smd TRANSISTOR code b6 ED-7500 transistor a39a SIP 400B	PDF
land pattern for TSOP 2-44 Abstract: Wells programming adapter TSOP 48 intel 44-lead psop land pattern for TSOP 56 pin F9232 E28F016SA70 tsop tray matrix outline wells 648-0482211 memory card thickness 29f200 tsop adapter Text: D Small Outline Package Guide 1996 296514-006 8/19/97 5:26 PM FRONT.DOC Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions	Original		PDF
TSOP-48 pcb LAYOUT Abstract: str 6654 pin details of str f 6654 pin details of str W 6654 amd socket 940 pinout str W 6654 land pattern tsop 66 56-Lead TSOP Package 28F002BC 28F010 Text: D Small Outline Package Guide 1996 296514-006 8/19/97 5:26 PM FRONT.DOC Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions	Original		PDF
pioneer PAL 007 A Abstract: PAL 007 pioneer str 6654 PAL 008 pioneer pin details of str W 6654 sem 2106 Yamaichi Electronics ic197 648-0482211 TSOP56 jackson Text: D Small Outline Package Guide 1999 3/25/99 4:28 PM cvrpg.doc Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions	Original		PDF
LGA 1156 PIN OUT diagram Abstract: QSJ-44403 LGA 1150 Socket PIN diagram LGA 1155 Socket PIN diagram IC107-26035-20-G LGA 1151 PIN diagram REFLOW lga socket 1155 IC107-3204-G TB 2929 H alternative LGA 1155 pin diagram Text: DIP8-P-300-2.54 5 Package material Lead frame material Pin treatment Package weight g Rev. No./Last Revised Epoxy resin 42 alloy Solder plating (≥5µm) 0.46 TYP. 2/Dec. 11, 1996 DIP14-P-300-2.54 5 Package material Lead frame material Pin treatment Package weight (g)	Original	DIP8-P-300-2 DIP14-P-300-2 DIP16-P-300-2 DIP18-P-300-2 MIL-M-38510 MIL-STD-883 LGA 1156 PIN OUT diagram QSJ-44403 LGA 1150 Socket PIN diagram LGA 1155 Socket PIN diagram IC107-26035-20-G LGA 1151 PIN diagram REFLOW lga socket 1155 IC107-3204-G TB 2929 H alternative LGA 1155 pin diagram	PDF
PAL 007 pioneer Abstract: pioneer PAL 007 A PAL 008 pioneer sn 7600 n 648-0482211 sem 2106 Trays tsop56 TSOP 86 land pattern amd socket 940 pinout Meritec 980020-56 Text: D Small Outline Package Guide 1999 3/25/99 4:28 PM cvrpg.doc Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel’s Terms and Conditions	Original		PDF
DIP24-P-600-2 Abstract: oki qfp tray SEPT24 Text: Package Overview I Type Typical Sample Semiconductor Pin Counts Pitches [mm] OKI Suffix DIP Dual-in-line Package 8, 14, 16, 18, 20, 22, 24, 28, 32, 36, 40, 42, 48 2.54 RA SDIP (Shrink Dual-in-line Package) 30, 42, 64 1.778 ZIP (Zig-Zag In-line Package) 20, 24, 28, 40	Original	100mil 70mil 50mil 40PQFP DIP24-P-600-2 oki qfp tray SEPT24	PDF
d1884 Abstract: TSOP infrared TQFP80-P-1212-0 MSM6779BAV-Z-01 MARK W1 TSOP MSM6778BAV-Z-01 DIP14-P-300-2 DIP20-P-300-2 3360D 8400B Text: Package Overview I Type Typical Sample Semiconductor Pin Counts Pitches [mm] OKI Suffix DIP Dual-in-line Package 8, 14, 16, 18, 20, 22, 24, 28, 32, 36, 40, 42, 48 2.54 RA SDIP (Shrink Dual-in-line Package) 30, 42, 64 1.778 ZIP (Zig-Zag In-line Package) 20, 24, 28, 40	Original	50mil 100mil 70mil 40PQFP d1884 TSOP infrared TQFP80-P-1212-0 MSM6779BAV-Z-01 MARK W1 TSOP MSM6778BAV-Z-01 DIP14-P-300-2 DIP20-P-300-2 3360D 8400B	PDF
JEDEC TRAY DIMENSIONS Abstract: TSOP 8x14 TSOP 48 package tray TSOP 32ld tray JEDEC TRAY 10 X 10 shipping tray jedec tray scale TSOP package tray Text: _L _L _L 001IHAL RELEASE. NOTE : 1. BAKEABLE TRAYS ARE INTENDED TO BE CONTINUOUSLY BAKED FOR 48 HOURS AT THE BAKE TEMPERATURE AS SPECIFIED. 2. TOTAL USABLE CELL COUNT IS 208. 3. TRAY VACUUM PICKUP METHOD REQUIRES A 28m m SQUARE MINIMUM WALLED PICKUP AREA , LOCATED AS CLOSE TO	OCR Scan	001IHAL 1X105 1X1012 JEDEC TRAY DIMENSIONS TSOP 8x14 TSOP 48 package tray TSOP 32ld tray JEDEC TRAY 10 X 10 shipping tray jedec tray scale TSOP package tray	PDF

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TSOP 48 PACKAGE TRAY Search Results

TSOP 48 PACKAGE TRAY Result Highlights (5)

TSOP 48 PACKAGE TRAY Datasheets Context Search

TSOP 48 thermal resistance

TSOP 48 package tray

TSOP 48 package tray

A6 TSOP-6 MARKING

48-pin TSOP package tray

48-pin TSOP package tray

pd0008

CY62148E

HN58V1001TI-25E

tsop tray matrix outline

MD300-10A

AMD AM28F010 ca

28 TSSOP JEDEC Thin Matrix Tray outlines

TSOP 48 thermal resistance

ATMEL 234

NEC A39A

land pattern for TSOP 2-44

TSOP-48 pcb LAYOUT

pioneer PAL 007 A

LGA 1156 PIN OUT diagram

PAL 007 pioneer

DIP24-P-600-2

d1884

JEDEC TRAY DIMENSIONS