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    STACK BUFFER REGISTER Search Results

    STACK BUFFER REGISTER Result Highlights (6)

    Part ECAD Model Manufacturer Description Download Buy
    7UL2T125FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL2T126FK Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Buffer, SOT-765 (US8), -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    7UL1G07FU Toshiba Electronic Devices & Storage Corporation One-Gate Logic(L-MOS), Non-Inverter Buffer (Open Drain), USV, -40 to 85 degC Visit Toshiba Electronic Devices & Storage Corporation
    SF-10GSFPPLCL-000 Amphenol Cables on Demand Amphenol SF-10GSFPPLCL-000 SFP+ Optical Module - 10GBASE-SR (up to 300m/984') SFP+ Multimode Optical Transceiver Module (Duplex LC Connectors) - Cisco & HP Compatible Datasheet
    SF-XP85B102DX-000 Amphenol Cables on Demand Amphenol SF-XP85B102DX-000 SFP28 25GBASE-SR Short-Range 850nm Multi-Mode Optical Transceiver Module (Duplex LC Connector) by Amphenol XGIGA [XP85B102DX] Datasheet
    SF-QXP85B402D-000 Amphenol Cables on Demand Amphenol SF-QXP85B402D-000 QSFP28 100GBASE-SR Short-Range 850nm Multi-Mode Optical Transceiver Module (MTP/MPO Connector) by Amphenol XGIGA [QXP85B402D] Datasheet

    STACK BUFFER REGISTER Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    XTAL1

    Abstract: pca816 addr alu circuit with transistor 0p07
    Text: P0.0–P0.7 P2.0–P2.7 PORT 0 DRIVERS PORT 2 DRIVERS VCC VSS RAM ADDR REGISTER PORT 0 LATCH RAM PORT 2 LATCH FLASH 8 B REGISTER STACK POINTER ACC PROGRAM ADDRESS REGISTER TMP1 TMP2 BUFFER ALU SFRs TIMERS PSW PC INCREMENTER P.C.A. 8 16 PSEN ALE EAVPP TIMING


    Original     		PDF

    Kenwood

    Abstract: delta sigma modulation and demodulation Delta ac servo motor TDA7522 TDA7473 TQFP80 512x16Bit TDA7521 56MIPS adaptive delta demodulator
    Text: TDA7522 Digital Servo & Decoder PRODUCT PREVIEW • BUILT IN 8Bit MICROCONTROLLER STANDARD ST7 with: – 24 KByte ROM available for ST7 & Servo-Audio DSP – 1024Byte RAM, including 128byte stack – 4KByte RAM for CD-Text memory (for 1block) – Built in R-W subcode buffer (Max. 144Byte


    Original     		PDF TDA7522 1024Byte 128byte 144Byte 16bit TQFP80 Kenwood delta sigma modulation and demodulation Delta ac servo motor TDA7522 TDA7473 TQFP80 512x16Bit TDA7521 56MIPS adaptive delta demodulator

    TDA7522

    Abstract: delta sigma modulation and demodulation 50MIPS TDA7521 laser disk spindle motor controller Register TQFP80 STMicroelectronics marking ROM code name c program to interface imu to microcontroller kenwood equalizer crossover
    Text: TDA7522 Digital Servo & Decoder PRODUCT PREVIEW • BUILT IN 8Bit MICROCONTROLLER STANDARD ST7 with: – 24 KByte ROM available for ST7 & Servo-Audio DSP – 1024Byte RAM, including 128byte stack – 4KByte RAM for CD-Text memory (for 1block) – Built in R-W subcode buffer (Max. 144Byte


    Original     		PDF TDA7522 1024Byte 128byte 144Byte 16bit TQFP80 TDA7522 delta sigma modulation and demodulation 50MIPS TDA7521 laser disk spindle motor controller Register TQFP80 STMicroelectronics marking ROM code name c program to interface imu to microcontroller kenwood equalizer crossover

    Untitled

    Abstract: No abstract text available
    Text: National Semiconductor November 2006 Revision 1.0 Introduction This document explains the UART Buffer management of the SimplyBlue module in the different possible cases as receiving, transmitting, command mode and transparent mode. National Semiconductor ia a registered trademark of National Semiconductor Corporation.


    Original     		PDF

    ADSP21000

    Abstract: ADSP-21000 ADSP-21020 ADSP-21060 of architecture of ADSP21xxx SHARC processor
    Text: Simulator Registers & Memory 11.1 11 OVERVIEW This chapter describes how to inspect and alter processor registers, memory locations, and stacks from within the simulator. This chapter also describes most of the display formats of the contents of registers,


    Original     		PDF ADSP-2106x ADSP21000 ADSP-21000 ADSP-21020 ADSP-21060 of architecture of ADSP21xxx SHARC processor

    of tcon register of 8051

    Abstract: 8051 psw function DS5000 8051 memory organization DOWN COUNTER using 8051
    Text: USER’S GUIDE SECTION 3: SECURE MICROCONTROLLER ARCHITECTURE Introduction B Register The major function of the B register is as a source and destination register during multiply and divide instructions. It may also be used as a scratchpad register. The Secure Microcontroller family is based on an 8051


    Original     		PDF 8051s of tcon register of 8051 8051 psw function DS5000 8051 memory organization DOWN COUNTER using 8051

    7476 3 bit ripple counter

    Abstract: 7464 shift register marking code IAM SDIP32 SDIP42 ST92186B fsa10as
    Text: ST92186B 8/16-BIT MCU FOR TV APPLICATIONS WITH UP TO 32K ROM AND ENHANCED ON-SCREEN-DISPLAY • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Register file based 8/16 bit Core Architecture with RUN, WFI, and HALT modes -10 to 70°C Operating Temperature Range


    Original     		PDF ST92186B 8/16-BIT 250ns 165ns 32-pin 42-pin SDIP42) SDIP32) 7476 3 bit ripple counter 7464 shift register marking code IAM SDIP32 SDIP42 ST92186B fsa10as

    Untitled

    Abstract: No abstract text available
    Text: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host


    Original     		PDF HI-6130 HI-6131 MIL-STD-1553 MIL-STD-1760 16-bit HI-6131 HI-6130 16-bit 100-pin

    Untitled

    Abstract: No abstract text available
    Text: HI-6130 / HI-6131 MIL-STD-1553 / MIL-STD-1760 3.3V BC / MT / RT Multi-Terminal Device GENERAL DESCPIPTION • Two options are offered for host access to internal registers and static RAM: The HI-6130 uses a 16-bit parallel bus; the HI-6131 communicates with the host


    Original     		PDF HI-6130 HI-6131 MIL-STD-1553 MIL-STD-1760 16-bit HI-6131 HI-6130 16-bit 100-pin

    osd font

    Abstract: PHILIPS colour television schematic C1-C25 7476 3 bit ripple counter 7464 shift register TTL 7471 marking code IAM SDIP32 SDIP42 ST92186B
    Text: ST92186B 8/16-BIT MCU FOR TV APPLICATIONS WITH UP TO 32K ROM AND ENHANCED ON-SCREEN-DISPLAY • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Register file based 8/16 bit Core Architecture with RUN, WFI, and HALT modes -10 to 70°C Operating Temperature Range


    Original     		PDF ST92186B 8/16-BIT 250ns 165ns 32-pin 42-pin SDIP42) SDIP32) osd font PHILIPS colour television schematic C1-C25 7476 3 bit ripple counter 7464 shift register TTL 7471 marking code IAM SDIP32 SDIP42 ST92186B

    UPD1713

    Abstract: upd17p132c
    Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD17120 SMALL GENERAL-PURPOSE 4 BIT SINGLE-CHIP MICROCONTROLLER The µPD17120 is a 4-bit single-chip microcontroller containing timer, a power-on/power-down reset circuit, and a serial interface. For the CPU, the µPD17120 employs a 17K architecture using general registers. The new architecture allows


    Original     		PDF PD17120 PD17120 PD17P132, UPD1713 upd17p132c

    transistor equivalent table

    Abstract: interrupt ADSP-21160 sharc
    Text: ,17 558379(&725 $''5(66(6 Figure F-0. Table F-0. Listing F-0. 2YHUYLHZ The ADSP-21160’s interrupt vector table is similar to the ADSP-2106x’s interrupt vector table. The interrupts appear in Table F-1. Table F-1. Interrupt Vector Addresses Register IRPTL/


    Original     		PDF ADSP-21160s ADSP-2106xs ADSP-21160 transistor equivalent table interrupt sharc

    ADSP-2106x

    Abstract: CB15 ADSP-21060 reference manual ADSP-21000 ADSP21060 ADSP-21060 ADSP-21061 ADSP-21062 AOS PACKING 0X001E
    Text: Control/Status Registers E.1 E OVERVIEW This appendix provides bit definitions for the ADSP-2106x’s control and status registers. Some of the registers are located in the processor core; these are called system registers, a subset of the processor’s universal


    Original     		PDF ADSP-2106x 0x00000001 0x00000002 0x00000070 0x00000700 0x00001000 0x00002000 0x0000c000 CB15 ADSP-21060 reference manual ADSP-21000 ADSP21060 ADSP-21060 ADSP-21061 ADSP-21062 AOS PACKING 0X001E

    TMS 3455

    Abstract: FC540 A7WE A04E Integral pc2-5300 DDR2 FC530-B
    Text: 240pin DDR2 MetaSDRAM Registered DIMM based on 1Gb version C This Hynix 8GB DDR2 MetaSDRAM Registered DIMM contains standard Hynix C-version 1Gb DDR2 SDRAMs in Fine Ball Grid Array FBGA packages on a 240pin glass-epoxy substrate. The module is capable of operating at PC2-4200(DDR2-533) data rate.


    Original     		PDF 240pin PC2-4200 DDR2-533) 1Gx72 HYMP31GP72CMP4 FC540 55max 1240pin TMS 3455 FC540 A7WE A04E Integral pc2-5300 DDR2 FC530-B

    PD17121

    Abstract: CSA8.00MT D17121
    Text: DATA SHEET MOS INTEGRATED CIRCUIT µPD17121 SMALL GENERAL-PURPOSE 4 BIT SINGLE-CHIP MICROCONTROLLER The µPD17121 is a 4-bit single-chip microcontroller containing timer, a power-on/power-down reset circuit, and a serial interface. For the CPU, the µPD17121 employs a 17K architecture using general registers. The new architecture allows


    Original     		PDF PD17121 PD17121 PD17P133, CSA8.00MT D17121

    chn 725

    Abstract: ADSP-21065L CHN23 chn45
    Text: ,17 558379(&725 $''5(66(6 Figure F-0. Table F-0. Listing F-0. Table F-1 lists all processor interrupts according to their bit position in the IRPTL and IMASK registers. Four memory locations separate each interrupt vector. For each vector, Table F-1 also lists the address, mnemonic (not required by the assembler), and priority.


    Original     		PDF 0x0000 0x0002 ADSP-21065L chn 725 CHN23 chn45

    CIRCUIT DIAGRAM 7404

    Abstract: 000-3FF EM78451 EM78451AP EM78451AQ
    Text: EM78451 8-Bit Microcontroller Product Specification DOC. VERSION 1.2 ELAN MICROELECTRONICS CORP. May 2004 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo


    Original     		PDF EM78451 EM78451AP EM78451AQ CIRCUIT DIAGRAM 7404 000-3FF EM78451 EM78451AP EM78451AQ

    Untitled

    Abstract: No abstract text available
    Text: TDA7522 Digital Servo & Decoder PRODUCT PREVIEW • BUILT IN 8Bit MICROCONTROLLER STANDARD ST7 with: - 24 KByte ROM available for ST7 & Servo-Audio DSP - 1024Byte RAM, including 128byte stack - 4KByte RAM for CD-Text memory (for 1block) - Built in R-W subcode buffer (Max. 144Byte


    OCR Scan     		PDF TDA7522 1024Byte 128byte 144Byte 16bit TQFP80 1024x1r TQFP80

    fr1502

    Abstract: fr1502e
    Text: WESTERN DIGITAL C O R P O R A T I O N FR1502 FR1502 First-ln/First-Out Buffer Register FEATURES GENERAL DESCRIPTION • 40 C H A R A C T E R S BY 9 BITS The FIFO First-In/First-Out Storage Chip is an asynchron­ ous memory organized in a nine-bit by forty-character stack.


    OCR Scan     		PDF FR1502 FR1502 fr1502e

    pulse transformer 1553

    Abstract: 01C0-023F
    Text: B 0B BUS-65529 ILC DATA DEVICI CORPORATION«. MIL-STD-1553 BC/RT/MT IBM PC/AT INTERFACE UNIT FEATURES DESCRIPTION Background Mode Operation prevents inadvertent access to the card during power-on self-test. On-board Interrupt Mask and Interrupt Status Registers support flexible opera­


    OCR Scan     		PDF BUS-65529 MIL-STD-1553 BUS-65529 MIL-STD-1553B BUS-61560 1553B s5529 L-75-47, pulse transformer 1553 01C0-023F

    MC68060

    Abstract: MC68LC060 M68000 M68060 MC68EC060 idle bus
    Text: SECTION 3 INTEGER UNIT This section describes the organization of the MC68060 integer unit and presents a brief description of the associated registers. Refer to Section 4 Memory Management Unit for details concerning the paged memory management unit MMU programming model and to


    OCR Scan     		PDF MC68060 M68060 MC68LC060 M68000 MC68EC060 idle bus

    557 timer connections

    Abstract: M68300 MC68349 avr dragon 439 motorola
    Text: INDEX — A— Serial Interface, 5-59 A0 Signal, 3-8 Sources, 5-56 A1 Signal, 3-8 Background Processing State, 5-54 Access Time Base Address Registers, 4-33 Address Access Time, 10-6 Baud Rate Generator, 8-3, 8-5, 8-8 Chip Select Access Time, 10-6 BCD and Extended Instruction Table, 5-98


    OCR Scan     		PDF MC68349 INDEX-10 557 timer connections M68300 avr dragon 439 motorola

    D17120

    Abstract: ZPD ITT diode 3 3 BA 9706 K D1712
    Text: DATA SHEET NEC MOS INTEGRATED CIRCUIT SMALL GENERAL-PURPOSE 4 BIT SINGLE-CHIP MICROCONTROLLER The/xPD17120isa 4-bit single-chip m icrocontroller containing tim er, a power-on/power-down reset circuit, and a serial interface. For the CPU, the ¡iP D17120 employs a 17K architecture using general registers. The new architecture allows


    OCR Scan     		PDF uPD17120 D17120 PD17P132, PD17120 ZPD ITT diode 3 3 BA 9706 K D1712

    D17121

    Abstract: POE-A uPD17120
    Text: D A T A SHEET MOS INTEGRATED CIRCUIT SMALL GENERAL-PURPOSE 4 BIT SINGLE-CHIP MICROCONTROLLER T h e ¿¿PD17121 is a 4-bit single-chip m ic ro c o n tro lle r c o n taining tim e r, a power-on/power-down reset circuit, and a se rial interface. F o rth e CPU,the/¿PD17121 em p lo ys a 17K architecture using g eneral registers. T h e ne w architecture a llo w s


    OCR Scan     		PDF uPD17121 PD17121 PD17P133, D17121 POE-A uPD17120