Untitled
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
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ONET4291PA
Abstract: SDD11
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
SDD11
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Si6466ADQ
Abstract: S-00984
Text: Si6466ADQ New Product Vishay Siliconix N-Channel 2.5-V G-S MOSFET PRODUCT SUMMARY VDS (V) 20 rDS(on) (W) ID (A) 0.014 @ VGS = 4.5 V 8.1 0.020 @ VGS = 2.5 V 6.6 D TSSOP-8 8 D 7 S 3 6 S 4 5 D D 1 S 2 S G D Si6466ADQ * Source Pins 2, 3, 6 and 7 must be tied common.
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Si6466ADQ
S-00984--Rev.
15-May-00
S-00984
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Untitled
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
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QFN 64 PACKAGE rth
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
QFN 64 PACKAGE rth
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Untitled
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
|
ONET4291PA
Abstract: SDD11
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
SDD11
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Si3585DV
Abstract: No abstract text available
Text: Si3585DV New Product Vishay Siliconix N- and P-Channel 20-V D-S MOSFET PRODUCT SUMMARY VDS (V) N-Channel 20 P-Channel –20 rDS(on) (W) ID (A) 0.125 @ VGS = 4.5 V 2.4 0.200 @ VGS = 2.5 V 1.8 0.200 @ VGS = –4.5 V –1.8 0.340 @ VGS = –2.5 V –1.2 D1
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Original
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Si3585DV
S-00982--Rev.
15-May-00
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Untitled
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
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ONET4291PARGVR
Abstract: ONET4291PA SDD11
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PARGVR
ONET4291PA
SDD11
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Untitled
Abstract: No abstract text available
Text: ONET4291PA www.ti.com SLLS671 – SEPTEMBER 2005 1-Gbps to 4.25-Gbps Rate-Selectable Limiting Amplifier FEATURES • • • • • • • • Multirate Operation from 1 Gbps up to 4.25 Gbps Loss-of-Signal Detection LOS Two-Wire Digital Interface Digitally Selectable LOS Threshold
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Original
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PDF
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ONET4291PA
SLLS671
25-Gbps
16-Terminal
25-Gbps,
125-Gbps,
0625-Gbps
ONET4291PA
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Untitled
Abstract: No abstract text available
Text: S E M Revised Ja nuary 1999 I C O N D U C T O R TM 74ACT818 8-Bit Diagnostic Register General Description Features The AC T818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for perform ing serial diagnostics a nd /or w ritable control store loading.
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74ACT818
74ACT818
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Untitled
Abstract: No abstract text available
Text: J uly 1988 Revised D ecem ber 1998 SE M ¡CONDUCTOR TM 74ACT843 9-Bit Transparent Latch General Description Features T h e AC T843 bus interface latch is designed to elim inate the extra packages required to buffer existing latches and provide extra data w idth for w id e r address/data paths.
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74ACT843
T843SC
24-Lead
S-013,
74ACT843SPC
S-010,
74ACT843
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74LS260N
Abstract: 54LS260J
Text: S E M IC O N D U C T O R tm DM74LS260 Dual 5-Input NOR Gate General Description This device contains tw o individual five input gates, each of w hich perform the logic N OR function. Connection Diagram D ual-ln-Line Package 14 2 T 13 r 5 * JO 6 _ | 1_ 9-
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DM74LS260
DS009824-1
54LS260J,
54LS260W
74LS260M
74LS260N
S009824
14-Lead
54LS260J
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm DM74LS273 8-Bit Register with Clear General Description Features The ’LS273 is a high speed 8-bit register, consisting of eight D-type flip-flops with a com m on C lock and an asynchronous active LOW M aster Reset. This device is supplied in a 20-pin
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DM74LS273
LS273
20-pin
DS009825-1
DM54LS273E,
DM54ericas
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Untitled
Abstract: No abstract text available
Text: A I R C H I L D Ju|y 1988 Revised D ecem ber 1998 SEMICONDUCTOR TM 74ACT843 9-Bit Transparent Latch General Description Features T h e AC T843 bus interface latch is designed to elim inate the extra packages required to buffer existing latches and provide extra data w idth for w id e r address/data paths.
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OCR Scan
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PDF
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74ACT843
T843SC
74ACT843SPC
24-Lead
S-013,
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74AC299
Abstract: 74AC299PC 74AC299SC 74AC299SJ 74ACT299 M20D MS-001
Text: R e v is e d O c to b e r 199 8 74AC299 • 74ACT299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features T h e A C /A C T 2 9 9 is a n 8-bi1 u n iv e rs a l s h ift/s to ra g e re g is te r w ith 3-S T A T E o u tp u ts . F o u r m o d e s o f o p e ra tio n a re p o s s i
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74AC299
74ACT299
AC/ACT299
74AC299
74AC299PC
74AC299SC
74AC299SJ
74ACT299
M20D
MS-001
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100323PC
Abstract: 100323QC F100K MO-047 MS-011 N24E V28A
Text: n U 'y19!8 M K icoo R e v is e d N o v e m b e r 199 9 TM 100323 Low Power Hex Bus Driver General Description Features T h e 1 0 0 3 2 3 is a m o n o lith ic d e v ic e c o n ta in in g s ix b u s d riv • 5 0 % p o w e r re d u c tio n o f th e 1 0 0 1 2 3
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JDuly19H88N
F100K
100323PC
100323QC
MO-047
MS-011
N24E
V28A
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S008A
Abstract: S008C s0044 kpe 503 M68HC11KMNPEVS PID code written in c language S0042 "saturation arithmetic" INT6811
Text: Order this document by AN1215/D MOTOROLA SEMICONDUCTOR APPLICATION NOTE AN 1215 PID Routines for MC68HC11K4 AND MC68HC11N4 Microcontrollers By James W. Gray INTRODUCTION PID proportional, integral, derivative compensation is one of the most common forms of closed-loop
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AN1215/D
MC68HC11K4
MC68HC11N4
S008A
S008C
s0044
kpe 503
M68HC11KMNPEVS
PID code written in c language
S0042
"saturation arithmetic"
INT6811
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Untitled
Abstract: No abstract text available
Text: R C H U - P S E M IC O N D U C T O R tm DM74LS534 Octal D-Type Flip-Flop With General Description The ’LS534 is a high speed, low pow er octal D -type flip-flop featuring separate D -type inputs for each flip-flop and 3-STATE outputs for bus oriented applications. A buffered
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DM74LS534
LS534
LS374
20-Lead
DM74LS534WM
DM74LS534N
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74LS395N
Abstract: No abstract text available
Text: I R C H I L D S E M IC O N D U C T O R T M DM74LS395 4-Bit Shift Register with 3-STATE Outputs General Description Features The LS395 is a 4-bit shift register with 3-STATE outputs and can operate in either a synchronous parallel load o r a serial sh ift-right m ode, as determ ined by th e S e lect input. An asyn
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DM74LS395
LS395
74LS395N
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Untitled
Abstract: No abstract text available
Text: R C H II_ D •M ICO N DUCTO R r DM74LS299 8-Input Universal Shift/Storage Register with Common Parallel I/O Pins General Description Features The ’LS299 is an 8-bit universal shift/storage register with 3-STATE outputs. Four modes of operation are possible:
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DM74LS299
LS299
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74LS136N
Abstract: 74ls136m DM74LS1
Text: S E M IC O N D U C T O R tm DM74LS136 Quad 2-Input Exclusive-OR Gate with Open-Collector Outputs General Description This device contains fo u r independent gates, each of which perform s the logic exclusive-O R function. Connection Diagram D ual-ln-Line Package
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DM74LS136
74LS136M
74LS136N
S009819
DM74LS1
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Untitled
Abstract: No abstract text available
Text: Revised January 1999 EMICQNDUCTGR tm 74ACT818 8-Bit Diagnostic Register General Description Features The AC T818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for perform ing serial diagnostics a nd /or w ritable control store loading.
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74ACT818
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