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    Microchip Technology Inc RTAX2000S-CGS624VX512

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    Microchip Technology Inc RTAX2000SL-1CGS624EX512

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    Microchip Technology Inc RTAX2000S-1CGS624EX507

    FPGA RTAX-S Family 2M Gates 21504 Cells 649MHz 0.15um Technology 1.5V 624-Pin CCGA - Bulk (Alt: RTAX2000S-1CGS624E)
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    Microchip Technology Inc RTAX2000S-1CGS624BX3

    Radiation-Tolerant FPGA 2000000 Gates 9856Register 8I/O Bank 624-Pin CCGA - Bulk (Alt: RTAX2000S-1CGS624B)
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    RTAX2 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    Untitled

    Abstract: No abstract text available
    Text: Prototyping Microsemi Rad-Tolerant Devices Microsemi™ Prototyping CQFP PACKAGE Aldec RTAX-S/SL Prototyping Adaptors RTAX250S/SL RTAX1000S/SL RTAX2000S/SL RTAX4000S CQ208 CCGA/LGA PACKAGE Aldec and Microsemi have joined together, offering a new, innovative,


    Original     		PDF RTAX250S/SL RTAX1000S/SL RTAX2000S/SL RTAX4000S CG624 CQ352 CG1152 CG1272 RTSX32SU RTSX72SU

    verilog hdl code for matrix multiplication

    Abstract: vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code
    Text: Application Note AC319 Using EDAC RAM for RadTolerant RTAX-S/SL and Axcelerator FPGAs Applies to EDAC Core from Libero IDE v7.2 and Newer Introduction The newest Actel designed-for-space field programmable gate array FPGA family, RTAX-S/SL, is a highperformance, high-density, antifuse-based FPGA with embedded user static RAM (SRAM). Based on the


    Original     		PDF AC319 verilog hdl code for matrix multiplication vhdl code for pipelined matrix multiplication vhdl code hamming verilog code for matrix multiplication vhdl code for matrix multiplication vhdl code hamming edac memory Core from Libero verilog code hamming hamming code FPGA vhdl coding for hamming code

    A3P3000

    Abstract: RTAX2000S-1 A3P3000-2 APA1000-STD ProASIC3
    Text: Baseline ISO/IEC 10918-1 JPEG Compliance  Programmable Huffman Tables JPEG-C Baseline JPEG Codec Core two DC, two AC and  Programmable quantization tables (up to four)  Up to 4 color components (op- tionally extendable to 255 components)  Supports all possible scan confi-


    Original     		PDF

    IEEE-1754

    Abstract: leon3 processor vhdl leon3 vhdl model sparc v8 floatingpoint addition vhdl VHDL code for floating point addition processor control unit vhdl code leon3 RTAX2000S RTAX2000S-1
    Text: IEEE-STD-754 Floating Point Unit GRFPU Lite / GRFPU-FT Lite CompanionCore Data Sheet GAISLER Features Description • IEEE Std 754 compliant, supporting all rounding modes and exceptions • Operations: add, subtract, multiply, divide, square-root, convert, compare, move, abs,


    Original     		PDF IEEE-STD-754 64-bit IEEE-1754 leon3 processor vhdl leon3 vhdl model sparc v8 floatingpoint addition vhdl VHDL code for floating point addition processor control unit vhdl code leon3 RTAX2000S RTAX2000S-1

    verilog code for fir filter using DA

    Abstract: A3P1500 vhdl code of 32bit floating point adder digital FIR Filter verilog code digital FIR Filter VHDL code fir vhdl code FIR Filter verilog code vhdl code for floating point adder IQ GENERATOR CODE WITH VHDL RTAX2000
    Text: CoreFIR Finite Impulse Response FIR Filter Generator Product Summary Core Deliverables • Intended Use • – Finite Impulse Response (FIR) Filter for Actel FPGAs • Key Features • – • Self-Checking – Executable Tests Generated Output against Algorithm


    Original     		PDF

    1553b VHDL

    Abstract: Actel 1553b fpga 1553B transistor BC 584 MIL-STD-1553B FPGA RT MIL-STD-1553B ACTEL FPGA manchester verilog decoder vhdl code manchester encoder mil-std-1553b SPECIFICATION transistor BC 490
    Text: Core1553BBC MIL-STD-1553B Bus Controller Product Summary • Intended Use • 1553B Bus Controller BC • DMA Backend Interface to External Memory Synthesis and Simulation Support Key Features • • • • • • Supports MIL-STD-1553B Interfaces to External RAM


    Original     		PDF Core1553BBC MIL-STD-1553B 1553B MIL-STD-1553B 128kbytes Core1553BRT 1553b VHDL Actel 1553b fpga 1553B transistor BC 584 MIL-STD-1553B FPGA RT MIL-STD-1553B ACTEL FPGA manchester verilog decoder vhdl code manchester encoder mil-std-1553b SPECIFICATION transistor BC 490

    LGA 478 SOCKET PIN LAYOUT

    Abstract: RTAX2000
    Text: v5.2 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		PDF TM1019 LGA 478 SOCKET PIN LAYOUT RTAX2000

    Untitled

    Abstract: No abstract text available
    Text: Advanced v0.3  RTAX-S Family FPGAs Sp e ci a l F ea t ur es f o r Sp a ce • Up to 10,752 SEU Hardened Flip-Flops Eliminate Software TMR Necessity >LET th 37 LET, GEO SEU Rate <10-10 Errors/Bit-Day • Expected SRAM Upset Rate of <10-10 Errors/Bit-Day with


    Original     		PDF 32-Bits 114specifications

    RTAX2000

    Abstract: schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S
    Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		PDF TM1019 com/documents/CQ352FPGA RTAX2000 schematic diagram 2 sc 1020 RTAX1000 RTAX250 Synplify tmr RTAX2000S

    RTAX2000

    Abstract: TB125 24mA-drive 352-Pin
    Text: RTAX-S RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment Clamp Diode Hot Insertion 5V Tolerance Input Buffer Output Buffer LVTTL No Yes No Enabled/Disabled 3.3V PCI Yes No Yes1 Enabled/Disabled LVCMOS2.5V No Yes


    Original     		PDF JESD8-11) RTAX2000 TB125 24mA-drive 352-Pin

    ECSS-E-50-12A

    Abstract: ECSS-E-50-12 SpaceWire
    Text: SpaceWire Codec with RMAP GRSPW / GRSPW-FT CompanionCore Data Sheet Features Description • Full implementation of SpaceWire standard ECSS-E-50-12A • Protocol ID extension ECSS-E-50-11 • RMAP protocol ECSS-E-50-11 • AMBA AHB back-end with DMA • Descriptor-based autonomous multi-packet


    Original     		PDF ECSS-E-50-12A ECSS-E-50-11 ECSS-E-50-12A ECSS-E-50-12 SpaceWire

    RTAX2000

    Abstract: footprint cqfp 280 RTAX1000S actel cqfp 84
    Text: A dv an c ed v0 .5 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETth > 60 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		PDF TM1019 RTAX2000 footprint cqfp 280 RTAX1000S actel cqfp 84

    56 pin edac connector

    Abstract: PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical
    Text: v2.0 RTAX-S RadTolerant FPGAs Designed for Space • • • • • • • • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		PDF TM1019 56 pin edac connector PCB footprint cqfp 132 Silicon Sculptor II ACTEL CCGA 624 mechanical

    RTAX2000

    Abstract: rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3
    Text: v5.1 RTAX-S/SL RadTolerant FPGAs Radiation Performance Leading-Edge Performance • • • • • • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg


    Original     		PDF TM1019 RTAX2000 rtax4000 CDB 455 C34 IO358 DIODE SMD V05 128X3

    RTAX1000S

    Abstract: RTAX2000S CQFP352 RTAX-S jtag pull-up resistor 10K RTAX2000 RTAX-S library RAM EDAC SEU AC173 ACTEL
    Text: Application Note AC173 Differences Between RTAX-S/SL and Axcelerator Introduction RTAX-S/SL is Actel's latest FPGA family designed for space applications and is a derivative of the Actel Axcelerator FPGA family. The RTAX-S/SL architecture is based on Actel's multi-featured, high-density AX


    Original     		PDF AC173 RTAX1000S RTAX2000S CQFP352 RTAX-S jtag pull-up resistor 10K RTAX2000 RTAX-S library RAM EDAC SEU AC173 ACTEL

    RTAX1000SL

    Abstract: RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector
    Text: RTAX-S/SL RadTolerant FPGAs Detailed Specifications Table 2-1 • I/O Features Comparison I/O Assignment 3.3 V LVTTL Clamp Diode Hot Insertion / Cold Sparing 1 Yes 5V Tolerance Input Buffer Output Buffer No 1 Yes Enabled/Disabled Enabled/Disabled 3.3 V PCI


    Original     		PDF JESD8-11) RTAX1000SL RTAX1000S RTAX1000S-SL RTAX250SL RTAX2000SL RTAX2000S RTAX250S RTAX4000S 56 pin edac connector

    ACTEL CCGA 1152 mechanical

    Abstract: AX125 AX2000 CQ208 CQ256 CS180 FG256 PQ208 Trd16 Axcelerator Family FPGAs
    Text: v2.8 Axcelerator Family FPGAs u e Leading-Edge Performance • • • • – 350+ MHz System Performance 500+ MHz Internal Performance High-Performance Embedded FIFOs 700 Mb/s LVDS Capable I/Os Specifications • • • • • Up to 2 Million Equivalent System Gates


    Original     		PDF

    pressure sensor MATLAB program

    Abstract: actel rad pressure sensor 90nm cmos RTAX250S-1000S
    Text: A passion for performance. Digital and Mixed-Signal custom, semi-custom, off-the-shelf designs with Aeroflex Gaisler IP Guaranteed radiation performance QML-V, QML-Q, military, medical, industrial grades Category 1A Trusted Accreditation We connect the real


    Original     		PDF 0E-10 pressure sensor MATLAB program actel rad pressure sensor 90nm cmos RTAX250S-1000S

    a2f500m3g

    Abstract: vhdl code for 8 bit ODD parity generator
    Text: Core16550 v3.1 HandBook Core16550 v3.1 HandBook Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Supported Device Families . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4


    Original     		PDF Core16550 a2f500m3g vhdl code for 8 bit ODD parity generator

    Untitled

    Abstract: No abstract text available
    Text: Adva nce P roduct Brie f RTAX-DSP Radiation-Tolerant FPGAs Projected Radiation Performance • • • • • SEU-Hardened Registers Eliminate the Need for TripleModule Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeV-cm2/mg – SEU Rate < 10-10 Errors/Bit-Day in Worst-Case


    Original     		PDF TM1019

    Untitled

    Abstract: No abstract text available
    Text: Revision 16 RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs Radiation Performance Specifications • SEU-Hardened Registers Eliminate the Need for Triple-Module Redundancy TMR – Immune to Single-Event Upsets (SEU) to LETTH > 37 MeVcm2/mg – SEU Rate < 10-10 Errors/Bit-Day (worst case GEO)


    Original     		PDF TM1019 MIL-STD-883B

    actel FG484 package mechanical drawing

    Abstract: RTAX2000S-CQ352 actel package mechanical drawing FG484 CQ352 2-CQFP SK-AX2000-CQ352RTFG896 sk-ax FG896 rtax2000* cqfp
    Text: &4 3 WR )%*$ $GDSWHU 6RFNHWV July 2004 Table of Contents Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 CQFP to FBGA Adapter Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3


    Original     		PDF CQ352 FG484 actel FG484 package mechanical drawing RTAX2000S-CQ352 actel package mechanical drawing 2-CQFP SK-AX2000-CQ352RTFG896 sk-ax FG896 rtax2000* cqfp

    RTAX2000S

    Abstract: LEON3FT sparc v8 FLOATING POINT Co Processor
    Text: ^ LEON3-FT G A IS L E R R E S E A R C H RTAX2000S nçter Introduction The LE0N3-FT processor is available as a standard component using the Actel RTAX2000S Field Programmable Gate Array. The fault tolerant design of the processor in combination with the radiation tolerant


    OCR Scan     		PDF RTAX2000S RTAX2000S 32-bit 30DMIPS CQ352B LEON3FT sparc v8 FLOATING POINT Co Processor

    ebc81

    Abstract: EBC81 TUBE EBC41 philips ebc41 Scans-0017837 nf schaltungen
    Text: PHILIPS EBC41 DUODIODE-TRIODE for use as A.F. amplifier DUODIODE-ÏRIODE pour l'utilisation comme amplifica­ trice B.F. DUODIODE-TRIODE zur Verwendung als NF-Verstärker Heating: indirect by A.C. or D.C.; parallel supply Chauffage: indirect par C.A. ou C.C.;


    OCR Scan     		PDF Jrax22t EBC41 7R02975 ebc81 EBC81 TUBE EBC41 philips ebc41 Scans-0017837 nf schaltungen