pt45
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.2, June 2006 LatticeSC Family Data Sheet Introduction June 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
110mW
VCC12.
LFSC25
900-Ball
pt45
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.4b, February 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
SC115
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.6, August 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
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PDF
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2-bit comparator
Abstract: LFSC3GA15E-5F900I PR77A PR55D pr94a diode transistor pt36c pt36C PB110C pb127d PB138
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.8, November 2007 LatticeSC/M Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
2-bit comparator
LFSC3GA15E-5F900I
PR77A
PR55D
pr94a diode
transistor pt36c
pt36C
PB110C
pb127d
PB138
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
|
PDF
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AS-81824
Abstract: M81824 D-436-89 AS81824 M81824/1-2 steinel hl 1802e cv-1981 HL1802E Raychem splice tool raychem SEALING END
Text: SPECIFICATION CONTROL DRAWING 2 3 1 Item #1: SEALING SLEEVE 4 Item #2: CRIMP SPLICE MATERIALS 1. INSULATION SLEEVE: Heat-shrinkable, transparent blue, radiation cross-linked modified polyvinylidene flouride. 2. INTEGRAL MULTI-WIRE SEAL: Low outgassing immersion resistant thermoplastic.
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Original
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AMS-QQ-N-290.
D-436-88
D-436-89
D-436-90
CV-1981
HL-1802E
PR52D
D-436-88/-90
D060019
AS-81824
M81824
D-436-89
AS81824
M81824/1-2
steinel hl 1802e
cv-1981
HL1802E
Raychem splice tool
raychem SEALING END
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PDF
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PB68C
Abstract: LFSCM3GA40EP1
Text: LatticeSC Family Data Sheet DS1004 Version 01.4a, January 2007 LatticeSC Family Data Sheet Introduction November 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LVPECL33
SC115
PB68C
LFSCM3GA40EP1
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PDF
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ROSENBERGER 32K243
Abstract: PL80B 32K243 fairchild aa30 pr77a Rosenberger HW-USBN-2A Schematic HW-USB PT60 PR76A
Text: LatticeSC PCI Express x8 Evaluation Board User’s Guide April 2007 Revision: EB19_01.3 LatticeSC PCI Express x8 Evaluation Board User’s Guide Lattice Semiconductor Introduction This user’s guide describes the LatticeSC PCI Express x8 Evaluation Board featuring the LatticeSC
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Original
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LFSCM3GA80EP1-6FC1152C
im02SMT
1000PF-0402SMT
ROSENBERGER 32K243
PL80B
32K243
fairchild aa30
pr77a
Rosenberger
HW-USBN-2A Schematic
HW-USB
PT60
PR76A
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.3, August 2006 LatticeSC Family Data Sheet Introduction August 2006 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
110mW
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PDF
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pb127d
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.2, December 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
pb127d
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PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 01.9, January 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os
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Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
|
PDF
|
Untitled
Abstract: No abstract text available
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.0, March 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
|
PDF
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PB110C
Abstract: PB124A pt36C SCM15 BA5 904 AF P PL80B PR55D pr94a diode transistor pt36c transistor pt42c
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM
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Original
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DS1004
DS1004
500MHz
700MHz
600Mbps
125Gbps)
1A-10
1152-ball
1704-ball
PB110C
PB124A
pt36C
SCM15
BA5 904 AF P
PL80B
PR55D
pr94a diode
transistor pt36c
transistor pt42c
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PDF
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|
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PB97A
Abstract: PR45C pr77a
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.4, December 2011 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
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DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
1A-10
1152-ball
1704-ball
PB97A
PR45C
pr77a
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PDF
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PB80D
Abstract: PR87A PR98A PR96A PB110C pr94a diode pt36C pr77a transistor pt36c transistor pt42c
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.3, January 2010 LatticeSC/M Family Data Sheet Introduction January 2010 Data Sheet DS1004 Features – 1 to 7.8 Mbits memory – True Dual Port/Pseudo Dual Port/Single Port – Dedicated FIFO logic for all block RAM
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Original
|
DS1004
DS1004
500MHz
700MHz
600Mbps
125Gbps)
1A-10
1152-ball
1704-ball
PB80D
PR87A
PR98A
PR96A
PB110C
pr94a diode
pt36C
pr77a
transistor pt36c
transistor pt42c
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
|
PDF
|
M81824
Abstract: ice 0565 steinel hl 1802e HL1802E Raychem splice M81824 cv-1981 D-436-89 mil spec m81824 AS81824 Steinel hl1802e
Text: SPECIFICATION CONTROL DRAWING 2 3 1 Item #1: SE A L IN G SL E EV E 4 Item #2: C R IM P SPL ICE MATERIALS 1. INSULATION SLEEVE: Heat-shrinkable, transparent blue, radiation cross-linked modified polyvinylidene flouride. 2. INTEGRAL MULTI-WIRE SEAL: Low outgassing immersion resistant thermoplastic.
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Original
|
AMS-QQ-N-290.
D-436-88
D-436-89
D-436-90
CV-1981
HL-1802E
PR52D
M81824
ice 0565
steinel hl 1802e
HL1802E
Raychem splice M81824
mil spec m81824
AS81824
Steinel hl1802e
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PDF
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Untitled
Abstract: No abstract text available
Text: LatticeSC Family Data Sheet DS1004 Version 01.5, March 2007 LatticeSC Family Data Sheet Introduction March 2007 Preliminary Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 132 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
|
Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
LFSC25
FF1020
LFSC80
|
PDF
|
transistor pt36c
Abstract: pb127d PB110C pr82a PB80D umi u26 BA5 904 AF P PB124A PL84C PR55D
Text: LatticeSC/M Family Data Sheet DS1004 Version 02.1, June 2008 LatticeSC/M Family Data Sheet Introduction January 2008 Data Sheet DS1004 Features • High Performance FPGA Fabric • 15K to 115K four input Look-up Tables LUT4s • 139 to 942 I/Os • 700MHz global clock; 1GHz edge clocks
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Original
|
DS1004
DS1004
700MHz
600Mbps
125Gbps)
105mW
transistor pt36c
pb127d
PB110C
pr82a
PB80D
umi u26
BA5 904 AF P
PB124A
PL84C
PR55D
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PDF
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