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    Tektronix Inc DPO77002SX

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    PO77 Datasheets (1)

    Part ECAD Model Manufacturer Description Curated Type PDF
    PO7726 Motorola European Master Selection Guide 1986 Scan PDF

    PO77 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    circuit diagram of Tri-State Buffer using CMOS

    Abstract: verilog code for UART with BIST capability block diagram for UART with BIST capability tri state AT28 vhdl code for flip-flop vhdl pid verilog code pid controller free vhdl code for usart
    Text: Features • 0.5 µm Drawn Gate Length 0.45 µm Leff Sea-of-Gates Architecture with • • • • • Triple-level Metal Embedded E2 Memory up to 256 Kb 3.3V Operation with 5.0V Tolerant Input and Output Buffers High-speed, 200 ps Gate Delay, 2-input NAND, FO = 2 Nominal


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    PDF 10T/100 ATL50/E2 1173D 11/99/1M circuit diagram of Tri-State Buffer using CMOS verilog code for UART with BIST capability block diagram for UART with BIST capability tri state AT28 vhdl code for flip-flop vhdl pid verilog code pid controller free vhdl code for usart

    ATL35

    Abstract: CL11 PO22 PO33 PO44 PO55 ATL35/208
    Text: ATL35 I/O Buffer Cell Library-1.0-12/97 ATL35 0.35µ I/O Buffer Cell Library I/O Buffer Naming Convention . 8-2 I/O Site: Pad and Sub-Sections . 8-2


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    PDF ATL35 CL11 PO22 PO33 PO44 PO55 ATL35/208

    AOI222

    Abstract: AOI2223 AOI222H MH1099 MH1242 0.35-um CMOS standard cell library inverter
    Text: Features • High Speed - 170 ps Gate Delay - 2 Input NAND, FO = 2 Nominal • Up to 1.6 Million Used Gates and 596 Pads, with 3.3V, 3V, and 2.5V Libraries • System Level Integration Technology Cores on Request: SRAM and TRAM (Gate Level or Embedded) • I/O Interfaces:


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    PDF 5962-01B01 4138E AOI222 AOI2223 AOI222H MH1099 MH1242 0.35-um CMOS standard cell library inverter

    AVR 8515 microcontroller

    Abstract: FPGA AMI coding decoding tri state AOI222 AOI2223 AOI2223H AOI222H ATL35 0.35-um CMOS standard cell library inverter
    Text: Features • System Level Integration Technology • 0.35 µm Geometry in Triple-level Metal • I/O Interfaces; CMOS, LVTTL, LVDS, PCI, USB – Output Currents up to 20 mA, 5V Tolerant I/O • Embedded Flash Memory with Capacities of 1Mbit, 2Mbit or 4Mbit


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    PDF 22-bit 16-bit 1184B 03/00/xM AVR 8515 microcontroller FPGA AMI coding decoding tri state AOI222 AOI2223 AOI2223H AOI222H ATL35 0.35-um CMOS standard cell library inverter

    tristate buffer

    Abstract: smd transistor AO HEX TO DECIMAL tristate buffer cmos A101 A201 MH1099E MH1156E PO11F MH1332E
    Text: Features • High Speed - 180 ps Gate Delay - 2 Input NAND, FO = 2 nominal • Up to 1.198M Used Gates and 512 Pads with 3.3V, 3V and 2.5V Libraries when Tested to Space Quality Grades • Up to 1.6M Used Gates and 596 Pads with 3.3V, 3V and 2.5V Libraries when Tested to


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    PDF 4110F tristate buffer smd transistor AO HEX TO DECIMAL tristate buffer cmos A101 A201 MH1099E MH1156E PO11F MH1332E

    P2624

    Abstract: 12-24 volt power cord HW-64
    Text: ACCESSORIES ADAPTERS – 19” TO 24” VERTICAL CABINETS, OPTIMA 19” INSTRUMENT CASES SPECIFY COLOR Used to install 19” panel width blowers, fan, and grille/filter assemblies in 24” panel width enclosures. Adapters are non-structural, and blower must be supported at rear.


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    PDF WS-021920 WS-022420 WS-021924 WS-022424 WS-021930 WS-022430 P2624 12-24 volt power cord HW-64

    atmel 216

    Abstract: ECL IC NAND CQFP 256 PIN actel Atmel 642 PO22 tri state ATL35 atmel 334 20PCI atmel h 952
    Text: Features • High-speed - 150 ps Gate Delay - 2-input NAND, FO = 2 nominal • Up to 2.7 Million Used Gates and 976 Pins • System Level Integration Technology – Cores: ARM7TDMI and AVR RISC Microcontrollers, OakDSP™ and LodeDSPCores™, 10T/100 Ethernet MAC, USB and PCI Cores


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    PDF 10T/100 ATL35 0802E 10/99/0M atmel 216 ECL IC NAND CQFP 256 PIN actel Atmel 642 PO22 tri state atmel 334 20PCI atmel h 952

    PO77

    Abstract: No abstract text available
    Text: ATL25 I/O Buffer Cell Library - Preliminary - 1.1 - 09/99 ATL25 0.25µ I/O Buffer Cell Library Preliminary I/O Buffer Naming Convention . 8-2 I/O Site: Pad and Sub-sections. 8-2


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    PDF ATL25 PO77

    Untitled

    Abstract: No abstract text available
    Text: PO11 ATL25 CMOS Gate Array cell data sheets 4.0 Description: Tristate output buffer, 2mA drive. Characterization: 25C, 3.3v, Nominal Process Cell area sites : 0.0 Pin caps(pF): AO=0.060, E0=0.060 Typical delay times (slope in ns/pF; intercept in ns; input transition = 0.600ns):


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    PDF ATL25 600ns)

    PO77F

    Abstract: PO55F 090569 PO55V 24236 PO11F 328-529 po11s PX2L PO22
    Text: ATL35 I/O Buffer Cell Library-1.4-09/99 ATL35 0.35µ I/O Buffer Cell Library I/O Buffer Naming Convention . 8-2 I/O Site: Pad and Sub-Sections . 8-2


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    PDF ATL35 PO22V5 PO44V5 PO77F PO55F 090569 PO55V 24236 PO11F 328-529 po11s PX2L PO22

    PO88

    Abstract: ttl buffer AOI222 AOI2223 AOI2223H AOI222H MH1099 MH1242 PRD21 PRD29V5
    Text: Features • High Speed - 170 ps Gate Delay - 2 input NAND, FO=2 nominal • Up to 1.6 Million Used Gates and 596 pads, with 3.3V, 3V, and 2.5V libraries • System Level Integration Technology Cores on request: SRAM and TRAM (Gate Level or Embedded) • I/O Interfaces:


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    PDF 250MHz 220MHz 800MHz 5962-01B01 PO88 ttl buffer AOI222 AOI2223 AOI2223H AOI222H MH1099 MH1242 PRD21 PRD29V5

    TEMIC PLD

    Abstract: PRU10 PRD8 buffer 8x Structure of D flip-flop DFFSR AOI222 AOI2223 AOI2223H AOI222H MH1099
    Text: MH1 1.6 Million gates Sea of Gates / Embedded Arrays 1. Description The MH1 Series Gate Array and Embedded Array families from TEMIC are fabricated in a 0.35µ CMOS process, with up to 3 levels of metal. This family features arrays with up to 1.6 million routable gates and 600 pins. The


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    PDF

    Transistor Equivalent list po55

    Abstract: atmel 938 on digital code lock using vhdl mini pr credence tester 2042B atmel 532 atmel 422 bsu 479 atmel 424 2042B-ASIC
    Text: ATL25 Series . Design Manual Table of Contents Section 1 ATL25 Series ASIC. 1-1 1.1 1.2


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    PDF ATL25 2042B-ASIC Transistor Equivalent list po55 atmel 938 on digital code lock using vhdl mini pr credence tester 2042B atmel 532 atmel 422 bsu 479 atmel 424

    Transistor Equivalent list po55

    Abstract: Structure of D flip-flop DFFSR tristate buffer sis 968 PO-44Z PRU11 AC/DC drive nec 78054 PO22 tristate buffer cmos
    Text: Features • High Speed - 180 ps Gate Delay - 2 input NAND, FO=2 nominal • Up to 1.198 M Used Gates and 512 Pads with 3.3 V, 3V and 2.5V libraries when tested to space quality grades • Up to 1.6M Used Gates and 596 Pads with 3.3 V, 3V and 2.5V libraries when tested to


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    atmel 952

    Abstract: 2041b IFR 840 Transistor Equivalent list po55 sbl 20100 Atmel 642 po55 "finish line" 642 atmel 422 atmel 530
    Text: ATL35 Series . Design Manual Table of Contents Section 1 ATL35 Series . 1-1


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    PDF ATL35 2041B atmel 952 IFR 840 Transistor Equivalent list po55 sbl 20100 Atmel 642 po55 "finish line" 642 atmel 422 atmel 530

    Untitled

    Abstract: No abstract text available
    Text: PO11 ATL35 CMOS Gate Array cell data sheets 1.0 DESCRIPTION: Tristate output buffer, 2mA drive Truth Table: AO E0 PO11 E0 A0 E0 | P -X | Z 1 | 0 1 1 | 1 P E0 pchn2pad_x1 I1 AO AO gateP gateN outputDRVS1 I3 P I2 nchn2pad_x1 / $Revision: 1.35 $


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    PDF ATL35 25degC

    transistor P239

    Abstract: R33PI transistor 4287 AB P239 9 318 TI P272 w29 transistor P069 P04368 p055 IQB96
    Text: The FPID Family Data Sheet Features Description Device I-Cube's family of FPID devices is available in a variety of I /O densities, ranging from 96 to 320 usable ports. The part number reflects the number of usable I/O s in the device. This family, from the


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    PDF /391L /416L IQ240B /304L /208L IQ160 FP/208L IQ128B /184L FP/184L transistor P239 R33PI transistor 4287 AB P239 9 318 TI P272 w29 transistor P069 P04368 p055 IQB96