Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    PJ4N3KDW Search Results

    SF Impression Pixel

    PJ4N3KDW Price and Stock

    PanJit Semiconductor PJ4N3KDW_R1_00001

    INSTOCK
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Chip 1 Exchange PJ4N3KDW_R1_00001 19,123
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Get Quote
    Avnet Silica PJ4N3KDW_R1_00001 27 Weeks 3,000
    • 1 -
    • 10 -
    • 100 -
    • 1000 -
    • 10000 -
    Buy Now

    PJ4N3KDW Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    PJ4N

    Abstract: No abstract text available
    Text: PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES • RDS ON , VGS@4.0V,IDS@10mA=5.0 0.018(0.45) 0.006(0.15) • RDS(ON), VGS@2.5V,IDS@1mA=7.0 0.087(2.20) 0.074(1.90) • Advanced Trench Process Technology 0.030(0.75) 0.021(0.55)


    Original
    PDF

    Untitled

    Abstract: No abstract text available
    Text: PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected SOT-363 FEATURES Unit:inch mm • Advanced Trench Process Technology 0.087(2.20) 0.074(1.90) • High Density Cell Design For Ultra Low On-Resistance 0.010(0.25) • The MOSFET elements are independent,eliminating interference


    Original
    PDF OT-363 RB500V-40

    Untitled

    Abstract: No abstract text available
    Text: PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES • RDS ON , VGS@2.5V,IDS@1mA=7.0 • RDS(ON), VGS@4.0V,IDS@10mA=5.0 • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • The MOSFET elements are independent,eliminating interference


    Original
    PDF 2011/65/EU 2013-REV

    PJ4N

    Abstract: PJ4N3KDW MARKING GA SOT-363 DM800
    Text: PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected FEATURES • RDS ON , VGS@2.5V,IDS@1mA=7.0Ω • RDS(ON), VGS@4.0V,IDS@10mA=5.0Ω • Advanced Trench Process Technology • High Density Cell Design For Ultra Low On-Resistance • The MOSFET elements are independent,eliminating interference


    Original
    PDF 2002/95/EC OT-363 PJ4N PJ4N3KDW MARKING GA SOT-363 DM800

    PJ4N

    Abstract: marking code ga sot 363 MARKING CODE LA sot363 sot-363 marking DS marking CODE GA sot363 ZE marking sot-363 SOT 363 marking CODE LA sot363 XI PJ4N3KDW
    Text: PJ4N3KDW 30V Dual N-Channel Enhancement Mode MOSFET - ESD Protected SOT-363 FEATURES Unit:inch mm • RDS(ON), VGS@4.0V,IDS@10mA=5.0Ω • Advanced Trench Process Technology 0.087(2.20) 0.074(1.90) • High Density Cell Design For Ultra Low On-Resistance


    Original
    PDF 2002/95/EC IEC61249 OT-363 RB500V-40 PJ4N marking code ga sot 363 MARKING CODE LA sot363 sot-363 marking DS marking CODE GA sot363 ZE marking sot-363 SOT 363 marking CODE LA sot363 XI PJ4N3KDW