MT18DT8144G
Abstract: No abstract text available
Text: 8 MEG x 144 BUFFERED DRAM DIMM DRAM MODULE MT18DT8144G For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT • • • • • • • 200-pin, dual in-line memory module DIMM
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200-pin,
128MB
192-cycle
MT18DT8144G
DQ995
MT18DT8144G
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edo dram 50ns 72-pin simm
Abstract: edo dram 60ns 72-pin simm dm65 edo dram 60ns 72-pin simm 32mb
Text: NOT RECOMMENDED FOR NEW DESIGNS 4, 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs DRAM MODULE MT9D436 X MT18D836 X For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/datasheets FEATURES PIN ASSIGNMENT Front View 72-Pin SIMM 4 Meg x 36 (shown)
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MT9D436
MT18D836
72-Pin
72pin,
048-cycle
MARKI133
edo dram 50ns 72-pin simm
edo dram 60ns 72-pin simm
dm65
edo dram 60ns 72-pin simm 32mb
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Untitled
Abstract: No abstract text available
Text: OBSOLETE 4, 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs MT9D436 MT18D836 DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES • Four-CAS#, ECC-optimized configuration in a 72-pin,
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MT9D436
MT18D836
72-pin,
048-cycle
110ns
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Untitled
Abstract: No abstract text available
Text: OBSOLETE 4, 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs MT9D436 X MT18D836 X DRAM MODULE For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View 72-Pin SIMM 4 Meg x 36 (shown)
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MT9D436
MT18D836
72-Pin
72-pin,
048-cycle
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Untitled
Abstract: No abstract text available
Text: NOT RECOMMENDED FOR NEW DESIGNS 4, 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs DRAM MODULE MT9D436 MT18D836 For the latest data sheet revisions, please refer to the Micron Web site: www.micron.com/datasheets FEATURES • Four-CAS#, ECC-optimized configuration in a 72pin, single in-line memory module SIMM
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MT9D436
MT18D836
72pin,
048-cycle
72-Pin
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MT16LD464AG
Abstract: No abstract text available
Text: 8, 16 MEG x 64 SDRAM DIMMs SYNCHRONOUS DRAM MODULE MT8LSDT864A, MT16LSDT1664A For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View 168-Pin DIMM • PC66-, PC100- and PC133-compliant
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PC66-,
PC100-
PC133-compliant
168-pin,
128MB
096-cycle
-750A1
-745A1
-850A1
-845A1
MT16LD464AG
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dram 72-pin simm 128mb
Abstract: PC133 registered reference design type 760 t85
Text: 8, 16 MEG x 64 SDRAM DIMMs SYNCHRONOUS DRAM MODULE MT8LSDT864A, MT16LSDT1664A For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT Front View 168-Pin DIMM • PC66-, PC100- and PC133-compliant
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PC66-,
PC100-
PC133-compliant
168-pin,
128MB
096-cycle
MT4VR6418AG
256MB
MT8VR12816AG
dram 72-pin simm 128mb
PC133 registered reference design
type 760 t85
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PC133 registered reference design
Abstract: No abstract text available
Text: ADVANCE 32, 64 MEG x 72 REGISTERED SDRAM DIMM SYNCHRONOUS DRAM MODULE MT18LSDT3272DG, MT18LSDT6472DG For the latest data sheet, please refer to the Micron Web site: www.micron.com/mti/msp/html/datasheet.html FEATURES PIN ASSIGNMENT FRONT VIEW 168-PIN DIMM
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168-pin,
PC133-
PC100-compliant
256MB
512MB
64m18
MT8VR12818AG
MT16VR25616AG
PC133 registered reference design
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PC133 registered reference design
Abstract: micron dram code 10EB2
Text: PRELIMINARY‡ 256MB, 512MB x72 184 Pin REGISTERED DDR SDRAM DIMMs DDR SDRAM DIMM MT18VDDT3272G, MT18VDDT6472G For the latest data sheet, please refer to the Micron Web site: www.micron.com/datasheets FEATURES • • • • • • • • • • •
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256MB,
512MB
184-pin,
256MB
MT16VR25616AG
MT16VR25618AG
MT16VR25618AG-840A1
PC133 registered reference design
micron dram code
10EB2
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Untitled
Abstract: No abstract text available
Text: |U |IC=RO N 2 MEG DRAM MODULE X MT18D236 36 DRAM MODULE 2 MEG x 36 DRAM FAST PAGE MODE FEATURES • Common RAS control per side pinout in a 72-pin single-in-line package • High-performance, CMOS silicon-gate process. • Single 5V ±10% power supply • All device pins are fully TTL compatible
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MT18D236
72-pin
052mW
024-cycle
72-Pin
T18D236M
MT180236
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Untitled
Abstract: No abstract text available
Text: MICRON I 4’ 8M E Gx36 ECC-OPTIMIZED DRAM SIMMs TECHNOLOGY, INC. MT9D436X MT18D836 X DRAM MODULE FEATURES PIN ASSIGNMENT Front View • Four-CAS#, ECC-optimized configuration in a 72-pin, single in-line memory module (SIMM) • 16MB (4 Meg x 36) and 32MB (8 Meg x 36)
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MT9D436X
MT18D836
72-pin,
048-cycle
72-Pin
DD-12)
DD-13)
DD-13
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Untitled
Abstract: No abstract text available
Text: m i c r o n • 4 ’ 8 MEG x 3 6 ECC-OPTIMIZED DRAM SIMMs TFf.HNOI ocv. INC. MT9D436 X MT18D836 X DRAM MODULE FEATURES PIN ASSIGNMENT Front View • Four-CAS#, ECC-optimized configuration in a 72-pin, single in-line memory module (SIMM) • 16MB (4 Meg x 36) and 32MB (8 Meg x 36)
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MT9D436
MT18D836
72-pin,
048-cycle
72-pin
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MT18D236
Abstract: No abstract text available
Text: |U|K=RON 2 MEG DRAM MODULE 2 MEG X MT18D236 36 DRAM MODULE X 36 DRAM FAST-PAGE-MODE FEATURES • Common RAS control per side pinout in a 72-pin single-in-line package • High-performance CMOS silicon-gate process. • Single 5V ±10% power supply • All device pins are TTL-compatible
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MT18D236
72-pin
052mW
024-cycle
72-Pin
DE-12)
MT18D236G-6
CYCLE20
MT18D236
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MT1805
Abstract: No abstract text available
Text: M IC R O N 512K DRAM MODULE 512K X X MT18D51236 36 DRAM MODULE 36 DRAM FAST PAGE MODE FEATURES PIN ASSIGNMENT (Top View OPTIONS 72-Pin SIMM (T-12) MT18D51236M/G MARKING • T im ing 60ns access 70ns access 80ns access P ackages L ead less 7 2 -p in SIM M
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MT18D51236
72-pin
512-cycle
MT18D51236M/G
MT18051236
MT1805
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Untitled
Abstract: No abstract text available
Text: ADVANCE MICRON MT9D436 X, MT18D836 X 4 MEG, 8 MEG x 36 DRAM MODULES DRAM MODULE 4 MEG, 8 MEG x 36 • TECHNOLOGY, NC. 16, 32 MEGABYTE, 5V, ECC, EDO PAGE MODE FEATURES PIN ASSIGNMENT Front View • Four CAS# ECC pinout in a 72-pin, single-in-line memory module (SIMM)
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MT9D436
MT18D836
72-pin,
359mW
048-cycle
72-Pin
MT9D436,
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Untitled
Abstract: No abstract text available
Text: MICRON S E M I C O N D U C T O R INC b3E J> b l l l S M T OOGfllHS T3fl • MRN m l^ iic n o N 2 MEG DRAM MODULE X MT18D236 36 DRAM MODULE 2 MEG x 36 DRAM FAST-PAGE-MODE FEATURES PIN ASSIGNMENT Top View • Comm on RA S control per side pinout in a 72-pin
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MT18D236
72-pin
024-cycle
72-Pin
DE-12)
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MT18D236G6
Abstract: No abstract text available
Text: l^ iic n o N 2 MEG X MT18D236 36 DRAM MODULE 2 MEG X 36 DRAM DRAM MODULE FAST PAGE MODE FEATURES • Common RAS control per side pinout in a 72-pin single-in-line package • High-performance, CM OS silicon-gate process. • Single 5V ±10% power supply • All device pins are fully TTL compatible
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OCR Scan
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MT18D236
72-pin
052mW
024-cycle
18D236M
MT180236
MT18D236G6
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Untitled
Abstract: No abstract text available
Text: |U |IC R O N 4’ 8 MEGx 36 ECC-OPTIMIZED DRAM SIMMs MT9D436 MT18D836 DRAM MODULE FEATURES • Four-CAS#, ECC-optimized configuration in a 72-pin, single in-line memory module SIMM • 16MB (4 Meg x 36) and 32MB (8 Meg x 36) • High-performance CMOS silicon-gate process
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MT9D436
MT18D836
72-pin,
048-cycle
72-Pin
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Untitled
Abstract: No abstract text available
Text: I^ IIC R D N 4’ 8 MEG x 36 ECC-OPTIMIZED DRAM SIMMs MT9D436 MT18D836 DRAM MODULE FEATURES PIN ASSIGNMENT Front View • Four-CAS#, ECC-optim ized configuration in a 72-pin, single in-line m em ory m odule (SIMM) • 16MB (4 M eg x 36) and 32MB (8 M eg x 36)
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MT9D436
MT18D836
72-pin,
048-cycle
72-Pin
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U15-U10
Abstract: MT18D236
Text: MT9D136, MT18D236 1 MEG. 2 MEG x 36 DRAM MODULE |V /|ICZRO N DRAM MODULE 1 MEG, 2 MEG x 36 FEATURES PIN ASSIGNMENT Front View • C o m m o n R A S co n tro l p er sid e p in o u t in a 72-p in , sin g le-in -lin e m em o ry m o d u le (SIM M ) • H ig h -p e rfo rm a n ce C M O S silico n -g a te p ro cess.
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MT9D136,
MT18D236
72-Pin
MT1BD236
U15-U10
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY M IC R O N 1 — - MT18D T 172(S), MT18D(T)472 1 MEG, 4 MEG x 72 DRAM MODULES DRAM 1 MEG, 4 MEG x 72 R i l A n i l l C 8’ 32 MEGABYTE, ECC, 5V, FAST PAGE MODE, OPTIONAL SELF REFRESH IVI ^ U U L C FEATURES MARKING • Timing 60ns access 70ns access
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MT18D
168-Pin
DE-13)
DE-14)
0012fci
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2mb 72-pin simm
Abstract: No abstract text available
Text: 4,8 MEG X 36 ECC-OPTIMIZED DRAM SIMMs MICRON I TECHNOLOGY, INC- MT9D436 MT18D836 DRAM MODULE For the latest data sheet revisions, piease referto the Micron Web site: www.micron.com/nii/nisp/html/ciatasheet.htmi FEATURES • Four-CAS#, ECC-optimized configuration in a 72-pin,
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OCR Scan
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MT9D436
MT18D836
72-pin,
048-cycle
72-Pin
2mb 72-pin simm
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MT1805
Abstract: 8D512 w5T marking
Text: MT18D51236 512K X 36 D R AM M O DU LE |U |IC Z R O N DRAM MODULE 512K x 36 DRAM FAST PAGE MODE FEATURES PIN ASSIGNMENT Top View OPTIONS 72-Pin SIMM (T-12) M T18D 51236M /G 1 MARKING • Timing 60ns access 70ns access 80ns access Packages Leadless 72-pin SIMM
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MT18D51236
72-pin
602mW
512-cycle
51236M
MT18D51236
MT1805
8D512
w5T marking
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MT4C4007JDJ
Abstract: No abstract text available
Text: ADVANCE MICRON MT9D136A X, MT18D236A X 1 MEG, 2 MEG x 36 DRAM MODULES DRAM MODULE 1 MEG, 2 MEG x 36 • TECHNOLOGY, INC. 4, 8 MEGABYTE, 5V, ECC, EDO PAGE MODE FEATURES • Four CAS# ECC pinout in a 72-pin, single-in-line memory module SIMM • High-performance CMOS silicon-gate process
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OCR Scan
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MT9D136A
MT18D236A
72-pin,
602mW
024-cycle
72-pin
MT4C4007JDJ
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