OB33LN
Abstract: ProASICPLUS Flash Family FPGAs v3.3
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA075,
APA150,
APA300
OB33LN
ProASICPLUS Flash Family FPGAs v3.3
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Untitled
Abstract: No abstract text available
Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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schematic diagram online UPS for high frequency
Abstract: ag19
Text: v3.3 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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APA750
Abstract: GL25 4kx8 sram
Text: v3 .4 PLUS ProASIC TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-based CMOS Process
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RAM256X9SST
Abstract: ProASICPLUS Flash Family FPGAs v5.0
Text: v5.0 ProASICPLUS TM Flash Family FPGAs Features and Benefits • High Capacity High Performance Routing Hierarchy Commercial and Industrial • • • • • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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Original
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PDF
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APA075,
APA150,
APA300
RAM256X9SST
ProASICPLUS Flash Family FPGAs v5.0
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APA075
Abstract: No abstract text available
Text: v4.1 ProASICPLUS TM Flash Family FPGAs Features and Benefits High Capacity Commercial and Industrial • • • 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os Military and Mil-Std 883B • • • 300, 000 to 1 million System Gates
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PDF
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APA075,
APA150,
APA300
APA075
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1kx8 static ram
Abstract: No abstract text available
Text: v5.1 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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32-Bit
APA075,
APA150,
APA300
1kx8 static ram
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OB25LPLL
Abstract: diagram LG 21 fs 4 bg model circuits MIL-STD-8831 RAM256X9AA APA075
Text: v5.5 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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Original
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PDF
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32-Bit
APA075,
APA150,
APA300
OB25LPLL
diagram LG 21 fs 4 bg model circuits
MIL-STD-8831
RAM256X9AA
APA075
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iob25hh
Abstract: RAM256X9AA
Text: ProASICPLUS Macro Library Guide R1-2002 Actel Corporation, Sunnyvale, CA 94086 2002 Actel Corporation. All rights reserved. Part Number: 5579016-1 Release: June 2002 No part of this document may be copied or reproduced in any form or by any means without prior written consent of Actel.
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R1-2002
iob25hh
RAM256X9AA
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OB33LN
Abstract: IOB33LNU IOBL33LLU OB25LPLL IOBL25HHU OB33PL IOB33PH OTB33PL OB33LL
Text: A ppl i cati on N ot e I/O Cell Selection for ProASIC 500K Devices In t ro d u c t i o n Table 1 • Input Pads The ProASIC 500K family offers a variety of different I/O cells to meet specific application requirements. These I/O cells can be configured with a 3.3V or 2.5V I/O ring supply
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IB33U
IB25U
IB25LPU
IB25LP
OB33LN
IOB33LNU
IOBL33LLU
OB25LPLL
IOBL25HHU
OB33PL
IOB33PH
OTB33PL
OB33LL
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Untitled
Abstract: No abstract text available
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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Original
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PDF
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198kbits
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Untitled
Abstract: No abstract text available
Text: v2.0 ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
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FBGA-484
Abstract: FBGA1152 FBGA896 FBGA676 Actel PQFP208 Actel APA075 import 500k PQFP208 FBGA256 APA150 -TQ1001 datasheet
Text: Application Note AC300 ProASIC to ProASICPLUS® Design Migration Introduction The ProASICPLUS family of FPGAs with FlashLock® combines the advantages of ASICs with the benefits of programmable devices through nonvolatile Flash technology. This enables engineers to create highdensity systems using existing ASIC or FPGA design flows and tools. In addition, the ProASICPLUS family
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AC300
FBGA-484
FBGA1152
FBGA896
FBGA676
Actel PQFP208
Actel APA075
import 500k
PQFP208
FBGA256
APA150 -TQ1001 datasheet
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APA600-PQ208M
Abstract: FBGA-484 datasheet APA075 APA1000 APA150 APA300 APA450 APA750 APA150-TQ100 RPE 113
Text: v5.8 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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A500K050
Abstract: A500K130 A500K180 A500K270 IOAD16 C24IO
Text: Discontinued – v3.0 ProASIC 500K Family F ea t u re s an d B e n e fi t s I/O • Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate • 3.3V, PCI Compliance PCI Revision 2.2 H ig h C a p ac it y • 100,000 to 475,000 System Gates
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32-bit
A500K050
A500K130
A500K180
A500K270
IOAD16
C24IO
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Untitled
Abstract: No abstract text available
Text: Advanced v1.2 ProASICPLUS Military and Aerospace FPGAs Fe a t ur es an d B e ne f i ts High C apaci t y • 300,000 to 1 million System Gates • 72k to 198kbits of Two-Port SRAM • 158 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy • Operates over Full Military Temperature Range –55°C to
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198kbits
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serial-in serial-out parallel-in
Abstract: schematic diagram online UPS RAM256X9AA ProASICPLUS Flash Family FPGAs v3.5
Text: v3.5 ProASICPLUS TM Flash Family FPGAs Features and Benefits • • High Capacity I/O • • • • • 75,000 to 1 Million System Gates 27k to 198kbits of Two-Port SRAM 66 to 712 User I/Os Reprogrammable Flash Technology • • • • 0.22µ 4LM Flash-Based CMOS Process
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Original
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PDF
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APA075,
APA150,
APA300
serial-in serial-out parallel-in
schematic diagram online UPS
RAM256X9AA
ProASICPLUS Flash Family FPGAs v3.5
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gl324
Abstract: 180 nm CMOS standard cell library AMI 198kB ProASICPLUS Flash Family FPGAs v3.2 APA075
Text: v3.2 TM ProASICPLUS Flash Family FPGAs F ea t u re s an d B e n e fi t s • 100% Routability and Utilization H ig h C a p ac it y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Re pr og ra mm a b le Fl as h T ec h no lo g y
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198kbits
gl324
180 nm CMOS standard cell library AMI
198kB
ProASICPLUS Flash Family FPGAs v3.2
APA075
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Untitled
Abstract: No abstract text available
Text: v5.4 ProASICPLUS ® Flash Family FPGAs Features and Benefits High Performance Routing Hierarchy • • • • High Capacity Commercial and Industrial • • • I/O 75,000 to 1 Million System Gates 27 k to 198 kbits of Two-Port SRAM 66 to 712 User I/Os
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32-Bit
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JC 201 SC
Abstract: GL324 ProASICPLUS Flash Family FPGAs v3.1
Text: v3.1 TM ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • 100% Routability and Utilization High C apaci t y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy
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198kbits
JC 201 SC
GL324
ProASICPLUS Flash Family FPGAs v3.1
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schematic diagram UPS ica
Abstract: TBD 234 V12 schematic diagram UPS 600 Power tree CQFP CQFP352 ProASICPLUS Flash Family FPGAs v3.0
Text: Advanced v1.2 ProASICPLUS Military and Aerospace FPGAs Fe a t ur es an d B e ne f i ts High C apaci t y • 300,000 to 1 million System Gates • 72k to 198kbits of Two-Port SRAM • 158 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy • Operates over Full Military Temperature Range –55°C to
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PDF
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198kbits
schematic diagram UPS ica
TBD 234 V12
schematic diagram UPS 600 Power tree
CQFP
CQFP352
ProASICPLUS Flash Family FPGAs v3.0
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GL324
Abstract: ads pa-600 ups 400 ec
Text: v3.3 TM ProASICPLUS Flash Family FPGAs Fe a t ur es an d B e ne f i ts • 100% Routability and Utilization High C apaci t y I/O • 75,000 to 1 million System Gates • 27k to 198kbits of Two-Port SRAM • 66 to 712 User I/Os Rep ro gra m m able Fl as h T ech nol ogy
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198kbits
GL324
ads pa-600
ups 400 ec
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rdl 117-a
Abstract: pa-1000b
Text: A d v a n c e d v O .7 ? TM P r o A S IC ^ F la s h F a m ily F P G A s High Performance, Low Skew, Splitable Global Network 100% Routability and Utilization I/O Schmitt-Trigger Option on Every Input Mixed 2.5V/3.3V Support with Individually-Selectable Voltage and Slew Rate
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OCR Scan
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PDF
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198kbits
rdl 117-a
pa-1000b
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A500K270
Abstract: No abstract text available
Text: Advanced v .2 ProASIC 500K Famüy F e atu res and B enefits • High Capacity • 98,000 to 1.1 Million System Gates • 14K to 138K Bit of Two-Port SRAM • 210 to 623 User I/Os • Performance • Corner-to-Corner Delay < 4 ns Typical • Clock-to-Out < 7 ns
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OCR Scan
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PDF
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200MHz
PBGA272
PBGA456
A500K270
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