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    HD74 SERIES Search Results

    HD74 SERIES Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    HD74BC573AFP Renesas Electronics Corporation HD74BC Series, , / Visit Renesas Electronics Corporation
    HD74HC21T Renesas Electronics Corporation HD/RD74HC Series, , / Visit Renesas Electronics Corporation
    HD74LVCR2245AFP Renesas Electronics Corporation RD74LVC-B Series, , / Visit Renesas Electronics Corporation
    HD74HC02RPEL-E-Q Renesas Electronics Corporation HD/RD74HC Series Visit Renesas Electronics Corporation
    PQU650M-F-COVER Murata Manufacturing Co Ltd PQU650M Series - 3x5 Fan Cover Kit, RoHs Medical Visit Murata Manufacturing Co Ltd

    HD74 SERIES Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HD74

    Abstract: HD842 HD841
    Text: Dual Tier Barrier Terminal Blocks HD74 Series HD84 Series 8.25mm .325” 15A 250V 15A 250V Specifications HD84 Series 7.62mm (.300”) NEW Features: *Dual tier barrier construction *Inline pins *UL recognized (HD841 only) *2 pin styles to choose from *Gold plating available


    Original     		PDF HD841 HD841 UL94V-0) HD842) HD74 HD842

    Untitled

    Abstract: No abstract text available
    Text: General-purpose logic solutions Commitment and innovation Commitment and Innovation Over the last 50 years, the NXP logic business – starting as Philips Semiconductors and then incorporating the experience of Signetics – has supported growing global demand for logic. Today, as the No. 1


    Original     		PDF onT14

    Renesas LOT CODE

    Abstract: DEVICE MARKING CODE table for renesas HD74 HD74LVC245AT mw961 Renesas LOT CODE MARKING
    Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid


    Original     		PDF REJ27D0016-0100Z/Rev Renesas LOT CODE DEVICE MARKING CODE table for renesas HD74 HD74LVC245AT mw961 Renesas LOT CODE MARKING

    16-LINE TO 4-LINE PRIORITY ENCODERS

    Abstract: 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters HD74S synchronous binary counter with latch
    Text: o V o la i \ \_ a . TTL H D 74/H D 74S Series I M A IN C HARACTERISTICS I PERFORMANCE (per gate Performance HD74 Series HD74S Series Propagation 10 ns 3 ns Delay Time Power 10 mW 20 m\V Dissipation Speed-Power 100 pJ 60 pJ Product O Series Param eter max)


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-14 DP-16 DP-20 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters synchronous binary counter with latch

    Untitled

    Abstract: No abstract text available
    Text: HD74 AL V C162834 18-bit Universal Bus Driver with 3-state Outputs and Inverted Latch Enable HITACHI ADE-205-217 Z Preliminary, 1st. Edition March 1, 1998 D escription The H D 74A LV C162834 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V V cc operation.


    OCR Scan     		PDF C162834 18-bit ADE-205-217 C162834 D-85622

    162835

    Abstract: No abstract text available
    Text: HD74 AL VC 162835 18-bit Universal Bus Driver with 3-state Outputs HITACHI ADE-205-201B Z Preliminary, 3rd. Edition January 1998 Description The HD74ALVC162835 is an 18-bit universal bus driver designed for 2.3 V to 3.6 V operation. Data flow from A to Y is controlled by the output enable (OE). The device operates in the transparent mode


    OCR Scan     		PDF 18-bit ADE-205-201B HD74ALVC162835 D-85622 162835

    162244

    Abstract: No abstract text available
    Text: HD74 AL VC 162244 16-bit Buffer / Driver with 3-state Outputs HITACHI ADE-205-204 Z Preliminary, 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used


    OCR Scan     		PDF 16-bit ADE-205-204 HD74ALVC162244 D-85622 162244

    Untitled

    Abstract: No abstract text available
    Text: HITACHI/ LOGIC/ARRAYS/MEM D e | 44Tb203 DD10434 1 92 D HD74 HC189 • 10434 D 64-bit Random Access Memory In fo rm a tio n to be stored in the m e m o ry is w ritte n in to th e | PIN ARRANGEMENT selected address lo c a tio n w h e n th e chip-select S and the


    OCR Scan     		PDF 44Tb203 DD10434 HC189 64-bit 0D1D315

    Flip Flops

    Abstract: 74 series logic gates DP-14 H183 HD74 2 input nand gate 24v 74 series 7 segment decoders quad jk flip flop
    Text: TTL HD74/HD74S Series • PER FO RM A N C E per gate P erform an ce Propagation D elay T im e P o w er D issip atio n S p ee d -P o w e r P roduct B M A IN C H A R A C T E R IS T IC S (7 > - 2 0 — + 7 5 cC) H D 74 S e r ie s H D 7 4 S S e r ie s 10 ns


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-14 DP-16 DP-20 Flip Flops 74 series logic gates DP-14 H183 HD74 2 input nand gate 24v 74 series 7 segment decoders quad jk flip flop

    4-bit bidirectional shift register 74 194

    Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates 4-bit even parity checker J-K Flip flops 4-bit shift register 74 194 Flip Flops HD74 H183 74 series 7 segment decoders
    Text: O o TTL HD74/HD74S Series I M AIN C H A R A C T E R IS T IC S Ta = - 2 0 - + 75° C I P E R F O R M A N C E (per gate) H D 74 S e r ie s P e rfo rm a n c e P r o p a g a t io n 10 ns D e la y T im e P a ra m e te r 3 ns V Pow er D is s ip a t io n 10 m W


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-16 DP-20 DP-24 4-bit bidirectional shift register 74 194 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates 4-bit even parity checker J-K Flip flops 4-bit shift register 74 194 Flip Flops HD74 H183 74 series 7 segment decoders

    Untitled

    Abstract: No abstract text available
    Text: HD74ALV C162244 16-bit Buffer / Driver with 3-state Outputs HITACHI ADE-205-204 Z Preliminary, 1st. Edition January 1998 Description The HD74ALVC162244 is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus oriented receivers and transmitters. The device can be used


    OCR Scan     		PDF HD74ALV C162244 16-bit ADE-205-204 HD74ALVC162244 TTP-48DC

    SOP54

    Abstract: marking code u8 SOP-54 93 MARKING U8 marking
    Text: Package Information 9. Package Information 9.1 Package Outlines 1. Small Outline Package EIAJ FP-14DA Unit: mm 10.5 Max 8 14 n n n n n r i n 3 in LO ° S3 1.42 Max d 7.80:g;jg +I CM O CM □non j B 0 - 10° w 1.27 ± 0 .1 5 0.70 ± 0.20 0.40 0.15 -Q 0-12 @


    OCR Scan     		PDF FP-14DA FP-16DA FP-20DA FP-14DN HD74LV HD74LVC245AT HD74LVC HD74ALVC SOP54 marking code u8 SOP-54 93 MARKING U8 marking

    Untitled

    Abstract: No abstract text available
    Text: HITACHI/ I L O G I C / A R R A Y S / N E M T2 GD103Sa 1 9 2D HD74HC00 # 10322 D 7 - r 9 3 Quad. 2 -input NAND Gates • FEATURES PIN ARRANGMENT I • High Speed Operation:.tp^=8.5ns typ. C^= 50pF • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: V cc= 2 ~ & V


    OCR Scan     		PDF GD103Sa HD74HC00 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H IT A C H I/ LOGIC/ARRAYS/HEM TE n r >7 nuf D E j 44 ^ 0 3 92D >i I X A r/% T 'r l v T 'V W f c HD74HC4053 0010bl3 1 g " 10613 D T '5 / '/ / Under Development # D u a l 4-channel Analog Multiplexers/Demultiplexers # Triple 2-channel Analog Multiplexers/Demultiplexers


    OCR Scan     		PDF HD74HC4053 0010bl3 HD74HC4052 44IitiED3 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H IT A C H I/ LOGIC/ARRAYS/riEd DË| 4 4 ^ 5 0 3 92D HD74HC02 # 0D1D3ES 7 D T ' ^ 3 *2 / 10325 Quad. 2-input NOR Gates PIN ARRANGEMENT • FEATURES • High Speed Operation: ^ptf*=6.5ns typ. Q_=50pF • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: Vcc= 2 ~ 6V


    OCR Scan     		PDF HD74HC02 0D1D315

    DP-14

    Abstract: HD74 HD74HC HD74HC00
    Text: HITACHI/ L O G I C / A R R A Y S / M E M T2 DE| GD103Sa 92D 1 03 2 2 HD74HC00 # T 1 D Quad. 2 -input NAND Gates • FEATURES PIN ARRANGMENT I • High Speed Operation:.tp^=8.5ns typ. C^= 50pF • High Output Current: Fanout of 10 LSTTL Loads • Wide Operating Voltage: V cc = 2 ~ & V


    OCR Scan     		PDF HD74HC00 FP-14D DP-14 HD74 HD74HC HD74HC00

    Untitled

    Abstract: No abstract text available
    Text: H I T A C H I / L O G I C / A R R A Y S / M E M TE E p 4 4 cibEG3 D 0 1 D 3 B S 92D H D 74H C30 # 10335 D 7’4 3 * Z 8-input NAND Gate I PIN ARRANGEMENT • FEATURES • High Speed Operation: tp<f= 11 ns typ. (Ci_=50pF • High O utput Current: Fanout of 10 L S T T L Loads


    OCR Scan     		PDF 44IitiED3 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H ITAC HI/ L0GIC/ARRAYS/Í1EM TS h T 4^S D 3S 0010354 I 4 ‘•'« k SO 001D324 S I 9 2 D 10324 HD74HC01 D T -^ *^ # Quad. 2-input NAND Gates with open drain outputs • PIN ARRANGEMENT FEATURES • High Speed Operation: tp(/=9ns typ. (C/_ =50pF) • High Output Current: Fanout of 10 LSTTL Loads


    OCR Scan     		PDF 001D324 HD74HC01 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H I T A C H I / LOG I C / A R R A Y S / M E M DÈI 4 4 ^ 5 0 3 □ D l G 3 tlS L> 92D 1 0 3 9 5 HD74HC152 j.[¡n # l-o f -8 - lin e Data Selector/Multiplexer This data selector/multiplexer contains fuli-on-chip binary | PIN ARRANGEMENT decoding to select the desired data source. The HD74HC1S2


    OCR Scan     		PDF HD74HC152 HD74HC1S2 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: HITACHI/ LOG I C / A R R A Y S /flEM HD7 4 HC133 D E I 44TL5D3 0D103flD 4 92D # 10380 D 13-input NAND Gate This device contains a single 13-input N A N D gate. They PIN ARRANGEMENT perform the boofean functions in positive logic. DC CHARACTERISTICS Symbol


    OCR Scan     		PDF HC133 44TL5D3 0D103flD 13-input 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H I T A C H I / L O G I C / A R R A Y S / N E M TE »ËJ 4 4 ^ 5 0 3 92D HD74HC09 0010320 10328 d T 'V 3 '^ / # Quad. 2-input AND Gates with open drain outputs I PIN ARRANGEMENT • FEATURES • High Speed Operatlon;-fp iy-8ns ty p . (C i.-5 0 p F ) • High O u tput C u rre n t: Fanout of 10 L S T T L Loadi


    OCR Scan     		PDF HD74HC09 44TtiED3 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: HITACHI/ LOGIC/ARRAYS/MEtl TE HD74HCT688 # DE| 44ThED3 []QlGh74 □ 8-bit Magnitude Comparator The HD74HCT688 compirei bit for bit two 8-blt wordi «nd • PIN ARRANGEMENT Indicata whathar or not thay are equal. The P*Q output Indlcatei •quslltv when It li low, A tingi* actlva low enable


    OCR Scan     		PDF HD74HCT688 44ThED3 QlGh74 HD74HCT688 44TtiE 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: H IT A C H I/ LOGIC/ARRAYS/MEM TE DE| 4 4 ^ 0 3 92D H D 7 4H C 0 8 # 10327 D Quad. 2-input AND Gates I PIN ARRANGEMENT • FEATURES • • • • • DOIOBE? 0 High Speed Operation: typ. C/_=50pF High Output Current: Fanout of 10 L ST T L Loads Wide Operating Voltage: t/'cc = 2 ~ 6 V


    OCR Scan     		PDF 0D1D315 T-90-20

    Untitled

    Abstract: No abstract text available
    Text: HITACHI/ L OGI C / ARR AY S / f l E N TS D È I 4 4 tï b 2 G 3 92D HD74HC14 DD10331 5 10331 r-n-zi D # Hex Schmitt-trigger Inverters • FEATURES I PIN ARRANGEMENT • High Speed Operation: fp^-10.5ns typ. C/."60pF • High Output Current: Fenout of 10 LSTTL Loads


    OCR Scan     		PDF HD74HC14 DD10331 0D1D315