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    HD74S Price and Stock

    Hitachi Ltd HD74SSTV16857TEL

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    Bristol Electronics HD74SSTV16857TEL 63,925 3
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    • 10 $1.6875
    • 100 $1.4062
    • 1000 $0.7425
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    Quest Components HD74SSTV16857TEL 1,540
    • 1 $3
    • 10 $3
    • 100 $3
    • 1000 $0.9375
    • 10000 $0.825
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    Hitachi Ltd HD74SSTV16859TE

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    Bristol Electronics HD74SSTV16859TE 3,000
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    Hitachi Ltd HD74S74P

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    Bristol Electronics HD74S74P 100
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    Quest Components HD74S74P 80
    • 1 $1.47
    • 10 $1.47
    • 100 $0.735
    • 1000 $0.735
    • 10000 $0.735
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    Hitachi Ltd HD74SSTV16857TE

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Bristol Electronics HD74SSTV16857TE 79 3
    • 1 -
    • 10 $1.6875
    • 100 $1.4062
    • 1000 $1.4062
    • 10000 $1.4062
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    Quest Components HD74SSTV16857TE 11
    • 1 $3
    • 10 $2.25
    • 100 $1.875
    • 1000 $1.875
    • 10000 $1.875
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    Hitachi Ltd HD74S112P

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    Quest Components HD74S112P 728
    • 1 $0.96
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    • 100 $0.432
    • 1000 $0.288
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    Find more HD74S price and stock on Findchips.com

    HD74S Datasheets (135)

    Part ECAD Model Manufacturer Description Curated Type PDF
    HD74S00 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S00 Unknown TTL Data Book 1980 Scan PDF
    HD74S00P Unknown TTL Data Book 1980 Scan PDF
    HD74S02 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S02P Unknown TTL Data Book 1980 Scan PDF
    HD74S03 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S03 Unknown TTL Data Book 1980 Scan PDF
    HD74S03P Unknown TTL Data Book 1980 Scan PDF
    HD74S04 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S04 Unknown TTL Data Book 1980 Scan PDF
    HD74S04P Unknown TTL Data Book 1980 Scan PDF
    HD74S05 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S05 Unknown TTL Data Book 1980 Scan PDF
    HD74S05P Unknown TTL Data Book 1980 Scan PDF
    HD74S10 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S10 Unknown TTL Data Book 1980 Scan PDF
    HD74S10P Unknown TTL Data Book 1980 Scan PDF
    HD74S11 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    HD74S11 Unknown TTL Data Book 1980 Scan PDF
    HD74S112 Hitachi Semiconductor TTL HD74/HD74S Series - Descriptions Only Scan PDF
    ...

    HD74S Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    HD74SSTV16857

    Abstract: HD74SSTV16857NEL HD74SSTV16857TEL TSSOP-48
    Text: HD74SSTV16857 1:1 14-bit SSTL_2 Registered Buffer REJ03D0830-0700 Previous: ADE-205-336F Rev.7.00 Apr 07, 2006 Description The HD74SSTV16857 is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857 14-bit REJ03D0830-0700 ADE-205-336F) HD74SSTV16857 HD74SSTV16857NEL HD74SSTV16857TEL TSSOP-48

    HD74SSTV16857A

    Abstract: HD74SSTV16857ANEL HD74SSTV16857ATEL TSSOP-48
    Text: HD74SSTV16857A 1:1 14-bit SSTL_2 Registered Buffer REJ03D0831-0100 Previous: ADE-205-695 Rev.1.00 Apr 07, 2006 Description The HD74SSTV16857A is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857A 14-bit REJ03D0831-0100 ADE-205-695) HD74SSTV16857A HD74SSTV16857ANEL HD74SSTV16857ATEL TSSOP-48

    Y8A transistor

    Abstract: HD74SSTV16842
    Text: HD74SSTV16842 11–bit to 22–bit Buffer with SSTL_2 Inputs and Outputs REJ03D0829-0200 Previous: ADE-205-602A Rev.2.00 Apr 07, 2006 Description The HD74SSTV16842 is a 11–bit to 22–bit buffer designed for 2.3 V to 2.7 V Vcc operation and SSTL_2 data (A)


    Original     		PDF HD74SSTV16842 REJ03D0829-0200 ADE-205-602A) HD74SSTV16842 HD74SSTV16842TEL TSSOP-64 PTSP0064KA-A TTP-64DV) Y8A transistor

    HD74SSTV16857B

    Abstract: HD74SSTV16857BNEL HD74SSTV16857BTEL TSSOP-48
    Text: HD74SSTV16857B 1:1 14-bit SSTL_2 Registered Buffer REJ03D0023–0100Z Previous ADE-205-712 (Z Rev.1.00 Jun.03.2003 Description The HD74SSTV16857B is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857B 14-bit REJ03D0023 0100Z ADE-205-712 HD74SSTV16857B HD74SSTV16857BNEL HD74SSTV16857BTEL TSSOP-48

    Hitachi DSA002752

    Abstract: No abstract text available
    Text: HD74SSTL16857 a 14-bit SSTL_2 Registered Buffer ADE-205-223C Z 4th. Edition May 1999 Description The HD74SSTL16857 is a 14-bit registered buffer designed for 2.3 V to 3.6 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTL16857 14-bit ADE-205-223C HD74SSTL16857 Hitachi DSA002752

    Hitachi DSA002785

    Abstract: No abstract text available
    Text: HD74SSTV16842 11–bit to 22–bit Buffer with SSTL_2 Inputs and Outputs ADE-205-602 Z Preliminary 1st. Edition March 2001 Description The HD74SSTV16842 is a 11–bit to 22–bit buffer designed for 2.3 V to 2.7 V Vcc operation and SSTL_2 data (A) inputs.


    Original     		PDF HD74SSTV16842 ADE-205-602 HD74SSTV16842 D-85622 Hitachi DSA002785

    HD74SSTV16859

    Abstract: Q11A DSA003634
    Text: HD74SSTV16859 1:2 13-bit SSTL_2 Registered Buffer ADE-205-337G Z Rev.7 June 2001 Description The HD74SSTV16859 is a 1:2 13-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16859 13-bit ADE-205-337G HD74SSTV16859 Q11A DSA003634

    LK 1628

    Abstract: HD74SSTV32852 HD74SSTV32852LBEL Q13A BP-114
    Text: HD74SSTV32852 24-bit to 48-bit Registered Buffer with SSTL_2 Inputs and Outputs REJ03D0833-0400 Previous: ADE-205-687C Rev.4.00 Apr 07, 2006 Description The HD74SSTV32852 is a 24-bit to 48-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS


    Original     		PDF HD74SSTV32852 24-bit 48-bit REJ03D0833-0400 ADE-205-687C) HD74SSTV32852 LK 1628 HD74SSTV32852LBEL Q13A BP-114

    TTP-64DV

    Abstract: No abstract text available
    Text: HD74SSTV16842 11–bit to 22–bit Buffer with SSTL_2 Inputs and Outputs REJ03D0829-0200 Previous: ADE-205-602A Rev.2.00 Apr 07, 2006 Description The HD74SSTV16842 is a 11–bit to 22–bit buffer designed for 2.3 V to 2.7 V Vcc operation and SSTL_2 data (A)


    Original     		PDF HD74SSTV16842 REJ03D0829-0200 ADE-205-602A) HD74SSTV16842 HD74SSTV16842TEL TSSOP-64 PTSP0064KA-A TTP-64DV) TTP-64DV

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTV16859 1:2 13-bit SSTL_2 Registered Buffer REJ03D0832-0900 Previous: ADE-205-337H Rev.9.00 Apr 07, 2006 Description The HD74SSTV16859 is a 1:2 13-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16859 13-bit REJ03D0832-0900 ADE-205-337H) HD74SSTV16859

    HD74SSTV16857

    Abstract: Hitachi DSA00229
    Text: HD74SSTV16857 1:1 14-bit SSTL_2 Registered Buffer ADE-205-336E Z 6th. Edition May 2000 Description The HD74SSTV16857 is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857 14-bit ADE-205-336E HD74SSTV16857 RESE2100 Hitachi DSA00229

    HD74SSTV16859

    Abstract: Q11A Hitachi DSA00219
    Text: HD74SSTV16859 1:2 13-bit SSTL_2 Registered Buffer ADE-205-337F Z 7th. Edition January 2001 Description The HD74SSTV16859 is a 1:2 13-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16859 13-bit ADE-205-337F HD74SSTV16859 Q11A Hitachi DSA00219

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTV16857A 1:1 14-bit SSTL_2 Registered Buffer REJ03D0831-0100 Previous: ADE-205-695 Rev.1.00 Apr 07, 2006 Description The HD74SSTV16857A is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857A 14-bit REJ03D0831-0100 ADE-205-695) HD74SSTV16857A

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTV16857 1:1 14-bit SSTL_2 Registered Buffer REJ03D0830-0700 Previous: ADE-205-336F Rev.7.00 Apr 07, 2006 Description The HD74SSTV16857 is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857 14-bit REJ03D0830-0700 ADE-205-336F) HD74SSTV16857

    HD74SSTV16857

    Abstract: TSSOP-48 DSA003634
    Text: HD74SSTV16857 1:1 14-bit SSTL_2 Registered Buffer ADE-205-336F Z Rev.6 June. 2001 Description The HD74SSTV16857 is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857 14-bit ADE-205-336F HD74SSTV16857 TSSOP-48 DSA003634

    HD74SSTV16842

    Abstract: DSA003635
    Text: HD74SSTV16842 11–bit to 22–bit Buffer with SSTL_2 Inputs and Outputs ADE-205-602A Z Rev.1 May 2001 Description The HD74SSTV16842 is a 11–bit to 22–bit buffer designed for 2.3 V to 2.7 V Vcc operation and SSTL_2 data (A) inputs. Features • Supports SSTL_2 data inputs


    Original     		PDF HD74SSTV16842 ADE-205-602A HD74SSTV16842 DSA003635

    HD74SSTV16857A

    Abstract: TSSOP-48 Hitachi DSA0047
    Text: HD74SSTV16857A 1:1 14-bit SSTL_2 Registered Buffer ADE-205-695 Z Rev.0 Jun. 2002 Description The HD74SSTV16857A is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857A 14-bit ADE-205-695 HD74SSTV16857A D-85622 D-85619 TSSOP-48 Hitachi DSA0047

    HD74SSTV16857BNEL

    Abstract: HD74SSTV16857B HD74SSTV16857BTEL TSSOP-48
    Text: HD74SSTV16857B 1:1 14-bit SSTL_2 Registered Buffer REJ03D0023–0100Z Previous ADE-205-712 (Z Rev.1.00 Jun.03.2003 Description The HD74SSTV16857B is a 14-bit registered buffer designed for 2.3 V to 2.7 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    Original     		PDF HD74SSTV16857B 14-bit REJ03D0023 0100Z ADE-205-712 HD74SSTV16857B HD74SSTV16857BNEL HD74SSTV16857BTEL TSSOP-48

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTL16857 14-bit SSTL_2 Registered Buffer HITACHI ADE-205-223B Z Preliminary 3rd. Edition February 1999 Description The HD74SSTL16857 is a 14-bit registered buffer designed for 2.3 V to 3.6 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and CLK input.


    OCR Scan     		PDF HD74SSTL16857 14-bit ADE-205-223B HD74SSTL16857 TTP-48DC

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTL16837 20-bit SSTL_3 Interface Universal Bus Driver with 3-state Outputs HITACHI ADE-205-191 Z Preliminary 1st. Edition July 1, 1997 Description The HD74SSTL16837 is a 20-bit universal bus driver designed for 3.0 V to 3.6 V Vcc operation and SSTL_3 or LVTTL I/O levels.


    OCR Scan     		PDF HD74SSTL16837 20-bit ADE-205-191 HD74SSTL16837 pow1835

    16-LINE TO 4-LINE PRIORITY ENCODERS

    Abstract: 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters HD74S synchronous binary counter with latch
    Text: o V o la i \ \_ a . TTL H D 74/H D 74S Series I M A IN C HARACTERISTICS I PERFORMANCE (per gate Performance HD74 Series HD74S Series Propagation 10 ns 3 ns Delay Time Power 10 mW 20 m\V Dissipation Speed-Power 100 pJ 60 pJ Product O Series Param eter max)


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-14 DP-16 DP-20 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates Flip flops "J-K Flip flops" J-K Flip flops NAND Gates HD74 Synchronous 8-Bit Binary Counters synchronous binary counter with latch

    4-bit bidirectional shift register 74 194

    Abstract: 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates 4-bit even parity checker J-K Flip flops 4-bit shift register 74 194 Flip Flops HD74 H183 74 series 7 segment decoders
    Text: O o TTL HD74/HD74S Series I M AIN C H A R A C T E R IS T IC S Ta = - 2 0 - + 75° C I P E R F O R M A N C E (per gate) H D 74 S e r ie s P e rfo rm a n c e P r o p a g a t io n 10 ns D e la y T im e P a ra m e te r 3 ns V Pow er D is s ip a t io n 10 m W


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-16 DP-20 DP-24 4-bit bidirectional shift register 74 194 16-LINE TO 4-LINE PRIORITY ENCODERS 74 series logic gates 4-bit even parity checker J-K Flip flops 4-bit shift register 74 194 Flip Flops HD74 H183 74 series 7 segment decoders

    Untitled

    Abstract: No abstract text available
    Text: HD74SSTL16857 14-bit SSTL_2 Registered Buffer HITACHI ADE-205-223 Z Preliminary 1st. Edition August 1998 Description The HD74SSTL16857 is a 14-bit registered buffer designed for 2.3 V to 3.6 V Vcc operation and LVCMOS reset (RESET) input / SSTL_2 data (D) inputs and output levels.


    OCR Scan     		PDF HD74SSTL16857 14-bit ADE-205-223 HD74SSTL16857 40815HITEC

    Flip Flops

    Abstract: 74 series logic gates DP-14 H183 HD74 2 input nand gate 24v 74 series 7 segment decoders quad jk flip flop
    Text: TTL HD74/HD74S Series • PER FO RM A N C E per gate P erform an ce Propagation D elay T im e P o w er D issip atio n S p ee d -P o w e r P roduct B M A IN C H A R A C T E R IS T IC S (7 > - 2 0 — + 7 5 cC) H D 74 S e r ie s H D 7 4 S S e r ie s 10 ns


    OCR Scan     		PDF HD74/HD74S HD74S HD74Series 16-bit DP-14 DP-16 DP-20 Flip Flops 74 series logic gates DP-14 H183 HD74 2 input nand gate 24v 74 series 7 segment decoders quad jk flip flop