MM74C30N
Abstract: MM54C30J MM74C30 MM54C30 MM74C30J AN-90 C1995 J14A
Text: MM54C30 MM74C30 8-Input NAND Gate General Description Features The logical gate employs complementary MOS CMOS to achieve wide power supply operating range low power consumption and high noise immunity Function and pin out compatibility with series 54 74 devices minimizes design
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MM54C30
MM74C30
MM74C30N
MM54C30J
MM74C30J
AN-90
C1995
J14A
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PDF
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XC6200
Abstract: XC009 PN16 XC6209 XC6216 XC6264 C031 vhdl code up down counter
Text: XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution
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XC6200
XC6200
XC6216
-2PC84C
-40oC
100oC
-55oC
125oC
84-Pin
HT144
XC009
PN16
XC6209
XC6264
C031
vhdl code up down counter
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PDF
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XC6200
Abstract: p61 s43 XC6264 w1p77 w56 transistor BUF C038 N48 pqfp Package Typ P194 B1 121 W97 diode ak38
Text: XC6200 Field Programmable Gate Arrays Table Of Contents Features Description Architecture Logical and Physical Organization Additional Routing Resources Magic Wires Global Wires Function Unit Cell Logic Functions Routing Switches Clock Distribution Clear Distribution
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Original
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XC6200
XC6200
XC6216
-2PC84C
84-Pin
HT144
144-Pin
BG225
225-Pin
HQ240
p61 s43
XC6264
w1p77
w56 transistor
BUF C038
N48 pqfp Package
Typ P194
B1 121 W97
diode ak38
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PDF
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MM54C30J
Abstract: No abstract text available
Text: MICROCIRCUIT DATA SHEET Original Creation Date: 10/19/95 Last Update Date: 05/19/97 Last Major Revision Date: 04/02/97 MNMM54C30-X REV 1A0 8-INPUT NAND GATE General Description The logical gate employs complementary MOS CMOS to achieve wide power supply operating
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MNMM54C30-X
MM54C30
MM54C30J/883
MM54C30W/883
MIL-STD-883,
MM54C30J
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PDF
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DM74S03
Abstract: DM74S03MX M14A
Text: Revised May 2000 DM74S03 Quad 2-Input NAND Gate with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical
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DM74S03
DM74S03MX
14-Lead
MS-120,
150THOUT
DM74S03
DM74S03MX
M14A
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PDF
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schema inverter
Abstract: L6386 L6386 Phase Signal schema led table phase inverter schema induction heating schema AN1315 STGP3NB60HDFP STGP7NB60HDFP TS272
Text: AN1315 APPLICATION NOTE L6386: 3-PHASE DEMO BOARD by G.P. Meloncelli Product Description The 3-Phase Demo Board is a reference kit for evaluation and design with the high voltage gate driver L6386. User must only provide the logical signals and the power supplies. The kit make easy to test the driver capability
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Original
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AN1315
L6386:
L6386.
00V-3
schema inverter
L6386
L6386 Phase Signal
schema led table
phase inverter schema
induction heating schema
AN1315
STGP3NB60HDFP
STGP7NB60HDFP
TS272
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PDF
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DM74LS26
Abstract: DM74LS26M DM74LS26N M14A MS-001 N14A
Text: Revised March 2000 DM74LS26 Quad 2-Input NAND Gate with High Voltage Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical
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Original
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DM74LS26
DM74LS26
DM74LS26M
DM74LS26N
M14A
MS-001
N14A
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PDF
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DM74ALS
Abstract: DM74ALS03B DM74ALS03BM DM74ALS03BN M14A N14A dm74als03bm fairchild
Text: DM74ALS03B Quad 2-Input NAND Gate with Open Collector Outputs N3 IIL = total maximum input low current for all inputs tied to pull-up resistor General Description This device contains four independent gates, each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.
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DM74ALS03B
DM74ALS
DM74ALS03B
DM74ALS03BM
DM74ALS03BN
M14A
N14A
dm74als03bm fairchild
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PDF
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TC534200F
Abstract: UTC A11 TC534200P
Text: TOSHIBA TC534200P/F SILICON STACKED GATE CMOS 262,144 WORD x 16 BIT/524,288 WORD x 8 BIT CMOS MASK ROM Description The TC534200P/F is a 4,194,304 bit read only memory organized as 262,144 words by 16 bits when BYTE is logical high and organized as 524,288 words by 8 bits when BY I t is logical low.
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OCR Scan
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TC534200P/F
BIT/524
TC534200P/F
600mil
40-pin
525mil
TC534200P
TC534200F
UTC A11
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PDF
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TC5316200bP
Abstract: TC5316200BP/BF
Text: TOSHIBA TC5316200BP/BF SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM D escription The TC5316200BP/BF is a 16,777,216 bit read only memory organized as 1,048,576 words by 16 bits when BY I t is logical high, and organized as 2,097,152 words by 8 bits when BYTE is logical low.
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OCR Scan
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TC5316200BP/BF
TC5316200BP/BF
600mil
42-pin
44-pin
TC5316200BP
TC5316200BF
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PDF
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TC5316210
Abstract: Tc5316210cf
Text: TC5316210CP/CF TOSHIBA TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 16 MBIT 1 M WORD BY 16 BITS/2 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC5316210CP/CF is a 16,777,216-bit Read Only Memory organized as 1,048,576 words by 16 bits when BYTE is logical high, and as 2,097,152 words by 8 bits when BYTE is logical low.
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OCR Scan
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TC5316210CP/CF
TC5316210CP/CF
216-bit
42-pin
44-pin
765TYP
TC5316210
Tc5316210cf
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PDF
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Untitled
Abstract: No abstract text available
Text: TC5332410BF/BFT TOSHIBA TOSHIBA MOS INTEGRATED CIRCUIT 32 MBIT 1 M WORD BY 32 BITS/2 SILICON GATE CMOS WORD BY 16 BITS CMOS MASK ROM DESCRIPTION The TC5332410BF/BFT is a 33,554,432-bit Read Only Memory organized as 1,048,576 words by 32 bits when DW/W is logical high, and as 2,097,152 words by 16 bits when DW/W is logical low.
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OCR Scan
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TC5332410BF/BFT
TC5332410BF/BFT
432-bit
70-pin
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PDF
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TC534200CF
Abstract: No abstract text available
Text: TOSHIBA TC534200CP/CF/CFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 4 MBIT 256 K WORD BY 16 BITS/512 K WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC534200CP/CF is a 4,194,304-bit Read Only Memory organized as 262,144 words by 16 bits when BYTE is logical high, and as 524,288 words by 8 bits when BYTE is logical low.
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OCR Scan
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TC534200CP/CF/CFT
BITS/512
TC534200CP/TC534200CF
304-bit
TC534200CP/CF
40-pin
44-pin
TC534200CF
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PDF
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TC5332200AF
Abstract: TC53322
Text: TO SH IB A TC5332200AF/AFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 32 MBIT 2,097,152 WORD BY 16 BITS/4,194,304 WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC53322Ö0AF/AFT is a 33,554,432-bit Read Only Memory organized as 2,097,152 words by 16 bits when BYTE is logical high, and as 4,194,304 words by 8 bits when BYTE is logical low.
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OCR Scan
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TC5332200AF/AFT
TC53322
432-bit
TC5332200AF/AFT
44-pin
765TYP
TC5332200AF
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PDF
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TC5316200CP
Abstract: TC5316200CF
Text: T O S H IB A TC5316200CP/CF/CFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 16 MBIT 1 M WORD BY 16 BITS/2 M WORD BY 8 BITS CMOS MASK ROM DESCRIPTION The TC5316200CP/CF/CFT is a 16,777,216-bit Read Only Memory organized as 1,048,576 words by 16 bits when BYTE is logical high, and as 2,097,152 words by 8 bits when BYTE is logical low.
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OCR Scan
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TC5316200CP/CF/CFT
TC5316200CP/CF/CFT
216-bit
42-pin
44-pin
TC5316200CP
TC5316200CF
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PDF
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Untitled
Abstract: No abstract text available
Text: TO SHIBA TC5332410BF/BFT TOSHIBA MOS INTEGRATED CIRCUIT SILICON GATE CMOS 32 MBIT 1 M W O RD BY 32 BITS/2 M W O RD BY 16 BITS CMOS MASK ROM DESCRIPTION The TC5332410BF/BFT is a 33,554,432-bit Read Only Memory organized as 1,048,576 words by 32 bits when DW/W is logical high, and as 2,097,152 words by 16 bits when DW/W is logical low.
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OCR Scan
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TC5332410BF/BFT
TC5332410BF/BFT
432-bit
70-pin
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PDF
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TC5316200CP
Abstract: tc5316200
Text: TOSHIBA TC5316200CP/CF/CFT PRELIMINARY SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM Description The TC5316200CP/CF/CFT is a 16,777,216 bit read only memory organized as 1,048,576 w ords by 16 bits when BY I t is logical high, or as 2,097,152 w ords by 8 bits when BYTE is logical low.
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OCR Scan
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TC5316200CP/CF/CFT
TC5316200CP/CF/CFT
600mil
42-pin
44-pin
400mil
TC5316200CP
tc5316200
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PDF
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MIL-STD-806
Abstract: 4-1 MULTIPLEXER IC
Text: 4-1 How to Read MIL Type Logic Symbols Table 4-1 shows the MIL type logic symbols used in high-speed CMOS IC. This logical chart Is based on MIL-STD-806. Clocked inverter and transmission gate employ specific symbols. Table 4-1 Circuit Function M IL Logic Symbols
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OCR Scan
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MIL-STD-806.
MIL-STD-806
4-1 MULTIPLEXER IC
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PDF
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MIL-STD-806
Abstract: 4-1 MULTIPLEXER IC
Text: 4-1 H o w to Read M IL Type Logic Sym bols Table 4-1 shows the MIL type logic symbols used in high-speed CMOS IC. This logical chart is based on MIL-STD-806. Clocked inverter and transmission gate employ specific symbols. Table 4-1 Circuit Function MIL Logic Symbols
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OCR Scan
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MIL-STD-806.
MIL-STD-806
4-1 MULTIPLEXER IC
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PDF
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TC531621
Abstract: No abstract text available
Text: TOSHIBA TC5316210CP/CF PRELIMINARY SILICON STACKED GATE CMOS 1,048,576 WORD x 16 BIT/2,097,152 WORD x 8 BIT CMOS MASK ROM Description TheTC 5316210C P/C F is a 16,777,216 bit read only m em ory organized as 1,048,576 w ords by 16 bits when BYTE is logical
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OCR Scan
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TC5316210CP/CF
5316210C
TC5316210CP/CF
5316210CP/CF
600mil
42-pin
44-pin
TC531621OCP/CF
TC531621
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PDF
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MIL-STD-806B
Abstract: MIL-STD-806
Text: 6 . HOW TO READ MIL TYPE LOGIC SYMBOLS AND TRUTH TABLES 6 -1 H ow to read M I L type L o gic S y m b o ls Table 6-1 shows the MIL type logic symbols used in high-speed CMOS IC. This logical chart is based on MIL-STD-806B. and clocked inverter and transmission gate employ specific symbols.
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OCR Scan
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MIL-STD-806B.
MIL-STD-806B
MIL-STD-806
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PDF
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TC534200CF
Abstract: No abstract text available
Text: TOSHIBA TC534200CP/CF P R E LIM IN A R Y SILICON STACKED GATE CMOS 262,144 WORD x 16 BIT/524,288 WORD x 8 BIT CMOS MASK ROM Description The TC534200CP/CF is a 4,194,304 bit read only memory organized as 262,144 w ords by 16 bits when BY 11 is logical high,
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OCR Scan
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TC534200CP/CF
BIT/524
TC534200CP/CF
TC534200C
534200CP/CF
600mil
40-pin
525mil
TC534200CP
TC534200CF
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PDF
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DM7819
Abstract: DM7819J DM7819N DM7819W DM8819J DM8819N DM8819W SN5409
Text: D M 781 9/D M 8819 NS Level Translators/Buffers D M 7 8 1 9 /D M 8 8 1 9 quad 2 -in p u tT T L -M O S AND gate general description The DM7819 is the high output voltage version of the SN 5409. Its open-collector outputs may be "pulled-up" to +14 volts in the logical " 1 " state
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OCR Scan
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DM7819/DM8819
DM7819
SN5409.
DM7819J
DM8819J
DM7819N
DM8819N
DM7819W
DM8819W
DM8819J
DM8819N
SN5409
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PDF
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TC538200AP
Abstract: TC538200AF TC538200 TC538200A
Text: TOSHIBA TC538200AP/AF SILICON STACKED GATE CMOS 524,288 WORD x 16 BIT/1,048,576 WORD x 8 BIT CMOS MASK ROM D escription The TC538200AP/AF or as 1,048,576 w ords by The TC538200AP/AF The TC538200AP/AF is a 8,388,608 bit read only m em ory organized as 524,288 w ords by 16 bits when BYTE is logical high,
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OCR Scan
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TC538200AP/AF
TC538200AP/AF
600mil
42-pin
44-pin
TC538200AP
TC538200AF
TC538200AF
TC538200
TC538200A
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PDF
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