divide-by-10
Abstract: No abstract text available
Text: Issued March 1997 232-2598 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL
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Untitled
Abstract: No abstract text available
Text: Issued July 1983 004-923 Data Pack H 575 MHz ÷ 10/11 prescaler IC Data Sheet RS stock number 302-378 The 8680 is an ECL emitter coupled logic prescaling counter with both ECL 10K and TTL compatible outputs. The circuit will operate from either ECL or TTL
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7220S13
Abstract: SP8665B sp8668b
Text: PLE SS EY SEM IC ONDUC TO RS 1EE D • 7220S13 GOQTTST ? SP8665B loooMHz * 10 SP8668B 1500MHz * 10 The SP8665/8 are asynchronous ECL counters which provide ECL compatible outputs. They feature an ECL compatible input inhibit which simplifies the design of
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7220S13
SP8665B
SP8668B
1500MHz
SP8665/8
500mW
T-45-19-05
00V/jjs
sp8665/8ß
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signal path designer
Abstract: No abstract text available
Text: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency
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/D1203-0589
signal path designer
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Untitled
Abstract: No abstract text available
Text: fax id: 5000 CY101E383 ECL/TTL/ECL Translator and High-Speed Bus Driver Featu res • B iC M O S for optimum speed/p ow er • High speed max. — 3.0 ns tpD TTL-to-ECL — 4 ns t PD ECL-to-TTL • Low skew < ± 1 ns • Can o perate on single +5V supply
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CY101E383
80-pin
84-pin
CY101E383
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10K series ECL
Abstract: 014H
Text: MBM10415AH F U J IT S U M IC R O E L E C T R O N IC S. IN C . ECL 1024-BIT BIPOLAR RANDOM ACCESS MEMORY DESCRIPTION The Fujitsu MBM10415AH is a ful ly decoded 1024-bit ECL read/ write random access memory designed for high-speed scratch pad, control and buffer storage
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1024-BIT
MBM10415AH
10415AH
MBM10415
MBM10415AH
16-LEAD
DIP-16C-F01
10K series ECL
014H
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MB7072E
Abstract: No abstract text available
Text: FU JITSU MB7072E M IC R O E L E C T R O N IC S . INC. ECL 256 X 4-BIT BIPOLAR RANDOM ACCESS MEMORY DESCRIPTION The Fujitsu MB7072 is a fully decoded 1024-bit ECL read/write random access memory designed for high-speed scratch pad, con trol and buffer storage applica
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MB7072E
MB7072
1024-bit
MB7072E
B7072
MB7Q72
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Q20P010
Abstract: Q20M100 carry look ahead adder Q20080 Q20P025 Q20025 vernier Q20000 Q20004 Q20010
Text: D EV IC E SP EC IFIC A TIO N LOGIC ARRAYS Q20000 “TURBO” ECL/TTL Q20000 FEATURES Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 10OK ECL and mixed ECL/TTL capability
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Q20000
Q20000
0Q03RL
Q20P010
Q20M100
carry look ahead adder
Q20080
Q20P025
Q20025
vernier
Q20004
Q20010
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L2504
Abstract: No abstract text available
Text: TYPES ECL2500 THRU ECL2505, ECL2511 EMITTER-COUPLED-LOGIC GATES ECL INTEGRATED CIRCUITS n h c < ECL2500 SERIES E M ITTER -C O U PLED -LO G IC ECL BASIC G ATES FOR A PP L IC A T IO N IN U L TR A -H IG H -SPEED D IG IT A L SYSTEMS — m ? M O tn o I description
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ECL2500
ECL2505,
ECL2511
L2500
L2504
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Untitled
Abstract: No abstract text available
Text: TIEPAL10H16P8-3C HIGH-PERFORMANCE ExCL mP A P CIRCUIT 0 3 0 8 4 . D EC EM B ER 1987 JT P A C K A G E ECL 10KH PAL TOP VIEW High-Performance Operation Propagation Delay . . . 3 ns Max IC 1 u Replacement for Conventional ECL Logic IE 2 24 H v c c 23 m IC 3
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TIEPAL10H16P8-3C
24-Pin,
300-Mil
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TQ1121
Abstract: TQ1121-15F TQ1121-20F
Text: TrìQuint Q -LO G IC DUAL M ODULUS 4/5 DIVIDER PRODUCT INFORMATION TQ1121-20F TQ1121-15F FEATURES 2.0 GHz Clock Frequency D ivide by 4 or 5 ECL- and TTL-Compatible Mode Control Inputs Complementary ECL-Compatible Outputs AC- or DC-Coupled Clock Input BLOCK DIAGRAM
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TQ1121-20F
TQ1121-15F
TQ1121
TQ1121-15F
TQ1121
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Untitled
Abstract: No abstract text available
Text: s e m ic o n d u c t o r Revised November 1999 100398 Quad Differential ECL/TTL Translating Transceiver with Latch General Description Features The 100398 is a quad latched transceiver designed to con vert TTL logic levels to differential F100K ECL logic levels
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F100K
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wd 969 ir
Abstract: ECL2509 WD 969 ECL2500 ECL2506 ECL2507 ECL2508 ECL2510 ECL2512 ECL2513
Text: TYPES ECL2506 THRU EC L2510, ECL2512, ECL2513 M ULTIFUNCTION EM ITTER-COUPLED-LOGIC GATES ECL INTEGRATED CIRCUITS ECL2500 SER IES EM ITTE R -C O U P LE D -LO G IC ECL M U L T IF U N C T IO N GATES FOR A P P L IC A T IO N IN U LTR A -H IG H -SPEED D IG IT A L SYSTEMS
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ECL2506
ECL2510,
ECL2512,
ECL2513
ECL2500
ecl2507
ecl2508
ecl2509
wd 969 ir
WD 969
ECL2510
ECL2512
ECL2513
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Untitled
Abstract: No abstract text available
Text: s e m ic o n d u c t o r Revised November 1999 100328 Low Power Octal ECL/TTL Bi-Directional Translator with Latch General Description Features The 100328 is an octal latched bi-directional translator designed to convert TTL logic levels to 100K ECL logic lev
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Untitled
Abstract: No abstract text available
Text: FUJITSU MIC ROE LE CT RON IC S F U J IT S U 23E D • 374T7L2 OÛOfla'ïS 5 BIPOtAR- RANDOIVP ACCESS MEMORY» MBM100480A-10 May 1988 Edition 1.0 16384-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM100480A It a fully decoded 16384-blt ECL read/write random access
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374T7L2
MBM100480A-10
16384-BIT
MBM100480A
16384-blt
20-PAD
LCC-20C-F01)
C20003S-1C
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Untitled
Abstract: No abstract text available
Text: I R C H January 1992 iL D s e m ic o n d u c t o r Revised November 1999 100397 Quad Differential ECL/TTL Translating Transceiver with Latch General Description Features The 100397 is a quad latched transceiver designed to con vert TTL logic levels to differential F100K ECL logic levels
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F100K
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100324 Low Power Hex TTL-to-ECL Translator General Description Features The 100324 is a hex translator, designed to convert TTL logic levels to 100K ECL logic levels. The inputs are compat ible with standard or Schottky TTL. A common Enable E ,
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Untitled
Abstract: No abstract text available
Text: s e m ic o n d u c t o r 100329 Low Power Octal ECL/TTL Bidirectional Translator with Register General Description Features The 100329 is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic lev els and vice versa. The direction of the translation is deter
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Fairchild 100K series ECL
Abstract: No abstract text available
Text: R C H II- D • M IC O N D U C T O R r 100329A Low Power Octal ECL/TTL Bidirectional Translator with Register General Description The 100329A is an octal registered bidirectional translator designed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of the translation is determined
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00329A
00329A
Fairchild 100K series ECL
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ECL2506
Abstract: ECL2500 ECL2507 ECL2508 ECL2509 ECL2510 ECL2512 ECL2513 utnp ScansUX1009
Text: TYPES ECL2506 TH RU EC L2510 , ECL2512, ECL2513 M U L T IF U N C T IO N EM ITTER -C O U P LED -LO G IC G A TES ECL INTEGRATED CIRCUITS TYPES ECL2506 THRU ECL2510, ECL2512, E C L251 3 BULLETIN NO. DL-S 6911245, OCTOBER 1969 ECL2500 SERIES EMITTER-COUPLED-LOGIC ECL MULTIFUNCTION GATES
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ECL2506
ECL2510,
ECL2512,
ECL2513
ECL2500
ecl2507
ecl2508
ECL2509
ECL2510
ECL2512
utnp
ScansUX1009
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Untitled
Abstract: No abstract text available
Text: S E M IC O N D U C T O R tm 100328 Low Power Octal ECL/TTL Bi-Directional Translator with Latch General Description Features The 100328 is an octal latched bi-directional translator de signed to convert TTL logic levels to 100K ECL logic levels and vice versa. The direction of this translation is determined
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Untitled
Abstract: No abstract text available
Text: FUJITSU M I CRO EL EC TR ON IC S FU JITSU 23E D • 3?417fa2 OODÄHSS T BIPOCAR RANDOM* ACCESS M EM O R Y MBM10480A-10 -OS May 1988 Edition 1.0 16384-BIT BIPOLAR ECL RANDOM ACCESS MEMORY The Fujitsu MBM10480A Is a fuSy decoded 16384-blt ECL read/w rite random access
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417fa2
MBM10480A-10
16384-BIT
MBM10480A
16384-blt
20-PAD
LCC-20C-F01)
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TS223
Abstract: ECL2517 ECL2500
Text: CIRCUIT T Y P ! ECL2517 EM ITTER-COUPLED-LOGIC DECODER ECL I N T E G R A T E D CIRC UIT 05 - I c -< ECL2500 SERIES EM ITTE R -C O U P LE D -LO G IC ECL DECODER M O D U LE FOR A P P L IC A T IO N IN U LTR A -H IG H -SPEED D IG IT A L SYSTEMS I - "D _o Z E
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ECL2517
ECL2500
ECL2517
TS223
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CXB1102Q
Abstract: quad exclusive-or/NOR gate SONY 01A
Text: CXB1102Q SONY Quad 2 - Input Exclusive-OR/NOR Gate D escription CXB1102Q is an ultra high speed bipolar monolithic IC, which contains four 2-input exclusive-OR/NOR gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high speed digital signal processing systems, which
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CXB1102Q
CXB1102Q
FQFP-24
quad exclusive-or/NOR gate
SONY 01A
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