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    DS100517 Search Results

    DS100517 Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    DS1005-175 Dallas Semiconductor 5-Tap Silicon Delay Line Original PDF
    DS1005-175 Dallas Semiconductor 5 TAP SILICON DELAY LINE Scan PDF

    DS100517 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    transistor bc 564

    Abstract: bc 5578 0604HQ FPD6836SOT343 OT343 re 0603size bc 548 transistor S22m transistor BC 548 Data transistor Bc 540
    Text: FPD6836SOT343 FPD6836SOT3 43 Low-Noise High-Linearity Packaged pHEMT LOW-NOISE HIGH-LINEARITY PACKAGED pHEMT NOT FOR NEW DESIGNS Package: SOT343 Features at 1850MHz     Optimum Technology Matching Applied  GaAs HBT RoHS-compliant (Directive


    Original     		PDF FPD6836SOT343 FPD6836SOT3 OT343 1850MHz) 2002/95/EC) 18dBm FPD6836SOT343 mx750 FPD6836SOT343E EB6836SOT343CE-BA transistor bc 564 bc 5578 0604HQ OT343 re 0603size bc 548 transistor S22m transistor BC 548 Data transistor Bc 540

    FPD1500SOT89

    Abstract: FPD2250SOT89 FPD2250SOT89CE MIL-HDBK-263 FPD2250SOT FPD2250
    Text: FPD2250SOT89CE FPD2250SOT8 9CELow-Noise High-Linearity Packaged pHEMT LOW-NOISE HIGH-LINEARITY PACKAGED pHEMT NOT FOR NEW DESIGNS Package: SOT89 Features      Optimum Technology Matching Applied   GaAs HBT GaAs MESFET InGaP HBT 60% Power-Added Efficiency


    Original     		PDF FPD2250SOT89CE FPD2250SOT8 FPD2250SOT89CE: 31dBm 44dBm FPD2250SOT89CE 25mx1500m EB2250SOT89CE-BC FPD2250SOT89CECE FPD1500SOT89 FPD2250SOT89 MIL-HDBK-263 FPD2250SOT FPD2250

    RF3171TR13

    Abstract: GMSK wireless data transmission RF3171 DCS1800 DCS1900 EGSM900 GSM900 PCS1900 polar architecture 8PSK BLOCK DIAGRAM
    Text: RF3171 QUAD-BAND GMSK POLAR EDGE TXM, 2 UMTS SWITCH PORTS GND GND GND GND GND GND HB RFIN 1 GND Package Style: Module, 7.00mmx6.00mmx1.00mm 30 29 28 27 26 25 24 GND 2           20 W3 Bias and Power Control VBATT 5 VCTL4 6 Switch


    Original     		PDF RF3171 00mmx6 00mmx1 EIA-481. DS100517 RF3171TR13 GMSK wireless data transmission RF3171 DCS1800 DCS1900 EGSM900 GSM900 PCS1900 polar architecture 8PSK BLOCK DIAGRAM

    DS1005-60

    Abstract: 74LS DS1005 DS1005-100 DS1005-125 DS1005-150 DS1005-175 DS1005-75 DS1005M DS1005S
    Text: DS1005 5-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 5 taps equally spaced Delay tolerance ±2 ns or ±3%, whichever is greater Stable and precise over temperature and voltage range Leading and trailing edge accuracy Economical Auto-insertable, low profile


    Original     		PDF DS1005 14-pin 16-pin 74F04 DS1005-60 74LS DS1005 DS1005-100 DS1005-125 DS1005-150 DS1005-175 DS1005-75 DS1005M DS1005S

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Technical Information XPTTM 650V IGBTs GenX4TM IXXK160N65B4 IXXX160N65B4 VCES IC110 VCE sat tfi(typ) Extreme Light Punch Through IGBT for 10-30kHz Switching = = ≤ = 650V 160A 1.80V 90ns TO-264 (IXXK) Symbol Test Conditions VCES VCGR TJ = 25°C to 175°C


    Original     		PDF IXXK160N65B4 IXXX160N65B4 IC110 10-30kHz O-264 160N65B4

    3g hsdpa signal Schematic Diagram

    Abstract: LQG15HN12NJ02D RF3165 RF3165PCBA-410
    Text: RF3165 RF31653V 1750MHz WCDMA Linear Power Amplifier Module 3V 1750MHZ W-CDMA LINEAR POWER AMPLIFIER MODULE NOT FOR NEW DESIGNS 28dBm Linear Output Power  42% Peak Linear Efficiency  28dB Linear Gain  -41dBc ACLR @ ±5MHz  HSDPA Capable IM NC 10 VCC2


    Original     		PDF RF3165 RF31653V 1750MHz -41dBc 28dBm PbF3165 DS100517 3g hsdpa signal Schematic Diagram LQG15HN12NJ02D RF3165 RF3165PCBA-410

    6V-0-6V

    Abstract: precision waveform generator hy 214 74LS DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M
    Text: DS1005 DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced IN 1 14 Vcc IN 1 16 VCC NC 2 13 NC NC 2 15 NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC 3 12 TAP 1 TAP 2 4 11 NC NC 5 10 TAP 3


    Original     		PDF DS1005 14-pin 16-pin DS1005S DS1005. 6V-0-6V precision waveform generator hy 214 74LS DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M

    FPD1500SOT89

    Abstract: FPD2250SOT89 FPD2250SOT89E TRANSISTOR SSG 111 oint 4410 HBT transistor s parameters measures
    Text: FPD2250SOT89 FPD2250SOT8 9 Low-Noise High-Linearity Packaged pHEMT LOW-NOISE HIGH-LINEARITY PACKAGED pHEMT NOT FOR NEW DESIGNS Package: SOT89 Features      Optimum Technology Matching Applied   GaAs HBT GaAs MESFET InGaP HBT 60% Power-Added Efficiency


    Original     		PDF FPD2250SOT89 FPD2250SOT8 FPD2250SOT89E: 31dBm 44dBm FPD2250SOT89 25mx1500m FPD2250SOT89E EB2250SOT89CE EB2250SOT89CE-BC FPD1500SOT89 FPD2250SOT89E TRANSISTOR SSG 111 oint 4410 HBT transistor s parameters measures

    Untitled

    Abstract: No abstract text available
    Text: DS1005 5-Tap Silicon Delay Line www.dalsemi.com FEATURES All-silicon time delay 5 taps equally spaced Delay tolerance ±2 ns or ±3%, whichever is greater Stable and precise over temperature and voltage range Leading and trailing edge accuracy Economical Auto-insertable, low profile


    Original     		PDF DS1005 14-pin 16-pin 56-G2008-001C DS1004Z-3 DS1004Z-4 DS1004Z-5 DS1004Z-5+ DS1004Z-3+ DS1004Z-4+

    74LS

    Abstract: DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S
    Text: DS1005 DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced IN 1 14 Vcc IN 1 16 VCC NC 2 13 NC NC 2 15 NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC 3 12 TAP 1 TAP 2 4 11 NC NC 5 10 TAP 3


    Original     		PDF DS1005 14-pin 16-pin DS1005S DS1005. 74LS DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M

    DS1868

    Abstract: LM 4440 AUDIO AMPLIFIER CIRCUIT DS1230y-200 battery date codes circuit diagram laptop motherboard Scans-049 texas instrument catalog 74ls DS1666-50 st c031 s1040 diode
    Text: S ystem E x t e n s i o n Data Book CPU Supervisors Digital Potentiometers Silicon Timed Circuits Thermal Products DALLAS SEMICONDUCTOR Copyright 1994 Dallas Semiconductor Corporation, Dallas, Texas All Rights Reserved. Circuit diagrams are included to illustrate typical semiconductor applications. Complete information sufficient for


    OCR Scan     		PDF 28-PIN DS9003 DS1868 LM 4440 AUDIO AMPLIFIER CIRCUIT DS1230y-200 battery date codes circuit diagram laptop motherboard Scans-049 texas instrument catalog 74ls DS1666-50 st c031 s1040 diode

    74LS

    Abstract: DS1005 DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S
    Text: DS 1005 DALLAS r DS1005 5-Tap Silicon Delay Line s e m ic o n d u c to r FEATURES PIN ASSIGNMENT • All-silicon time delay IN 1 14 ] Vcc IN £ 1 16 H VCC NC 2 13 ] NC NC C 2 15 n NC C 3 14 H NC NC 3 12 TAP 2 C 4 13 H TAP 1 • Stable and precise over temperature and voltage


    OCR Scan     		PDF DS1005 14-pin 16-pin DS1005 74F04 74LS DS1005-100 DS1005-125 DS1005-60 DS1005-75 DS1005M DS1005S

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or ±3%, whichever is greater NC • Stable and precise over temperature and voltage range TAP 2


    OCR Scan     		PDF DS1005 74F04 DS1005.

    Untitled

    Abstract: No abstract text available
    Text: DS1005 DALLAS DS1005 5-Tap Silicon Delay Line s e m ic o n d u c t o r FEATURES PIN DESCRIPTION • All-silicon time delay • 5 taps equally spaced itC 1 14 ] V c c nc£ 2 13 3 12 ]]TAP 1 TAP 4 Ü Delay tolerance +/- 2 ns or +/- 2%, whichever ncQ is greater


    OCR Scan     		PDF DS1005 DS1005M DS100SH DS100514-Pla 74F04.

    74LS

    Abstract: DS1005 DS1005-60 DS1005G DS1005H DS1005K DS1005M DS1005S
    Text: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT FEATURES • All-silicon time delay IN • 5 taps equally spaced • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage range • Leading and trailing edge accuracy


    OCR Scan     		PDF DS1005 14-pin 16-pin DS1005 74F04 2bmi30 2bl413G 74LS DS1005-60 DS1005G DS1005H DS1005K DS1005M DS1005S

    Untitled

    Abstract: No abstract text available
    Text: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay C1 c2 NC [ 3 TAP 2 c4 NC [ 5 TAP 4 [ 6 GND [ 7 IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage


    OCR Scan     		PDF DS1005 14-pin 16-pin DS1005 74F04 DS1005.

    Untitled

    Abstract: No abstract text available
    Text: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN [ • 5 taps equally spaced NC [ C 1 14 3 Vcc IN C 1 2 13 ] NC NC £ 2 3 12 ] TAP1 4 11 10 ] TAPS NC C 3 • Delay tolerance ± 2 ns or ±3%, whichever is greater


    OCR Scan     		PDF DS1005 74F04 DS1005.

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR CORP OTE D | 2 L 1 4 130 □□□2074 L | T-47-13 Semiconductor 8^? 5Dallas TAP SILICON DELAY LINE FEATURES DS1005 14-Pin DIP DS1005M 8-Pin DIP DS1005S 16-Pin SOIC PIN CONNECTIONS • All silicon time delay Q 1 8 □ Vcc TAP 2 ^ 2 7 □TAP 1


    OCR Scan     		PDF T-47-13 DS1005 14-Pin DS1005M DS1005S 16-Pin DS1005S

    Untitled

    Abstract: No abstract text available
    Text: D S 1005 DALLAS SEMICONDUCTOR FEATURES DS1005 5-Tap Silicon Delay Line PIN ASSIGNMENT • All-silicon time delay • 5 taps equally spaced Vcc IN □ 1 16 □ Vcc NC NC □ 2 15 □ NC 3 14 4 13 □ TAP 1 5 12 6 7 11 □ TAP 3 10 □ NC 8 9 □ TAP 5 E TAP 2 E


    OCR Scan     		PDF DS1005 14-pin 16-pin 74F04 S1005.

    Untitled

    Abstract: No abstract text available
    Text: DS1005 DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line FEATURES PIN ASSIGNMENT • All-silicon time delay IN • 5 taps equally spaced [_ 1 NC [ • Delay tolerance ±2 ns or ±3%, whichever is greater • Stable and precise over temperature and voltage


    OCR Scan     		PDF DS1005 14-pin 16-pin DS1005 74F04 DS1005. 2bl4130

    Untitled

    Abstract: No abstract text available
    Text: DALLAS SEMICONDUCTOR DS1005 5-Tap Silicon Delay Line PIN ASSIGNM ENT FEATURES • All-silicon time delay IN • 5 taps equally spaced NC • Delay tolerance ±2 ns or +3%, whichever is greater NC TAP 2 • Stable and precise over tem perature and voltage range


    OCR Scan     		PDF DS1005 14-pin 16-pin 74F04 DS1005.