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    DM74AS11 Search Results

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    DM74AS11 Price and Stock

    National Semiconductor Corporation DM74AS11N

    Logic Circuit, 3 3-Input AND, AS-TTL, 14 Pin, Plastic, DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM74AS11N 69
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    DM74AS11N 60
    • 1 $3.38
    • 10 $3.38
    • 100 $1.859
    • 1000 $1.859
    • 10000 $1.859
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    DM74AS11 Datasheets (8)

    Part ECAD Model Manufacturer Description Curated Type PDF
    DM74AS112J National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset and Clear Scan PDF
    DM74AS112N National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset and Clear Scan PDF
    DM74AS113J National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset Scan PDF
    DM74AS113N National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset Scan PDF
    DM74AS114J National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset, Common Clear and Common Clock Scan PDF
    DM74AS114N National Semiconductor Dual J-K Negative Edge Triggered Flip-Flops with Preset, Common Clear and Common Clock Scan PDF
    DM74AS11M Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM74AS11N Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

    DM74AS11 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    74AS113

    Abstract: S113
    Text: PRELIMINARY Semiconductor DM54AS113/DM74AS113 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset General Description Features The DM54AS113 is a dual-edge-triggered flip -flo p s . Each flip -flo p has individual J, K, clock, and preset inputs, and also com plem entary Q and Q ou tputs.


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    PDF DM54AS113/DM74AS113 DM54AS113 DM54AS113 DM74AS113 TL/F/6286-2 74AS113 S113

    74AS114

    Abstract: S114
    Text: DM54AS114/ DM74AS114 5 * | National £ZA Semiconductor PRELIMINARY DM54AS114/DM74AS114 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset, Common Clear and Common Clock General Description Features The D M 54A S 114 is a d u a l e d g e -trig g e re d flip - flo p . E ach


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    PDF DM54AS114/DM74AS114 DM54AS114 DM54AS114 DM74AS114 TL/F/6287-2 74AS114 S114

    DM74AS11N

    Abstract: No abstract text available
    Text: NATIONAL SEflICOND -CL06IC3- 31E D • bSD1122 QGt>cîM3G 5 ■ r?n National t^/3 ~t$-oo ÆjA Semiconductor DM74AS11 Triple 3-Input AND Gate ■ Advanced oxide-isolated, ion-implanted Schottky TTL process ■ Functionally and pin for pin compatible with Schottky,


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    PDF -CL06IC3- bSD1122 DM74AS11 DM74AS11N

    national semiconductor TTL

    Abstract: No abstract text available
    Text: éOà CT1 National Semiconductor DM74AS11 Triple 3-Input AND Gate Advanced oxide-isolated, ion-implanted Schottky TTL process Functionally and pin for pin compatible with Schottky, low power Schottky, and advanced low power Schottky TTL counterpart Improved AC performance over Schottky, low power


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    PDF DM74AS11 DM74AS1 national semiconductor TTL

    74AS112

    Abstract: DM54AS1121DM74AS112 S112
    Text: DM54AS 112/ DM74AS 112 PRELIMINARY %9A National ÆjA Semiconductor DM74AS112 Dual J-K Negative-EdgeTriggered Flip-Flops with Preset and Clear General Description Features The 0M 54AS112 is a dual edge-triggered flip -flo p . Each flip -flo p has individual J, K, c lo c l^ c le a r and preset inputs,


    OCR Scan
    PDF DM54AS1121DM74AS112 0M54AS112 DM54AS112 DM74AS112 TL/F/6285-2 74AS112 S112