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    DM54S11 Search Results

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    DM54S11 Price and Stock

    National Semiconductor Corporation DM54S112J/883B

    Flip Flop, Dual, J/K Type, 16 Pin, Ceramic, DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM54S112J/883B 75
    • 1 -
    • 10 -
    • 100 -
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    DM54S112J/883B 32
    • 1 $5.25
    • 10 $2.625
    • 100 $2.625
    • 1000 $2.625
    • 10000 $2.625
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    DM54S112J/883B 15
    • 1 $8.697
    • 10 $6.3778
    • 100 $5.798
    • 1000 $5.798
    • 10000 $5.798
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    DM54S112J/883B 4
    • 1 $8.1
    • 10 $5.94
    • 100 $5.94
    • 1000 $5.94
    • 10000 $5.94
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    National Semiconductor Corporation DM54S11W/883B

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM54S11W/883B 74
    • 1 $19.8293
    • 10 $19.8293
    • 100 $15.4228
    • 1000 $15.4228
    • 10000 $15.4228
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    National Semiconductor Corporation DM54S112J/883C

    Flip Flop, Dual, J/K Type, 16 Pin, Ceramic, DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM54S112J/883C 14
    • 1 $13.9152
    • 10 $9.2768
    • 100 $9.2768
    • 1000 $9.2768
    • 10000 $9.2768
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    DM54S112J/883C 14
    • 1 $9
    • 10 $6.6
    • 100 $6
    • 1000 $6
    • 10000 $6
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    DM54S112J/883C 10
    • 1 $9
    • 10 $4.5
    • 100 $4.5
    • 1000 $4.5
    • 10000 $4.5
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    National Semiconductor Corporation DM54S11J

    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM54S11J 12
    • 1 $10.8
    • 10 $7.2
    • 100 $7.2
    • 1000 $7.2
    • 10000 $7.2
    		Buy Now

    National Semiconductor Corporation DM54S11J/883B

    Logic Circuit, 3 3-Input AND, S-TTL, 14 Pin, Ceramic, DIP
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components DM54S11J/883B 11
    • 1 $10.4364
    • 10 $7.6534
    • 100 $6.9576
    • 1000 $6.9576
    • 10000 $6.9576
    		Buy Now

    DM54S11 Datasheets (20)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    DM54S11 National Semiconductor Triple 3-Input AND Gate Original PDF
    DM54S112 National Semiconductor Dual Negative-Edge-Triggered J-K Flip-Flop with Preset, Clear, and Complementary Outputs Original PDF
    DM54S112J National Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Original PDF
    DM54S112J Fairchild Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM54S112J National Semiconductor Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs Scan PDF
    DM54S112J/883 Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM54S113 National Semiconductor Dual Negative-Edge-Triggered J-K Flip-Flop with Preset and Complementary Outputs Original PDF
    DM54S113J National Semiconductor 7 V, dual negative-edge-triggered master-slave J-K flip-flop with preset and complementary output Scan PDF
    DM54S113J/883 Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM54S114J National Semiconductor Dual Negative Edge Triggered Master-Slave J-K Flip-Flops with Preset, Common Clear, Common Clock and Complementary Outputs Scan PDF
    DM54S11J National Semiconductor Triple 3-Input AND Gates Original PDF
    DM54S11J Fairchild Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11J National Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11J National Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11J/883 Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF
    DM54S11W National Semiconductor Triple 3-Input AND Gates Original PDF
    DM54S11W Fairchild Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11W National Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11W National Semiconductor Triple 3-input AND Gates Scan PDF
    DM54S11W/883 Unknown Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. Historical PDF

    DM54S11 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    C1995

    Abstract: DM54S112 DM54S112J DM74S112 DM74S112N J16A N16E
    Text: DM54S112 DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops on the falling edge of


    Original     		PDF DM54S112 DM74S112 C1995 DM54S112J DM74S112N J16A N16E

    DM74S11

    Abstract: DM54S11J DM54S11W DM74S11N J14A N14A W14B
    Text: DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram Dual-In-Line Package DS006447-1 Order Number DM54S11J, DM54S11W or DM74S11N See Package Number J14A, N14A or W14B


    Original     		PDF DM74S11 DS006447-1 DM54S11J, DM54S11W DM74S11N DS006447 DM74S11 DM54S11J DM74S11N J14A N14A W14B

    DM74S113N

    Abstract: C1995 DM54S113 DM54S113J DM74S113 J14A N14A
    Text: DM54S113 DM74S113 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs The J and K data is processed by the flip-flops on the falling edge of


    Original     		PDF DM54S113 DM74S113 DM74S113N C1995 DM54S113J J14A N14A

    deutsch abc

    Abstract: DM74S11 DM74S11N TL AND Gates w14b C1995 DM54S11 DM54S11J DM54S11W J14A
    Text: DM54S11 DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function Connection Diagram Dual-In-Line Package TL F 6447 – 1 Order Number DM54S11J DM54S11W or DM74S11N See NS Package Number J14A N14A or W14B


    Original     		PDF DM54S11 DM74S11 DM54S11J DM54S11W DM74S11N C1995 RRD-B30M105 deutsch abc DM74S11N TL AND Gates w14b J14A

    DM74S112

    Abstract: DM54S112 DM54S112J DM74S112N J16A N16E
    Text: DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs sition time of the negative going edge of the clock pulse. Data on the J and K inputs can be changed while the clock is high or low without affecting the outputs as long as setup


    Original     		PDF DM74S112 DM74S112 DM54S112 DM54S112J DM74S112N J16A N16E

    preset 100 K

    Abstract: DM54S112 DM54S112J DM74S112 DM74S112N J16A N16E
    Text: , June 1989 DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S112/DM74S112 preset 100 K DM54S112 DM54S112J DM74S112 DM74S112N J16A N16E

    DM54

    Abstract: DM74 DM74S114
    Text: ÆjA Semiconductor DM54S114/DM74S114 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Common Clear, Common Clock and Complementary Outputs General Description Absolute Maximum Ratings Note d T h is d e v ic e c o n ta in s tw o n e g a tiv e -e d g e -trig g e re d J-K


    OCR Scan     		PDF DM54S114/DM74S114 DM54 DM74 DM74S114

    DM54S11

    Abstract: DM54S11W DM74S11N J14A N14A W14B
    Text: , June 1989 DM54S11/DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram Dual-In-Line Package V, , U1 VI C3 B3 A3 Y3 Order Number DM54S11J, DM54S11W or DM74S11N


    OCR Scan     		PDF DM54S11/DM74S11 TL/F/6447-1 DM54S11 DM54S11W DM74S11N TL/F/6447 RRD-B30M105/Printed J14A N14A W14B

    Untitled

    Abstract: No abstract text available
    Text: ¡^National Semiconductor DM54S11/DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram Dual-ln-Line Package Y1 C3 B3 A3 3 D -1 Order Number DM54S11J, DM54S11W or DM74S11N


    OCR Scan     		PDF DM54S11/DM74S11 DM54S11J, DM54S11W DM74S11N

    Untitled

    Abstract: No abstract text available
    Text: Ju n e 1989 Semiconductor DM54S113/DM74S113 Dual N egative-Edge-Triggered M aster-Slave J-K Flip-Flops with Preset and C om plem en tary O utputs General Description T h is d evice co ntain s tw o in d epen d ent negative-edge-trig­ gered J - K flip-flops with co m p lem entary outputs. T h e J and


    OCR Scan     		PDF DM54S113/DM74S11 DM54S113/DM74S113

    DM54

    Abstract: DM54S11 DM54S11W DM74S11 DM74S11N J14A N14A W14B
    Text: National Semiconductor DM54S11/DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram □ual-ln-Line Package T L /F /6 4 4 7 -1 Order Number DM54S11J, DM54S11W or DM74S11N


    OCR Scan     		PDF DM54S11/DM74S11 DM54S11 DM54S11W DM74S11N DM54 DM74S11 J14A N14A W14B

    Untitled

    Abstract: No abstract text available
    Text: June 1989 DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S112/DM74S112

    Untitled

    Abstract: No abstract text available
    Text: June 1989 DM54S11/DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram Dual-In-Line Package V,:r U1 VI C3 B3 A3 Y3 Order Number DM54S11J, DM54S11W or DM74S11N


    OCR Scan     		PDF DM54S11/DM74S11 DM54S11J, DM54S11W DM74S11N N14AorW14B 105/Printed

    Untitled

    Abstract: No abstract text available
    Text: S112 National Semiconductor DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S112/DM74S112

    J14A

    Abstract: N14A W14B DM54S11J DM54S11W DM74S11 DM74S11N
    Text: S E M IC O N D U C T O R tm DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which perform s the logic A N D function. Connection Diagram Dual-ln-Line Package DS006447-1 Order Number DM54S11J, DM54S11W or DM74S11N


    OCR Scan     		PDF DM74S11 DS006447-1 DM54S11J, DM54S11W DM74S11N DS006447 J14A N14A W14B DM54S11J DM74S11

    Untitled

    Abstract: No abstract text available
    Text: S112 National Semiconductor DM54S112/DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S112/DM74S112

    Untitled

    Abstract: No abstract text available
    Text: S113 National Jfifl Semiconductor DM54S113/DM74S113 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs General Description This device contains two independent negative-edge-trig­ gered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S113/DM74S113 260ft

    Untitled

    Abstract: No abstract text available
    Text: S113 £ 2 National Semiconductor DM54S113/DM74S113 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs. The J and


    OCR Scan     		PDF DM54S113/DM74S113

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which perform s the logic AN D function. Connection Diagram 3 Ai Y3 1 Y1 c3 B Vet. C 13 12 1 1 1 9 8 D jal-ln-Lin e Packa ge


    OCR Scan     		PDF DM74S11 DM54S11J, DM54S11W DM74S11N DS006447

    Untitled

    Abstract: No abstract text available
    Text: S E M IC O N D U C T O R tm DM74S11 Triple 3-Input AND Gates General Description This device contains three independent gates each of which performs the logic AND function. Connection Diagram D jal-ln-Lin e Packa 3 Va. Y1 C lM Ai B3 c3 11 12 13 Y3 9 1 1


    OCR Scan     		PDF DM74S11 DM54S11J, DM54S11W DM74S11N DS006447

    DM74S112N

    Abstract: DM54S112 DM54S112J DM74S112 J16A N16E
    Text: DM74S112 Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Preset, Clear, and Complementary Outputs sition tim e o f th e negative going edge o f the clock pulse. Data on the J and K inputs can be changed w hile the clock is high o r low w ithout affecting the outputs as long as setup


    OCR Scan     		PDF DM74S112 16-Lead DM74S112N DM54S112 DM54S112J DM74S112 J16A N16E