F100K
Abstract: SY100S313 SY100S313FC SY100S313JC SY100S313JCTR
Text: QUAD DRIVER FEATURES O1b O2a O2b O1a PIN CONFIGURATIONS O2a Oa VEES 11 10 9 8 7 6 5 Da Db 12 13 14 15 16 17 18 VEE VEES E Dc BLOCK DIAGRAM Dd Top View PLCC J28-1 4 3 O2b O1b 2 1 VCCA VCC VCC 28 27 O1c 26 O2c O1b O2b O1c O2c O1c E Da VEE Db 24 23 22 21 20 19
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J28-1
F24-1
SY100S31
SY100S313FC
SY100S313JC
SY100S313JCTR
SY100S313
F100K
SY100S313
SY100S313FC
SY100S313JC
SY100S313JCTR
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F100K
Abstract: SY100S313 SY100S313FC SY100S313JC SY100S313JCTR
Text: SY100S313 FINAL QUAD DRIVER FEATURES O1b O2a O2b O1a PIN CONFIGURATIONS O2a Oa VEES 11 10 9 8 7 6 5 Da Db 12 13 14 15 16 17 18 VEE VEES E Dc BLOCK DIAGRAM Dd Top View PLCC J28-1 4 3 O2b O1b 2 1 VCCA VCC VCC 28 27 O1c 26 O2c O1c O2c O1c E Da VEE Db 24 23 22 21 20 19
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SY100S313
J28-1
F24-1
0S313FC
SY100S313JC
SY100S313JCTR
F100K
SY100S313
SY100S313FC
SY100S313JC
SY100S313JCTR
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Untitled
Abstract: No abstract text available
Text: P R E L IM IN A RY PACIFIC MONOLITHICS DA I A M il l I PM2303 2000-5500 MHz GaAs MMIC Downconverter Features: • • • • 15 dB Conversion Gain Fully Matched Ports 14 Pin Plastic SOIC Internal LO Buffer Amplifier The PM2303 is a GaAs monolithic wideband frequency converter complete with LO buffer, RF amplifiers, double-balanced mixer and IF
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PM2303
PM2303
408-732-HOOO,
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datel converter TWR
Abstract: No abstract text available
Text: S Da i tL IN N O V A T IO N a n d E X C E L L E N C E Triple Output TW R M o de ls Miniature, 18-72V Input Range 12-15 Watt, DC/DC Converters Features Output voltages: +5V/+12V or +5V/+15V Ultra-wide. 18-72V, input voltage ranges Miniature, 2" x 2" x 0.45" packages
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8-72V
8-72V,
TWR-5/1000-15/250-D48
800mA
15Vdc
200mA
datel converter TWR
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PDF
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CD 4511 PIN CONFIGURATION
Abstract: pin configuration 4511 4511 pin configuration pin diagram decoder 4511 40511 4526B 4006B 4015B 40160B 4021B
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 l l l i PE 7 — 9 - 1 5 - Da CPA 1— MRa d B cpb 4 3 DS 10 - CP Pq Pi 14 10 *DD - Pin 16 ^SS = Pin 8 T TT 13 12 11 1 0 - CP P 3 p4 P2 Q5 q 6 07 C45 4006B 7 6 5 4 13 14 15
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4015B
QOBq18Â
4014B
4021B
4006B
3c04cÂ
4731B
40160B,
40161B
40160B
CD 4511 PIN CONFIGURATION
pin configuration 4511
4511 pin configuration
pin diagram decoder 4511
40511
4526B
4006B
4015B
4021B
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PDF
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4006B
Abstract: 4014B 4015B 40160B 40161B 40194B 40195B 4021B 4031B 4035B
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS DIGITAL-CMOS C42 4015B C43 4014B 5 7— 9 - PE Da 1 5 - dB 11 - DS CPA 1— cpb 10- CP 4 3 Pq P i 14 10 TTT 13 12 11 CP P2 P p4 p5 p6 p7 Vn n = Pin 16 DD ^SS =Pin 8 C45 4006B I l I I I I I I I 1 0 - 15 2 C44
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4015B
QOBq18Â
4014B
4021B
4006B
3c04cÂ
4731B
40160B,
40161B
4557B
4006B
4014B
4015B
40160B
40161B
40194B
40195B
4021B
4031B
4035B
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PDF
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A15C
Abstract: CY62147V CY62147V18
Text: C Y 62147V M oBL C Y 62147V 18 M oB L2™ V CYPRESS 256K x 16 Static RAM Features pins I/Oq throu gh I/0 15 are placed in a h igh -im pe da nce s tate w hen: d e selected (CE HIG H), ou tp u ts are disabled (OE HIG H), BHE and BLE_are disabled (BHE, BLE HIG H), o r d u r
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CY62147V:
CY62147V18:
CY62147V
CY62147V18
A15C
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PDF
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qml-38535
Abstract: QML-38534 A1830 A1657
Text: REVISIONS LTR DESCRIPTION A dded C ase o u t l i n e Z. DATE YR-MO-DA R e d re w e n t i r e d o c u m e n t. 9 5 - 10-12 APPROVED K.A. C o t t o n g im REV SHEET REV SHEET 15 16 17 REV STATUS OF SHEETS 18 19 20 21 22 23 REV SHEET PMIC N/A STANDARD MICROCIRCUIT
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1024KX
32-BIT,
MIL-STD-883
5962-XXXXXZZ
QML-38534
QML-38535
MIL-BUL-103
A1830
A1657
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PDF
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9-to-36V
Abstract: No abstract text available
Text: irei & dA TEL S E R I E S IN N O V A T IO N a n d E X C E L L E N C E Dual Output BER Models Low-Cost, Wide Input Range 15 Watt, DC/DC Converters F eatures « Low co st • R u g g e d , fu lly p o tte d , d la lly l p h th a la te p la s tic p a c k a g e s
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180kHz
9-to-36V
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PDF
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H29TA
Abstract: EL B17
Text: 7 M e c h a n ic a l S p e c i f i c a t i o n s This section provides detailed inform ation ab o u t the 21064A package and the complete pinout. 7.1 Package Inform ation Figure 45 shows two examples of h e a t sinks which m a y be used to help cool the 21064A. The p rim a ry h e a t sink n u m b e r 2 in Figure 45 is available from
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1064A
1064A.
0Q0O0000
H29TA
EL B17
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PDF
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93L38
Abstract: 9338PC
Text: 38 CO NNECTIO N DIAGRAM PINOUT A «^ 9338 93L38 o /o SS S ' 8-BIT MULTIPLE PORT REGISTER DESCRIPTION — The ’38 is an 8-bit m ultiple port register designed for high speed random access mem ory applications where the ability to sim ulta neously read and write is desirable. A com m on use would be as a register
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93L38
9338PC
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PDF
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Untitled
Abstract: No abstract text available
Text: J'jk i . Vj; P54/74FCT240/A/C P54/74PCT240/A/C P54/74FCT241/A/C (P54/74PCT241/A/C) P54/74FCT244/A/C (P54/74PCT244/A/C) OCTAL BUFFERS/LINE DRIVERS W/ 3-STATE OUTPUTS FEATURES • Function, Pinout, and Drive Com patible with the FC T and F Logic ■ FCT-C speed at 4.1ns max. (Com'l)
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P54/74FCT240/A/C
P54/74PCT240/A/C)
P54/74FCT241/A/C
P54/74PCT241/A/C)
P54/74FCT244/A/C
P54/74PCT244/A/C)
MIL-STD-883,
41A/244A
241C/244C
AE180SÂ
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AE1515-6
Abstract: No abstract text available
Text: P5&/74FCT240T/AT/CT - P54/74FCT241T/AT/CT P54/74FCT244T/AT/CT OCTAL BUFFERS/LINE DRIVERS W/ 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic ESD protection exceeds 2000V Power-off disable feature FCT-C speed at 4.1ns max. Com'l 'FCT241T/4T
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/74FCT240T/AT/CT
P54/74FCT241T/AT/CT
P54/74FCT244T/AT/CT
FCT241T/4T
FCT240T,
FCT241T
MIL-STD-883,
241T/244T
240AT
241AT/244AT
AE1515-6
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PDF
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Untitled
Abstract: No abstract text available
Text: P54/74FCT240/A/C P54/74PCT240/A/C P54/74FCT241 /A/C (P54/74PCT241/A/C) P54/74FCT244/A/C (P54/74PCT244/A/C) OCTAL BUFFERS/LINE DRIVERS W/ 3-STATE OUTPUTS FEATURES ESD protection exceeds 2000V • Function, Pinout, and Drive Compatible with the FCT and F Logic
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P54/74FCT240/A/C
P54/74PCT240/A/C)
P54/74FCT241
P54/74PCT241/A/C)
P54/74FCT244/A/C
P54/74PCT244/A/C)
Tec1B051bl
41A/244A
241C/244C
MIL-STD-883,
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Untitled
Abstract: No abstract text available
Text: P54/74FCT240T/AT/CT - P54/74FCT241T/AT/CT P54/74FCT244T/AT/CT OCTAL BUFFERS/LINE DRIVERS W/ 3-STATE OUTPUTS FEATURES Function, Pinout and Drive Compatible with the FCT and F Logic • ESD protection exceeds 2000V ■ Power-off disable feature FCT-C speed at 4.1ns max. Com'l 'FCT241T/4T
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P54/74FCT240T/AT/CT
P54/74FCT241T/AT/CT
P54/74FCT244T/AT/CT
FCT241T/4T
FCT240T,
FCT241T
FCT244T
241T/244T
240AT
241AT/244AT
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PDF
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T2316162A
Abstract: T2316162
Text: tm TE CH T2316162A 1024K x 16 DYNAMIC RAM DRAM EDO PAGE MODE FEATURES GENERAL DESCRIPTION • Industry-standard x 16 pinouts and timing functions. • Single 5V ± 10% power supply. • All device pins are TTL- compatible. • 1K-cycle refresh in 16ms.
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T2316162A
1024K
T2316162A
44/50L
T2316162
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IN74HC323DW
Abstract: IN74HC323N
Text: TECHNICAL DATA IN74HC323 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC323 is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC323
IN74HC323
LS/ALS323.
IN74HC323N
IN74HC323DW
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SL74HC323
Abstract: SL74HC323D SL74HC323N da qg
Text: SL74HC323 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The SL74HC323 is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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SL74HC323
SL74HC323
LS/ALS323.
SL74HC323N
SL74HZ;
SL74HC323D
da qg
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PDF
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IN74HC323DW
Abstract: IN74HC323N
Text: TECHNICAL DATA IN74HC323 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC323 is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC323
IN74HC323
LS/ALS323.
IN74HC323N
IN74HC323DW
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PDF
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IN74HC299
Abstract: IN74HC299DW IN74HC299N
Text: TECHNICAL DATA IN74HC299 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC299
IN74HC299
LS/ALS299.
IN74HC299features
IN74HC299DW
IN74HC299N
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PDF
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SL74HC299D
Abstract: SL74HC299 SL74HC299N
Text: SL74HC299 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The SL74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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SL74HC299
SL74HC299
LS/ALS299.
SL74HC299D
SL74HC299N
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IN74HC299
Abstract: IN74HC299DW IN74HC299N
Text: TECHNICAL DATA IN74HC299 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The IN74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC299
IN74HC299
LS/ALS299.
IN74HC299features
IN74HC299DW
IN74HC299N
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PDF
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IN74HC299
Abstract: IN74HC299DW IN74HC299N
Text: IN74HC299 8-BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER WITH PARALLEL I/O High-Performance Silicon-Gate CMOS • • • • The IN74HC299 is identical in pinout to the LS/ALS299. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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IN74HC299
IN74HC299
LS/ALS299.
IN74HC299features
IN74HC299DW
IN74HC299N
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PDF
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KK74HC323A
Abstract: No abstract text available
Text: TECHNICAL DATA KK74HC323A 8-Bit Bidirectional Universal Shift Register with Parallel I/O High-Performance Silicon-Gate CMOS The KK74HC323A is identical in pinout to the LS/ALS323. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs.
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KK74HC323A
KK74HC323A
LS/ALS323.
loadi25
013AC)
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