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    Rochester Electronics LLC CY62147VLL-70ZIT

    IC SRAM 4MBIT PARALLEL 44TSOP II
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    DigiKey CY62147VLL-70ZIT Bulk 110
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    Cypress Semiconductor CY62147VLL-70BAI

    256K X 16 STANDARD SRAM, 70 ns, PBGA48
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    Quest Components CY62147VLL-70BAI 874
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    Cypress Semiconductor CY62147VLL-70ZIT

    Standard SRAM, 256KX16, 70ns PDSO44 '
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    Rochester Electronics CY62147VLL-70ZIT 1,000 1
    • 1 $2.64
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    CY62147V Datasheets (6)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    CY62147V Cypress Semiconductor 4M (256K x 16) Static RAM Original PDF
    CY62147V18 Cypress Semiconductor 256K x 16 Static RAM Original PDF
    CY62147V18-85BAI Cypress Semiconductor 256K x 16 Static RAM Original PDF
    CY62147VLL-70BAI Cypress Semiconductor 4M (256K x 16) Static RAM Original PDF
    CY62147VLL-70ZI Cypress Semiconductor 4M (256K x 16) Static RAM Original PDF
    CY62147VLL-70ZI Cypress Semiconductor 256K x 16 Static RAM Original PDF

    CY62147V Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    Untitled

    Abstract: No abstract text available
    Text: 1May 7, 2001May 7, 2001*CY62147V MoBL CY62147CV25/30/33 ADVANCE INFORMATION MoBLTM 256K x 16 Static RAM Features and BHE are HIGH. The input/output pins I/O0 through I/O15 are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are


    Original     		2001May CY62147V CY62147CV25/30/33 CY62147CV25: CY62147CV30: CY62147CV33: I/O15) PDF

    Untitled

    Abstract: No abstract text available
    Text: CY62147V MoBL PRELIMINARY 256K x 16 Static RAM Features disabled BHE, BLE HIGH , or during a write operation (CE LOW, and WE LOW). • Low voltage range: — 1.8V–3.6V • Ultra low active, standby power • Easy memory expansion with CE and OE features


    Original     		CY62147V I/O15) PDF

    Untitled

    Abstract: No abstract text available
    Text: 1*CY62147V MoBL CY62146CV25/30/33 ADVANCE INFORMATION MoBLTM 256K x 16 Static RAM Features through I/O15 are placed in a high-impedance state when: deselected CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write


    Original     		CY62147V CY62146CV25/30/33 CY62146CV25: CY62146CV30: CY62146CV33: I/O15) PDF

    CY62147V

    Abstract: CY62147VLL-70ZI
    Text: 47V CY62147V MoBL 256K x 16 Static RAM Features • Low voltage range: — CY62147V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		CY62147V CY62147V: CY62147VLL-70ZI PDF

    CY62147V

    Abstract: CY62147V18 cy62147VLL-70BAI
    Text: CY62147V MoBL CY62147V18 MoBL2™ 256K x 16 Static RAM Features pins I/O 0 through I/O15 are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).


    Original     		CY62147V CY62147V18 I/O15) CY62147V: CY62147V18: cy62147VLL-70BAI PDF

    CY62147V

    Abstract: No abstract text available
    Text: CY62147V MoBL 4M 256K x 16 Static RAM Features • • • • • • • deselected (CE HIGH) or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are


    Original     		CY62147V I/O15) 44-pin CY62147CV30) PDF

    Untitled

    Abstract: No abstract text available
    Text: 1*CY62147V MoBL CY62147V MoBL™ 256K x 16 Static RAM Features • Low voltage range: — CY62147V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		CY62147V CY62147V: PDF

    CY62147V18

    Abstract: No abstract text available
    Text: CY62147V18 MoBL2 256K x 16 Static RAM Features • Low voltage range: — CY62147V18: 1.75V–1.95V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		CY62147V18 CY62147V18: PDF

    Untitled

    Abstract: No abstract text available
    Text: CY62147V MoBL 256K x 16 Static RAM Features • Low voltage range: — CY62147V: 2.7V–3.6V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		CY62147V CY62147V: PDF

    CY62147V

    Abstract: CY62147V18 CY62147VLL-70BAI
    Text: CY62147V MoBL CY62147V18 MoBL2™ 256K x 16 Static RAM pins I/O 0 through I/O15 are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).


    Original     		CY62147V CY62147V18 I/O15) CY62147V: CY62147V18: CY62147VLL-70BAI PDF

    CY62147V

    Abstract: No abstract text available
    Text: CY62147V MoBL 4M 256K x 16 Static RAM Features • • • • • • • deselected (CE HIGH) or when CE is LOW and both BLE and BHE are HIGH. The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are


    Original     		CY62147V I/O15) 44-pin CY62147CV30) PDF

    ultra fine pitch BGA

    Abstract: CY62147CV25 CY62147CV30 CY62147CV33 CY62147V
    Text: 47V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33 ultra fine pitch BGA CY62147CV25 CY62147CV30 CY62147CV33 CY62147V PDF

    CY62147BV18LL-70BAI

    Abstract: No abstract text available
    Text: 47V CY62147BV18 MoBL2 256K x 16 Static RAM Features • Low voltage range: — CY62147BV18: 1.65V–1.95V • Ultra-low active, standby power • Easy memory expansion with CE and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected


    Original     		CY62147BV18 CY62147BV18: CY62147V18 CY62147BV18LL-70BAI PDF

    vhdl code for dice game

    Abstract: Video Proc 3.3V 0.07A 64-Pin PQFP ez811 GRAPHICAL LCD interfaced with psoc 5 cypress ez-usb AN2131QC CYM9239 vhdl code PN 250 code generator CY3649 cy7c63723 Keyboard and Optical mouse program CY7C9689 ethernet
    Text: Product Selector Guide Communications Products Description Pins Part Number Freq. Range Mbps ICC (mA) Packages* 3.3V SONET/SDH PMD Transceiver 2.5V SiGe Low Power SONET/SDH Transceiver SONET/SDH Transceiver w/ 100K Logic 2.5 G-Link w/ 100K Logic OC-48 Packet Over SONET (POS) Framer


    Original     		OC-48 CYS25G0101DX CYS25G0102 CYS25G01K100 CYP25G01K100 CY7C9536 CY7C955 CY7B952 CY7B951 10BASE vhdl code for dice game Video Proc 3.3V 0.07A 64-Pin PQFP ez811 GRAPHICAL LCD interfaced with psoc 5 cypress ez-usb AN2131QC CYM9239 vhdl code PN 250 code generator CY3649 cy7c63723 Keyboard and Optical mouse program CY7C9689 ethernet PDF

    TC554161A

    Abstract: HY62WT08081E K6X8008C2B CY62148E r1lv0416 K6F1616 k6t0808c1d BH616UV4010 BH616UV8010 BH62UV4000
    Text: BSI Ultra Low Power SRAM Cross Reference Table BH-Series Density Config. x8 Part No. BH62UV4000 Speed ns 55 Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax 2uA 1.5mA N.A. 2uA N.A 9mA Voltage (V) Renesas Hynix BH616UV4010 55 2uA 2uA N.A 1.5mA 9mA


    Original     		BH62UV4000 BH616UV4010 BH62UV8000 BH616UV8010 BH62UV1600 BH616UV1610 TC55V4000 TC55VEM208ASTN T16LV8017 K6X8008T2B TC554161A HY62WT08081E K6X8008C2B CY62148E r1lv0416 K6F1616 k6t0808c1d BH616UV4010 BH616UV8010 BH62UV4000 PDF

    HM628100

    Abstract: HM6216514 M5M5256D-L K6X0808C1D BS616LV1010 BS616LV2016 BS616LV2019 BS616UV2019 K6X8008C2B BS62LV2006
    Text: BSI Low Power SRAM Cross Reference Table Nov-30-2008 Density Configuration Part No. Speed ns Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax Voltage (V) Samsung Cypress 2.4~5.5 x8 BS62LV256 70 0.05uA 0.1uA 0.4uA 1mA 20mA 35mA BS62LV1027 55/70 0.1uA


    Original     		Nov-30-2008 BS62LV256 M5M5256D-G K6X0808T1D CY62256V IS62LV256AL BS62LV1027 BS616LV1010 CY62256 M5M5256D-L HM628100 HM6216514 M5M5256D-L K6X0808C1D BS616LV1010 BS616LV2016 BS616LV2019 BS616UV2019 K6X8008C2B BS62LV2006 PDF

    Untitled

    Abstract: No abstract text available
    Text: 147V CY62147CV25/30/33 MoBL 256K x 16 Static RAM Features cantly reduces power consumption by 80% when addresses are not toggling. The device can also be put into standby mode reducing power consumption by more than 99% when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance state when: deselected (CE HIGH), outputs are


    Original     		CY62147CV25/30/33 I/O15) CY62147CV25: CY62147CV30: CY62147CV33: CY62147V CY62147CV25/30/33 PDF

    M5M418165

    Abstract: NEC 2581 CSP-48 AS7C33256PFS18A tc5588 KM6865 FLASH CROSS 256K16 TR-81090 la 4620
    Text: Product Guide SRAM 64K 256K 512K All densities in bits 1M 2M 1.65V-3.6V Low-power Asynchronous IntelliwattT M 32Kx8 5V Fast Asynchronous 4M 8M 16M 512K×8 1M×8 2M×8 256K×16 3.3V Fast Asynchronous 8K×8 32K×8 32K×16 32K×16 128K×8 512K×8 64K×16


    Original     		Q4--2000 1Mx18 512Kx36 SE-597 x2255 M5M418165 NEC 2581 CSP-48 AS7C33256PFS18A tc5588 KM6865 FLASH CROSS 256K16 TR-81090 la 4620 PDF

    TC55VEM416AXBN

    Abstract: K6F8016U6B HY62WT08081E K6X4008C1F BH-Series CY62147CV30 Hynix Cross Reference samsung k6x1008c2d CY62148E TC55VEM216ABXN
    Text: BSI Ultra Low Power SRAM Cross Reference Table BH-Series Density Config. x8 Part No. BH62UV4000 Speed ns 55 Iccsb1 Typical (at 25C) 2V 3V 5V Icc 3V 1MHz fmax 5V fmax 2uA 1.5mA N.A. 2uA N.A 9mA Voltage (V) Renesas Hynix BH616UV4010 55 2uA 2uA N.A 1.5mA 9mA


    Original     		BH62UV4000 BH616UV4010 BH62UV8000 BH616UV8010 BH62UV1600 BH616UV1610 TC55V4000 TC55VEM208ASTN T16LV8017 K6X8008T2B TC55VEM416AXBN K6F8016U6B HY62WT08081E K6X4008C1F BH-Series CY62147CV30 Hynix Cross Reference samsung k6x1008c2d CY62148E TC55VEM216ABXN PDF

    CY62147CV18

    Abstract: No abstract text available
    Text: CY62147CV18 MoBL2 256K x 16 Static RAM Features power consumption by 99% when addresses are not toggling. The device can also be put into standby mode when deselected CE HIGH or both BLE and BHE are HIGH . The input/output pins (I/O0 through I/O15) are placed in a high-impedance


    Original     		CY62147CV18 I/O15) CY62147CV18: CY62147V18/BV18 BV48A. PDF

    2M X 32 Bits 72-Pin Flash SO-DIMM

    Abstract: AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037
    Text: GO TO WEB MAIN INDEX 3URGXFW 6HOHFWRU *XLGH Static RAMs Organization/Density Overview Density X1 X4 X8 X9 X16 X18 X32 X36 7C148 7C149 7C150 4 Kb 16 Kb 7C167A 7C168A 7C128A 6116 64 Kb to 72 Kb 7C187 7C164 7C166 7C185 6264 7C182 256 Kb to 288 Kb 7C197 7C194


    Original     		7C148 7C149 7C150 7C167A 7C168A 7C128A 7C187 7C164 7C166 7C185 2M X 32 Bits 72-Pin Flash SO-DIMM AN2131QC Triton P54C SO-DIMM 72pin 32bit 5V 2M AN2131-DK001 AN2131SC vhdl code for pipelined matrix multiplication VIC068A user guide parallel interface ts vhdl 7C037 PDF

    CY62146V

    Abstract: CY62146V18 ZNS25
    Text: CY62146V MoBL CY62146V18 MoBL2™ 256K x 16 Static RAM put/output pins I/O0 through I/O 15 are placed in a high-impedance state when: deselected (CE HIGH), outputs are disabled (OE HIGH), BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).


    Original     		CY62146V CY62146V18 CY62146V18: CY62146V: ZNS25 PDF

    A14C

    Abstract: A15H CY62147V
    Text: V CYPRESS PRELIMINARY C Y 62147V M oBL 256K x 16 Static RAM Features disabled B H E , BLE HIG H , o r during a w rite op era tion (CE LOW, and W E LOW ). • Low vo ltag e range: -1 .8 V -3 .6 V • Ultra low active, s ta n d b y p o w er • Easy m e m o ry e x p a n sio n w ith C E and O E fe a tu re s


    OCR Scan     		CY62147V A14C A15H PDF

    A15C

    Abstract: CY62147V CY62147V18
    Text: C Y 62147V M oBL C Y 62147V 18 M oB L2™ V CYPRESS 256K x 16 Static RAM Features pins I/Oq throu gh I/0 15 are placed in a h igh -im pe da nce s tate w hen: d e selected (CE HIG H), ou tp u ts are disabled (OE HIG H), BHE and BLE_are disabled (BHE, BLE HIG H), o r d u r­


    OCR Scan     		CY62147V: CY62147V18: CY62147V CY62147V18 A15C PDF