J239
Abstract: AVDD33 J236 MAX5890 C1005X5R1A104KT LMK105BJ104KV T3/mrc d2n MAX5891 T494A106K010AS TAJB476K006R
Text: 19-0504; Rev 2; 7/07 MAX5889/MAX5890/MAX5891 Evaluation Kits Features The MAX5889, MAX5890, and MAX5891 evaluation kits EV kits are each fully assembled and tested printedcircuit boards (PCBs) that contain all the components necessary to evaluate the performance of the
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MAX5889/MAX5890/MAX5891
MAX5889,
MAX5890,
MAX5891
600Msps
J239
AVDD33
J236
MAX5890
C1005X5R1A104KT
LMK105BJ104KV
T3/mrc d2n
T494A106K010AS
TAJB476K006R
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Untitled
Abstract: No abstract text available
Text: WM8235 w 70MSPS 9-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output DESCRIPTION FEATURES The WM8235 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors CIS at pixel
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WM8235
70MSPS
WM8235
16-bit
23MSPS.
400mA
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Untitled
Abstract: No abstract text available
Text: WM8234 w 70MSPS 6-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output DESCRIPTION FEATURES The WM8234 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors CIS at pixel
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WM8234
70MSPS
WM8234
16-bit
23MSPS.
320mA
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WM8233
Abstract: OP10 WAN0118 C28E
Text: WM8233 w 70MSPS 6-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output DESCRIPTION FEATURES The WM8233 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors CIS at pixel
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WM8233
16-bit
35MSPS.
OP10
WAN0118
C28E
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J-STD-020B
Abstract: gd2v WM8232 wm823 WAN_0118
Text: WM8232 w 70MSPS 3-Channel AFE with Sensor Timing Generation and LVDS/CMOS Data Output DESCRIPTION FEATURES The WM8232 is a 16-bit analogue front end/digitiser IC which processes and digitises the analogue output signals from CCD sensors or Contact Image Sensors CIS at pixel
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WM8232
70MSPS
WM8232
16-bit
35MSPS.
320mA
J-STD-020B
gd2v
wm823
WAN_0118
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Motorola D8N
Abstract: AD9781BCPZRL7
Text: Dual 12-/14-/16-Bit, LVDS Interface 600 MSPS DACs AD9780/AD9781/AD9783 Preliminary Technical Data FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier WCDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits useable outputs
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10-bit
72-lead
12-/14-/16-Bit,
AD9780/AD9781/AD9783
Motorola D8N
AD9781BCPZRL7
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AD9780BCPZ
Abstract: BAV99ZXCT AD9783 ADL5370 AVDD33 wcdma baseband 0x0547
Text: Dual 12-/14-/16-Bit, LVDS Interface 600 MSPS DACs AD9780/AD9781/AD9783 FEATURES GENERAL DESCRIPTION High dynamic range, dual DAC parts Low noise and intermodulation distortion Single carrier W-CDMA ACLR = 80 dBc @ 61.44 MHz IF Innovative switching output stage permits usable outputs
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12-/14-/16-Bit,
AD9780/AD9781/AD9783
10-bit
72-lead
AD9780CPZRL1
AD9780-EBZ1
AD9781-EBZ1
AD9783-EBZ1
AD9780BCPZ
BAV99ZXCT
AD9783
ADL5370
AVDD33
wcdma baseband
0x0547
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MO-220-VNND-4
Abstract: No abstract text available
Text: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 13-01-11 Phu H. Nguyen
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16-BIT,
V62/12654
5962-V036-13
V62/12654-01XE
AD9122SCPZ-EP
MO-220-VNND-4
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Untitled
Abstract: No abstract text available
Text: DAC5681 www.ti.com SLLS864 – AUGUST 2007 16-BIT, 1.0 GSPS DIGITAL-TO-ANALOG CONVERTER DAC FEATURES 1 • • • • 16-Bit Digital-to-Analog Converter (DAC) 1.0 GSPS Update Rate 16-Bit, 1.0 GSPS Input LVDS Data Bus – 8 Sample Input FIFO – On-Chip Delay Lock Loop
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DAC5681
SLLS864
16-BIT,
16-Bit
64-Pin
DAC5681
DAC5682Z
DAC5682Z
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MO-220-VNND-4
Abstract: adl537x D8P analog devices
Text: Dual, 16-Bit, 1130 MSPS, TxDAC+ Digital-to-Analog Converter AD9122-EP Enhanced Product FEATURES GENERAL DESCRIPTION Flexible LVDS interface allows word, byte, or nibble load Single-carrier W-CDMA ACLR = 82 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA
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16-Bit,
AD9122-EP
AD9122-EP
ADL537x
52809-A
MO-220-VNND-4
72-Lead
CP-72-7)
MO-220-VNND-4
D8P analog devices
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comcode
Abstract: GR-253 TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7
Text: Preliminary Data Sheet August 2000 TTRN012G5 2.5 Gbits/s and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer Features • TTRN012G5 supports OC-48/STM-16 data rate ■ TTRN012G7 supports: — OC-48/STM-16 data rate — RS (255, 239) forward error correction (FEC)
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TTRN012G5
TTRN012G7
TTRN012G5
OC-48/STM-16
TTRN012G7
DS00-375HSPL
DS00-155HSPL)
comcode
GR-253
TRCV012G5
TRCV012G7
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PR79A
Abstract: PR65A PR83a PR88A PR97A PR74A pr41a PR50A ASP-122953-01 PR91A
Text: LatticeECP3 I/O Protocol Board to Texas Instruments ADC/DAC Adapter Board User’s Guide May 2010 Revision: EB54_01.2 Lattice Semiconductor LatticeECP3 I/O Protocol Board to Texas Instruments ADC/DAC Adapter Board User’s Guide Introduction The LatticeECP3 I/O Protocol Board to TI ADC/DAC Adapter provides a convenient platform to evaluate, test
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LatticeECP3-150
ADS6425
DAC5682Z
PR79A
PR65A
PR83a
PR88A
PR97A
PR74A
pr41a
PR50A
ASP-122953-01
PR91A
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GR-253
Abstract: TRCV012G5 TTRN012G5
Text: Advance Data Sheet September 1999 TTRN012G5 2.5 GHz Clock Synthesizer, 16:1 Data Multiplexer Features • Fully integrated 2.5 GHz clock synthesizer; 16:1 data multiplexer; supports OC-48/STM-16 data rates ■ Supports clockless data transfer into the 16:1
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TTRN012G5
OC-48/STM-16
GR-253
DS99-260HSPL
GR-253
TRCV012G5
TTRN012G5
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GR-253
Abstract: TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7 D12N cdm 12.6 laser
Text: Advance Data Sheet March 2000 TTRN012G5 2.5 Gbits/s and TTRN012G7 (2.5 Gbits/s and 2.7 Gbits/s) Clock Synthesizer, 16:1 Data Multiplexer Features • TTRN012G5 supports OC-48/STM-16 data rate ■ TTRN012G7 supports: — OC-48/STM-16 data rate — RS (255, 239) forward error correction (FEC)
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TTRN012G5
TTRN012G7
TTRN012G5
OC-48/STM-16
TTRN012G7
DS00-155HSPL
DS99-260HSPL)
GR-253
TRCV012G5
TRCV012G7
D12N
cdm 12.6 laser
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Untitled
Abstract: No abstract text available
Text: User's Guide SLAU236A – November 2007 – Revised October 2008 DAC5681/81z/82z EVM 1 2 3 4 5 6 7 Contents Overview . 3 1.1 Purpose . 3
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SLAU236A
DAC5681/81z/82z
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GR-253
Abstract: TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7 ast0
Text: Advance Data Sheet February 2000 TRCV012G5 2.5 Gbits/s and TRCV012G7 2.7 Gbits/s Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • TRCV012G5 supports OC-48/STM-16 data rate ■ TRCV012G7 supports: — OC-48/STM-16 data rate — RS 255, 239 forward error correction (FEC)
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TRCV012G5
TRCV012G7
OC-48/STM-16
DS00-154HSPL
DS99-261HSPL)
GR-253
TTRN012G5
TTRN012G7
ast0
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GR-253
Abstract: TTRN0110G
Text: Data Sheet March 29, 2002 TTRN0110G 10 Gbits/s Clock Synthesizer, 16:1 Data Multiplexer Features Applications Supports standard OC-192/STM-64 data rate of 9.95328 Gbits/s up through forward error correction FEC rate of 10.7092 Gbits/s as well as the Ethernet rate of 10.3125 Gbits/s
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TTRN0110G
OC-192/STM-64
transfe0-712-4106)
DS02-062HSPL
DS01-236HSPL)
GR-253
TTRN0110G
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234h
Abstract: GR-253 TRCV012G5 TRCV012G7 TTRN012G5 TTRN012G7
Text: Preliminary Data Sheet August 2000 TRCV012G5 2.5 Gbits/s and TRCV012G7 (2.5 Gbits/s and 2.7 Gbits/s) Limiting Amplifier, Clock Recovery, 1:16 Data Demultiplexer Features • TRCV012G5 supports OC-48/STM-16 data rate ■ TRCV012G7 supports: — OC-48/STM-16 data rate
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TRCV012G5
TRCV012G7
TRCV012G5
OC-48/STM-16
TRCV012G7
DS00-234HSPL
DS00-154HSPL)
234h
GR-253
TTRN012G5
TTRN012G7
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Untitled
Abstract: No abstract text available
Text: DAC5681 www.ti.com SLLS864 – AUGUST 2007 16-BIT, 1.0 GSPS DIGITAL-TO-ANALOG CONVERTER DAC FEATURES 1 • • • • 16-Bit Digital-to-Analog Converter (DAC) 1.0 GSPS Update Rate 16-Bit, 1.0 GSPS Input LVDS Data Bus – 8 Sample Input FIFO – On-Chip Delay Lock Loop
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DAC5681
SLLS864
16-BIT,
16-Bit
64-Pin
DAC5681
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AVDD33
Abstract: D12N D13N MAX5889 MAX5890 MAX5891 MAX5891EVKIT
Text: KIT ATION EVALU LE B A IL A AV 19-3619; Rev 0; 4/05 14-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs The MAX5890 advanced 14-bit, 600Msps, digital-toanalog converter DAC meets the demanding performance requirements of signal synthesis applications
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14-Bit,
600Msps,
MAX5890
600Msps
297mW
80dBc
30MHz.
AVDD33
D12N
D13N
MAX5889
MAX5891
MAX5891EVKIT
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Untitled
Abstract: No abstract text available
Text: KIT ATION EVALU LE B A IL A AV 19-3542; Rev 4; 2/07 16-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs The MAX5891 advanced 16-bit, 600Msps, digital-toanalog converter DAC meets the demanding performance requirements of signal synthesis applications
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600Msps,
MAX5891
600Msps
298mW
80dBc
30MHz.
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MAX5889
Abstract: MAX5890 MAX5891 MAX5891EGK MAX5891EVKIT
Text: KIT ATION EVALU LE B A IL A AV 19-3542; Rev 0; 2/05 16-Bit, 600Msps, High-Dynamic-Performance DAC with LVDS Inputs The MAX5891 advanced 16-bit, 600Msps, digital-toanalog converter DAC meets the demanding performance requirements of signal synthesis applications
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16-Bit,
600Msps,
MAX5891
600Msps
298mW
80dBc
30MHz.
MAX5889
MAX5890
MAX5891EGK
MAX5891EVKIT
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Untitled
Abstract: No abstract text available
Text: DAC5681Z www.ti.com SLLS865 – AUGUST 2007 16-BIT, 1.0 GSPS 2x-4x INTERPOLATING DIGITAL-TO-ANALOG CONVERTER DAC DESCRIPTION • • • • • • • • • 16-Bit Digital-to-Analog Converter (DAC) 1.0 GSPS Update Rate 16-Bit, 1.0 GSPS Input LVDS Data Bus
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DAC5681Z
SLLS865
16-BIT,
16-Bit
2x-32x
64-Pin
DAC5681Z
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Untitled
Abstract: No abstract text available
Text: Fot Immediate Assistance, Contact Your Local Salesperson BURR- BROW NS E ADS7811 1 PRELIMINARY INFORMATION SUBJECT TO CHANGE WITHOUT NOTICE 16-Bit 250kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER FEATURES DESCRIPTION • • • • The ADS7811 is a complete 16-bit sampling analogto-digital converter using state-of-the art CMOS
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ADS7811
16-Bit
250kHz
ADS7811
28-pin
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