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    CY7C34 Price and Stock

    Infineon Technologies AG CY7C344B-15JC

    IC PLD 32MC 15NS 28PLCC
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    DigiKey CY7C344B-15JC Tube 37
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    Infineon Technologies AG CY7C341B-25JC

    IC PLD 192MC 25NS 84PLCC
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C341B-25JC Tube 15
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    Rochester Electronics LLC CY7C341-30HMB

    UV PLD, 59NS, 192-CELL CQCC84
    Distributors Part Package Stock Lead Time Min Order Qty Price Buy
    DigiKey CY7C341-30HMB Bulk 1
    • 1 $598.59
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    Teledyne e2v CY7C346-30HMB

    CPLD, UV ERASABLE, 128-MACROCELL, 30 NS - Trays (Alt: CY7C346-30HMB)
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    Avnet Americas CY7C346-30HMB Tray 250
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    Teledyne e2v CY7C346-35HMB

    CPLD, UV ERASABLE, 128-MACROCELL, 35 NS - Trays (Alt: CY7C346-35HMB)
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    Avnet Americas CY7C346-35HMB Tray 250
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    CY7C34 Datasheets (500)

    Part ECAD Model Manufacturer Description Curated Type PDF
    CY7C340 Cypress Semiconductor Multiple Array Matrix High-Density EPLDS Original PDF
    CY7C341 Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341 Cypress Semiconductor Programmable Logic : Programmable Logic Devices Original PDF
    CY7C341-25 Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-25HC Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-25HC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-25HI Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-25HI Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-25JC Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-25JC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-25JI Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-25RC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-25RI Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-25RI Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-30 Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-30GC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-30HC Cypress Semiconductor 192-Macrocell MAX EPLD Original PDF
    CY7C341-30HC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-30HC Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    CY7C341-30HI Cypress Semiconductor 192-Macrocell MAX EPLD Scan PDF
    ...

    CY7C34 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    7C344-25

    Abstract: C344 74HC CY7C344 Signal Path Designer C3445
    Text: CY7C344 32-Macrocell MAX EPLD Features tional I/O pins communicate to one logic array block. In the CY7C344 LAB there are 32 macrocells and 64 expander product terms. When an I/O macrocell is used as an input, two expanders are used to create an input path. Even if all of the


    Original     		PDF CY7C344 32-Macrocell CY7C344 28-pin, 300-mil 28-pin 7C344-25 C344 74HC Signal Path Designer C3445

    74151

    Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
    Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer

    C3402

    Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
    Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		PDF CY7C340 CY7C34X) 65-micron CY7C34XB) C3402 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C

    c3431

    Abstract: C3438 c3432 CY7C343 c3435 C343-8
    Text: CY7C343 64-Macrocell MAX EPLD Features • • • • • • The CY7C343 contains 64 highly flexible macrocells and 128 expander product terms. These resources are divided into four Logic Array Blocks LABs connected through the Programmable Inter-connect Array (PIA). There are 8 input pins, one that


    Original     		PDF CY7C343 64-Macrocell CY7C343 44-pin c3431 C3438 c3432 c3435 C343-8

    74HC

    Abstract: CY7C344B
    Text: 44B CY7C344B 32-Macrocell MAX EPLD Features densest EPLD of this size. Eight dedicated inputs and 16 bidirectional I/O pins communicate to one logic array block. In the CY7C344B LAB there are 32 macrocells and 64 expander product terms. When an I/O macrocell is used as an input, two


    Original     		PDF CY7C344B 32-Macrocell CY7C344B 65-micron 74HC

    c341 transistor

    Abstract: 7C341 diode c341 CY7C341 84-PIN C341
    Text: 41 CY7C341 192-Macrocell MAX EPLD Features • • • • • • 192 macrocells in 12 LABs 8 dedicated inputs, 64 bidirectional I/O pin 0.8-micron double-metal CMOS EPROM technology Programmable interconnect array 384 expander product terms Available in 84-pin HLCC, PLCC, and PGA packages


    Original     		PDF CY7C341 192-Macrocell 84-pin CY7C341 c341 transistor 7C341 diode c341 C341

    transistor c343

    Abstract: c343 diode lattice im4a3 CY7C343
    Text: CY7C343 64-Macrocell MAX EPLD Features • • • • • • The CY7C343 contains 64 highly flexible macrocells and 128 expander product terms. These resources are divided into four Logic Array Blocks LABs connected through the Programmable Inter-connect Array (PIA). There are 8 input pins, one that


    Original     		PDF CY7C343 64-Macrocell CY7C343 44-pin 63-Macrocell transistor c343 c343 diode lattice im4a3

    CY7C343B

    Abstract: ULTRA37000TM
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C343B 64-Macrocell MAX EPLD Features Functional Description • 64 MAX macrocells in 4 LABs The CY7C343B is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages.


    Original     		PDF ULTRA37000TM CY7C343B 64-Macrocell CY7C343B 44-pin

    c3432

    Abstract: CY7C343
    Text: CY7C343 64-Macrocell MAX EPLD Features • • • • • • The CY7C343 contains 64 highly flexible macrocells and 128 expander product terms. These resources are divided into four Logic Array Blocks LABs connected through the Programmable Inter-connect Array (PIA). There are 8 input pins, one that


    Original     		PDF CY7C343 64-Macrocell CY7C343 44-pin c3432

    74HC

    Abstract: CY7C344 ULTRA37000TM Signal Path Designer
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C344 32-Macrocell MAX EPLD Features densest EPLD of this size. Eight dedicated inputs and 16 bidirectional I/O pins communicate to one logic array block. In the CY7C344 LAB there are 32 macrocells and 64 expander product terms. When an I/O macrocell is used as an input, two


    Original     		PDF ULTRA37000TM CY7C344 32-Macrocell CY7C344 Ultra37000 74HC Signal Path Designer

    100-PIN

    Abstract: CY7C346 ULTRA37000TM
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C346 128-Macrocell MAX EPLD Features The 128 macrocells in the CY7C346 are divided into eight LABs, 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each


    Original     		PDF ULTRA37000TM CY7C346 128-Macrocell CY7C346 84-pin 100-pin

    CY7C343

    Abstract: ULTRA37000 CY7C343-30HMB
    Text: USE ULTRA37000 FOR ALL NEW DESIGNS CY7C343 64-Macrocell MAX EPLD Features Functional Description • 64 MAX® macrocells in four LABs The CY7C343 is a high-performance, high-density erasable programmable logic device, available in 44-pin PLCC and HLCC packages.


    Original     		PDF ULTRA37000TM CY7C343 64-Macrocell CY7C343 44-pin ULTRA37000 CY7C343-30HMB

    68-PIN

    Abstract: CY7C342B ULTRA37000TM CY7C342B-30JC
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the CY7C342B are divided into eight


    Original     		PDF ULTRA37000TM CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin CY7C342B-30JC

    31-oq

    Abstract: 7C342-25 CY7C342-35HMB 7C342-35 CY7C342 CY7C342B OQ11
    Text: CY7C342 CY7C342B rif CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B 31-oq 7C342-25 CY7C342-35HMB 7C342-35 OQ11

    K12J

    Abstract: 100-PIN CY7C346 CY7C346B f 7400
    Text: CY7C346 CY7C346B 5T CYPRESS 128-Macrocell MAX EPLDs Features Functional Description • 128 macrocells in 8 LABs • 20 dedicated inputs, up to 64 bidirec­ tional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C346


    OCR Scan     		PDF CY7C346 CY7C346B CY7C346) 65-micron CY7C346B) 84-pin 100-pin 128-Macrocell CY7C346/CY7C346B CY7C346/ K12J CY7C346B f 7400

    Untitled

    Abstract: No abstract text available
    Text: CY7C344 CY7C344B W w CYPRESS 32-Macrocell MAX EPLD Features Functional Description • High-performance, high-density re­ placement for TTL, 74HC, and cus­ tom logic • 32 macrocells, 64 expander product terms in one LAB • 8 dedicated inputs, 16 I/O pins


    OCR Scan     		PDF CY7C344 CY7C344B 32-Macrocell CY7C344) 65-micron CY7C344B) 28-pin 300-mil 28-pin

    cy7C344

    Abstract: C3M11
    Text: / 9 / I J/ 3 1 Revision: Friday, Apni IS, 1934 CY7C344 f ß CYPRESS i 32-Macrocell MAX FPT P Features Functional Description • High-performance, higfa-deiislty re­ placement for TTL, 74HC, and cus­ tom logic Available in a 28-pin 300-mil DIP or •win­


    OCR Scan     		PDF 28-pin 300-mil 28-ptn CY7C344 32-Macrocell C3M11

    c3415

    Abstract: cy7c341-30jc CY7C341
    Text: CY7C341 y CYPRESS Features • • • • • • 192 macrocells in 12 LABs 8 dedicated inputs, 64 bidirectional I/O pin 0.8-micron double-metal CMOS EPROM technology Programmable interconnect array 384 expander product terms Available in 84-pin HLCC, PLCC, and PGA packages


    OCR Scan     		PDF CY7C341 192-Macrocell 84-pin CY7C341 c3415 cy7c341-30jc

    74HC

    Abstract: 7C344 CY7C344 CY7C344B LTAC01
    Text: CY7C344 CY7C344B i f CYPRESS 32-Macrocell MAX EPLD Features Functional Description • High-performance, high-density re­ placement for TTL, 74HC, and cus­ tom logic • 32 macrocells, 64 expander product terms in one LAB • 8 dedicated inputs, 16 I/O pins


    OCR Scan     		PDF CY7C344 CY7C344B 32-Macrocell CY7C344) 65-micron CY7C344B) 28-pin 300-mil 74HC 7C344 LTAC01

    CY7C344-25HC

    Abstract: 74HC 7C344 C344 CY7C344 000713t Signal path designer IND20 MU2030 AC02X
    Text: 4bE D SEMI CONDUCTOR D 2Sö^bb2 DD07132 ? Q C Y P ‘T ' & ' M - O l W s CYPRESS SEMICONDUCTOR CY7C344 32-Macrocell MAX EPLD Features Functional Description • High-performance, high-density re­ placement for TTL, 74HC, and custom logic • 32 macroceils, 64 expander product


    OCR Scan     		PDF QD07132 CY7C344 32-Macrocell 28-pin 300-mil MACROCELL10 MACROCELL12 MACROCELL16 CY7C344-25HC 74HC 7C344 C344 000713t Signal path designer IND20 MU2030 AC02X

    wl1251

    Abstract: 464X1
    Text: CY7C341 PRELIMINARY r CYPRESS SEMICONDUCTOR 192-Macrocell MAX EPLD Features Logic A rray Blocks • 192 macrocells in 12 LABa T h e re are 12 logic array blocks in the CY7C341. Each LAB consists o f a m acro ­ cell array containing 16 m acrocells, an ex­


    OCR Scan     		PDF CY7C341 192-Macrocell CY7C341 84-pin ithi7C341 --35R --40R wl1251 464X1

    342-35HM

    Abstract: No abstract text available
    Text: CY7C342 CYPRESS SEMICONDUCTOR Features 128-Macrocell MAX EPLDs M A X architecture is 100% u ser configur­ able, allowing the devices to accom m o­ d a te a variety o f in d ependent logic func­ tions. • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional


    OCR Scan     		PDF CY7C342 128-Macrocell CY7C342 7400-series 20-pin 7C342 68-pin 342-35HM

    C3424

    Abstract: 68-PIN 7C342-30 7C342-35 CY7C342 CY7C342B C3422 CY7C342-30HC CY7C342B-30RMB 30RM
    Text: CY7C342 CY7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology CY7C342


    OCR Scan     		PDF CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ C3424 7C342-30 7C342-35 C3422 CY7C342-30HC CY7C342B-30RMB 30RM

    TL421

    Abstract: IAW 15P cy7c344bx
    Text: CY7C344 CY7C344B = = CYPRESS 32-Macrocell MAX EPLD Features F unctional D escrip tion • H igh-p erform an ce, h igh -d en sity re­ p lacem en t for TTL, 74H C , an d cu s­ tom logic • 32 m acrocells, 64 exp an d er prod uct term s in on e LAB • •


    OCR Scan     		PDF CY7C344 CY7C344B 32-Macrocell CY7C344 TL421 IAW 15P cy7c344bx