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    7C342 Price and Stock

    Brady Worldwide Inc M21-187-C-342

    SLEEVE 20 AWG TO 10 AWG CART=7FT
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    DigiKey M21-187-C-342 Bulk 150 1
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    TME M21-187-C-342 1
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    Master Electronics M21-187-C-342
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    TestEquity LLC M21-187-C-342 6
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    Brady Worldwide Inc M21-187-C-342-YL

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    DigiKey M21-187-C-342-YL Bulk 27 1
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    Interstate Connecting Components M21-187-C-342-YL 1
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    Torex Semiconductor LTD XC6217C342NR-G

    IC REG LINEAR 3.4V 200MA SSOT24
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    DigiKey XC6217C342NR-G Reel 3,000
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    Torex Semiconductor LTD XC6217C3427R-G

    IC REG LINEAR 3.4V 200MA 4USPN
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    DigiKey XC6217C3427R-G Reel 5,000
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    Torex Semiconductor LTD XC6217C342GR-G

    IC REG LINEAR 3.4V 200MA USP-4D
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    DigiKey XC6217C342GR-G Reel 3,000
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    7C342 Datasheets (3)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    7C342-25 Cypress Semiconductor 128-Macrocell MAX EPLD Original PDF
    7C342-30 Cypress Semiconductor 128-Macrocell MAX EPLD Original PDF
    7C342-35 Cypress Semiconductor 128-Macrocell MAX EPLD Original PDF

    7C342 Datasheets Context Search

    Catalog Datasheet MFG & Type Document Tags PDF

    tag l9 225 400

    Abstract: TAG B6 CY7C342B H-81
    Text: 7c342: 11-4-91 Revision: October 19, 1995 7C342B 128ĆMacrocell MAXR EPLDs Features D 128 macrocells in 8 LABs D 8 dedicated inputs, 52 bidirectional The 7C342B is an Erasable ProgramĆ mable Logic Device EPLD in which CMOS EPROM cells are used to configure


    Original     		7c342: CY7C342B 128Macrocell CY7C342B 65micron tag l9 225 400 TAG B6 H-81 PDF

    7C342B

    Abstract: 68-PIN CY7C342B k941
    Text: 7C342B:11/91 Revision: July 19, 2000 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB.


    Original     		7C342B CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin k941 PDF

    7C342-25

    Abstract: 7C342-30 7C342-35 CY7C342 CY7C342B
    Text: 7c342: October 19, 1995 This is an abbreviated datasheet. Contact a Cypress Representative for complete specifications. For new designs, please refer to the 7C342B. 7C342 128ĆMacrocell MAXR EPLDs put bus. All macrocell feedbacks go to the macrocell array, the exĆ


    Original     		7c342: CY7C342B. CY7C342 128Macrocell CY7C342 7C342-25 7C342-30 7C342-35 7C342-25 7C342-30 7C342-35 CY7C342B PDF

    74151

    Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
    Text: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of


    Original     		CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer PDF

    C3402

    Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
    Text: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		CY7C340 CY7C34X) 65-micron CY7C34XB) C3402 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C PDF

    256K x 8 SRAM CY7C128A SRAM

    Abstract: 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10
    Text: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number Speed (ns) ICC/ISB/ICCDR (mA @ ns) 883 Availability 1K 256 x 4 22 CY7C122 5962-88594 tAA = 25, 35 90 @ 25 Now 4K 1K x 4—Separate I/O 24S CY7C150 5962-88588 tAA = 25


    Original     		CY7C122 CY7C150 CY7C130/31 CY7C128A CY6116A MIL-PRF-38535. MIL-STD-883D 22-pin 300-mil 256K x 8 SRAM CY7C128A SRAM 5962-86705 PLD28 5962-89935 pld20ra10 5962-89598 CY7C132 cy7c291 PLD20RA PLDC20G10 PDF

    ATPA

    Abstract: 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CY2147-35C CY7C147-35C CY7C147-45C CY7C147-35C CY91L22-35C CY7C122-35C CY2147-45C CY2147-35C CY7C148-35C CY7C148-25C+ CY91L22-45C CY93L422AC CY2147-45C CY7C147-45C CY7C148-45C CY7C148-35C


    Original     		CY2147-35C CY7C147-35C CY7C147-45C CY91L22-35C CY7C122-35C CY2147-45C CY7C148-35C CY7C148-25C+ ATPA 7130SA100P 24l01 7C263/4-35C 7164S15Y cy9122-25 7133SA35J 7142sa55 7130sa55p cy2149-45c PDF

    81c78

    Abstract: 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference
    Text: Product Line Cross Reference CYPRESS 2147-35C 2147-45C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35C 2148-35M 2148-45C 2148-45C 2148-45M 2148-45M+ 2148-55C 2148-55C 2148-55M 2149-35C 2149-35C 2149-35M 2149-45C 2149-45M 2149-45M 2149-55C 2149-55C 2149-55M


    Original     		2147-35C 2147-45C 2147-45M+ 2147-55C 2147-55M 2148-35C 2148-35M 2148-45C 81c78 7C291 5962-8515505RX 27PC256-12 PAL164A 8464C 5C6408 72018 39C10B MACH110 cross reference PDF

    68-PIN

    Abstract: CY7C342B ULTRA37000TM CY7C342B-30JC
    Text: USE ULTRA37000TM FOR ALL NEW DESIGNS 7C342B 128-Macrocell MAX EPLD Features 100% user-configurable, allowing the device to accommodate a variety of independent logic functions. • 128 macrocells in eight logic array blocks LABs The 128 macrocells in the 7C342B are divided into eight


    Original     		ULTRA37000TM CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin CY7C342B-30JC PDF

    7c264

    Abstract: PLD201 CY7C264 CY7C342 P201 7c26
    Text: Qualification Report February 1996, QTP# 94341, Version 1.0 CMP QUALIFICATION FOR P201 AND PLD201 PROCESS 1 CY7C2xx and CY7C3xx PRODUCT DESCRIPTION for qualification Information provided in this document is intended for generic qualification and technically describes the Cypress part supplied:


    Original     		PLD201 CY7C264 CY7C342 24-pin, 600-mil CY7C264) 68-pin CY7C342) 128-Macrocell 7C264) 7c264 CY7C264 CY7C342 P201 7c26 PDF

    MSM 6290

    Abstract: msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150
    Text: Product Line Cross Reference CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS CYPRESS 2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 2147-35C 27S07AC 7C190-25C 7C171A-35C 7C171A-25C 2147-45C 7C147-45C 27S07AM 7C190-25M 7C171A-45M 7C171A-35M+ 2147-45M+


    Original     		2147-35C 7C147-35C 27S03M 54S189M 7C170A-45M 7C170A-35M 2147-45C 27S07AC 7C190-25C MSM 6290 msm 5562 27c256 intel 62c512 AP 2068 27C512 microchip 62256 57C256 27C512 SGS-THOMSON 27C512-150 PDF

    68-PIN

    Abstract: CY7C342B
    Text: 42B 7C342B 128-Macrocell MAX EPLD Features The 128 macrocells in the 7C342B are divided into 8 Logic Array Blocks LABs , 16 per LAB. There are 256 expander product terms, 32 per LAB, to be used and shared by the macrocells within each LAB. • • •


    Original     		CY7C342B 128-Macrocell CY7C342B 65-micron 68-pin PDF

    74151 PIN DIAGRAM

    Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
    Text: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase


    Original     		CY7C340 CY7C34X) 65-micron CY7C34XB) 74151 PIN DIAGRAM 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C341B CY7C342B PDF

    22V10-Macrocell

    Abstract: 99522 PLD20RA10 22V10D 5962-89598 cy7c291 CY7C425 PALC22V10B CY6116A CY7C128A
    Text: Military Product Selector Guide Static RAMs Size Organization Pins DIP SMD Number Part Number 16K 2K x 8—CS Power-Down 24S CY7C128A 16K 2K x 8—CS Power-Down 24 CY6116A 64K 8K x 8—CS Power-Down 28S CY7C185A 256K 32K x 8—CS Power-Down 28 CY7C198 256K


    Original     		CY7C128A CY6116A CY7C185A CY7C198 CY7C199 CY7C109 MIL-PRF-38535. MIL-STD-883D 22-pin 300-mil 22V10-Macrocell 99522 PLD20RA10 22V10D 5962-89598 cy7c291 CY7C425 PALC22V10B CY6116A CY7C128A PDF

    HR210

    Abstract: No abstract text available
    Text: 7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs T he CY 7C342/7C342B is an E rasable Program m able Logic Device E P L D in which C M O S E P R O M cells are used to configure logic functions w ithin the device.


    OCR Scan     		CY7C342) 65-micron CY7C342B) 68-pin CY7C342 CY7C342B 128-Macrocell 7C342/CY7C342B 7400-series HR210 PDF

    31-oq

    Abstract: 7C342-25 CY7C342-35HMB 7C342-35 CY7C342 CY7C342B OQ11
    Text: 7C342 7C342B rif CYPRESS 128-Macrocell M AX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology 7C342


    OCR Scan     		CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B 31-oq 7C342-25 CY7C342-35HMB 7C342-35 OQ11 PDF

    342-35HM

    Abstract: No abstract text available
    Text: 7C342 CYPRESS SEMICONDUCTOR Features 128-Macrocell MAX EPLDs M A X architecture is 100% u ser configur­ able, allowing the devices to accom m o­ d a te a variety o f in d ependent logic func­ tions. • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional


    OCR Scan     		CY7C342 128-Macrocell CY7C342 7400-series 20-pin 7C342 68-pin 342-35HM PDF

    C3424

    Abstract: 68-PIN 7C342-30 7C342-35 CY7C342 CY7C342B C3422 CY7C342-30HC CY7C342B-30RMB 30RM
    Text: 7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • 0.8-micron double-metal CMOS EPROM technology 7C342


    OCR Scan     		CY7C342 CY7C342B 128-Macrocell CY7C342) 65-micron CY7C342B) 68-pin CY7C342/CY7C342B CY7C342/ C3424 7C342-30 7C342-35 C3422 CY7C342-30HC CY7C342B-30RMB 30RM PDF

    7C342C

    Abstract: No abstract text available
    Text: 7C342 7C342B CYPRESS 128-Macrocell MAX EPLD Features F unctional D escrip tion • The 7C342/7C342B is an Erasable P rogram m able Logic Device E P L D in which CM O S E P R O M cells are used to configure logic functions w ithin the device. T he M AX architecture is 100% user confi­


    OCR Scan     		CY7C342) 65-micron CY7C342B) 68-pin CY7C342 CY7C342B 128-Macrocell 7C342/CY7C342B 7400-series 7C342C PDF

    pin configuration IC 74151

    Abstract: IC 74151 diagram and truth table IC TTL 7400 diagram and truth table ic 74151 full adder using Multiplexer IC 74151 Multiplexer IC 74151 programmer manual EPLD cypress IC 7400 SERIES ALL DATA programming manual EPLD cy7c342
    Text: CYPRESS SEMICONDUCTOR HOE D 256*^2 DD05427 5 ICYP 7 T V d -/3 -4 7 CY7C340 EPLD Family « 1 ^ CYPRESS SEMICONDUCTOR Multiple Array Matrix High-Density EPLDs Features General Description • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions


    OCR Scan     		CY7C340 CY7C344-25WC/WI CY7C344-25HC/HI CY7C344-25JC/JI CY7C344-25HMB CY7C344-25WMB CY7C344-25DMB CY7C344-35HMB CY7C344-35WMB CY7C344-35DMB pin configuration IC 74151 IC 74151 diagram and truth table IC TTL 7400 diagram and truth table ic 74151 full adder using Multiplexer IC 74151 Multiplexer IC 74151 programmer manual EPLD cypress IC 7400 SERIES ALL DATA programming manual EPLD cy7c342 PDF

    Untitled

    Abstract: No abstract text available
    Text: 7C342 7C342B CYPRESS SEMICONDUCTOR & 128-Macrocell M A X EPLDs Features Functional Description • 128 macrocells in 8 LABs • 8 dedicated inputs, 52 bidirectional I/O pins • Programmable interconnect array • Available in 68-pin HLCC, PLCC, PGA, and Flatpack


    OCR Scan     		CY7C342 CY7C342B 128-Macrocell 68-pin CY7C342/CY7C342B CY7C342/ CY7C342B Y7C342B PDF

    CY7C342

    Abstract: No abstract text available
    Text: 7C342 CYPRESS SEMICONDUCTOR 128-Macrocell MAX EPLDs The speed and density of the 7C342 allows it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 25 times the


    OCR Scan     		CY7C342 128-Macrocell 7400-series 20-pin CY7C342 PDF

    CY7C342-35RMB

    Abstract: CY7C342-35HC CY7C342-30HC CY7C342 CY7C342-40RC 7C342-30 7C342-35 CY7C342-35JC propagation delay in IC TTL 7400 CY7C342-35RC
    Text: P R E L IM IN A R Y CYPRESS SEMICONDUCTOR 128-M acrocell 7C342 CY7C345 M AXTM EPL D s Features Functional Description 7C342 T h e C Y 7C 342 an d CY7C345 are E ras­ able P rogram m able Logic Devices E P L D s in w hich CM O S E P R O M cells are used to configure logic func­


    OCR Scan     		CY7C342 CY7C345 128-Macrocell CY7C342 CY7C345 44-pin CY7C342-35RMB CY7C342-35HC CY7C342-30HC CY7C342-40RC 7C342-30 7C342-35 CY7C342-35JC propagation delay in IC TTL 7400 CY7C342-35RC PDF

    Untitled

    Abstract: No abstract text available
    Text: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)


    OCR Scan     		CY7C340 CY7C34X) 65-micron CY7C34XB) 7C342 342-30H 7C342â 35HMB PDF