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    Vishay Intertechnologies 500D156M040BA2A

    Aluminum Electrolytic Capacitors - Axial Leaded 15uF 40volts 20%
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    Mouser Electronics 500D156M040BA2A 165
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    Integrated Silicon Solution Inc IS46TR16128D-125KBLA2-TR

    DRAM Automotive (Tc: -40 to +105C), 2G, 15V, DDR3, 128Mx16, 1600MT/s a. 11-11-11, 96 ball BGA (9mm x13mm) RoHS, T&R
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    Mouser Electronics IS46TR16128D-125KBLA2-TR
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    Vishay Intertechnologies 500D156M035BA2

    Aluminum Electrolytic Capacitors - Axial Leaded 15uF 35volts 20%
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    Mouser Electronics 500D156M035BA2
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    Vishay Intertechnologies 30D156M040BA2A

    Aluminum Electrolytic Capacitors - Axial Leaded 15uF 40volts 20% 6.3x13mm
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    Mouser Electronics 30D156M040BA2A
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    BA2 D15 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    BA1 K11

    Abstract: ba1d1a PD48576118FF-E24-DW1-A
    Text: Preliminary Datasheet PD48576109-A μPD48576118-A R10DS0064EJ0001 Rev.0.01 Nov 08, 2010 576M- Low Latency DRAM Separate I/O Description The μPD48576109-A is a 67,108,864-word by 9 bit and the μPD48576118-A is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48576109-A PD48576118-A R10DS0064EJ0001 PD48576109-A 864-word PD48576118-A BA1 K11 ba1d1a PD48576118FF-E24-DW1-A

    PD48576109,

    Abstract: No abstract text available
    Text: Datasheet PD48576109 μPD48576118 R10DS0064EJ0100 Rev.1.00 September 27, 2011 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48576109 PD48576118 576M-BIT 864-word PD48576118 R10DS0064EJ0100 PD48576109,

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48576109 μPD48576118 R10DS0064EJ0200 Rev.2.00 May 10, 2012 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48576109 PD48576118 576M-BIT 864-word PD48576118 R10DS0064EJ0200

    Untitled

    Abstract: No abstract text available
    Text: Preliminary Datasheet PD48288109A μPD48288118A R10DS0098EJ0001 Rev.0.01 August 2, 2011 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288109A PD48288118A R10DS0098EJ0001 288M-BIT PD48288109A 432-word PD48288118A 216-word

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48288109A μPD48288118A R10DS0098EJ0100 Rev.1.00 February 28, 2012 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288109A PD48288118A 288M-BIT 432-word PD48288118A 216-word R10DS0098EJ0100

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48288118-A 288M-BIT Low Latency DRAM Separate I/O R10DS0157EJ0100 Rev.1.00 Feb 01, 2013 Description The μPD48288118-A is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288118-A 288M-BIT R10DS0157EJ0100 PD48288118-A

    Untitled

    Abstract: No abstract text available
    Text: DATA SHEET MOS INTEGRATED CIRCUIT PD48288118 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288118 is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288118 288M-BIT PD48288118

    p144f

    Abstract: TDK EF25 BAP36 PD482
    Text: DATA SHEET MOS INTEGRATED CIRCUIT PD48288118-A 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288118-A is a 16,777,216 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288118-A 288M-BIT PD48288118-A M8E0904E p144f TDK EF25 BAP36 PD482

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48288109A μPD48288118A R10DS0098EJ0200 Rev.2.00 May 10, 2012 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288109A PD48288118A 288M-BIT 432-word PD48288118A 216-word R10DS0098EJ0200

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48288109A μPD48288118A R10DS0098EJ0300 Rev.3.00 Oct 01, 2012 288M-BIT Low Latency DRAM Separate I/O Description The μPD48288109A is a 33,554,432-word by 9 bit and the μPD48288118A is a 16,777,216-word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48288109A PD48288118A 288M-BIT 432-word PD48288118A 216-word R10DS0098EJ0300

    Untitled

    Abstract: No abstract text available
    Text: Datasheet PD48576109 μPD48576118 R10DS0064EJ0300 Rev.3.00 Oct 01, 2012 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


    Original     		PDF PD48576109 PD48576118 576M-BIT 864-word PD48576118 R10DS0064EJ0300

    Untitled

    Abstract: No abstract text available
    Text: To our customers, Old Company Name in Catalogs and Other Documents On April 1st, 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the old company name remains in this document, it is a valid


    Original     		PDF M8E0904E

    DDR2 Hynix 2Gb x 8

    Abstract: HYMP351
    Text: 240pin DDR2 VLP Registerd DIMMs based on 1Gb C version This Hynix DDR2 VLP Very Low Profile registered Dual In-Line Memory Module (DIMM) series consists of 1Gb C version DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb C version based VLP Registered DIMM series provide a high performance 8 byte interface in 133.35mm width form factor of


    Original     		PDF 240pin HYMP112P72CP8L-C4/Y5/S6 HYMP125P72CP4L-C4/Y5/S6 HYMP351P72CMP4L-C4/Y5/S6 HYMP41GP72CNP4L-C4/Y5 128Mbx72 256Mbx72 512Mbx72 1Gbx72 DDR2 Hynix 2Gb x 8 HYMP351

    Untitled

    Abstract: No abstract text available
    Text: iPEM 4.8 Gb SDRAM-DDR2 AS4DDR264M72PBG 64Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES BENEFITS DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package: • 255 Plastic Ball Grid Array PBGA , 25 x 32mm


    Original     		PDF AS4DDR264M72PBG 64Mx72 AS4DDR264M72PBG

    AS4DDR264M72PBG

    Abstract: DDR2 16 meg x16 industrial
    Text: iPEM 4.8 Gb SDRAM-DDR2 AS4DDR264M72PBG 64Mx72 DDR2 SDRAM iNTEGRATED Plastic Encapsulated Microcircuit FEATURES BENEFITS DDR2 Data rate = 667, 533, 400 Available in Industrial, Enhanced and Military Temp Package: • 255 Plastic Ball Grid Array PBGA , 25 x 32mm


    Original     		PDF AS4DDR264M72PBG 64Mx72 AS4DDR264M72PBG DDR2 16 meg x16 industrial

    smd dk qk

    Abstract: SMD MARKING CODE ACY smd marking codes BA5 smd marking codes BA2 RLDRAM MT49H16M18C
    Text: ADVANCE‡ 16 MEG x 18, 32 MEG x 9 2.5V VEXT, 1.8V VDD, HSTL, SIO, RLDRAM II 288Mb SIO REDUCED LATENCY RLDRAM II MT49H16M18C MT49H32M9C FEATURES Figure 1 144-Ball FBGA • 288Mb • 400 MHz DDR operation (800 Mb/s/pin data rate) • Organization - 16 Meg x 18, 32 Meg x 9 Separate I/O


    Original     		PDF 288Mb 288Mb clo68-3900 MT49H16M18C smd dk qk SMD MARKING CODE ACY smd marking codes BA5 smd marking codes BA2 RLDRAM

    MT49H16M18C

    Abstract: No abstract text available
    Text: ADVANCE‡ 16 MEG x 18, 32 MEG x 9 2.5V VEXT, 1.8V VDD, HSTL, SIO, RLDRAM II 288Mb SIO REDUCED LATENCY RLDRAM II MT49H16M18C MT49H32M9C FEATURES Figure 1 144-Ball µBGA • 288Mb • 400 MHz DDR operation (800 Mb/s/pin data rate) • Organization - 16 Meg x 18, 32 Meg x 9 Separate I/O


    Original     		PDF 288Mb 288Mb clo68-3900 MT49H16M18C

    smd marking codes BA5

    Abstract: MT49H16M18C
    Text: ADVANCE‡ 16 MEG x 18, 32 MEG x 9 2.5V VEXT, 1.8V VDD, HSTL, SIO, RLDRAM II 288Mb SIO REDUCED LATENCY RLDRAM II MT49H16M18C MT49H32M9C FEATURES Figure 1 144-Ball FBGA • 288Mb • 400 MHz DDR operation (800 Mb/s/pin data rate) • Organization - 16 Meg x 18, 32 Meg x 9 Separate I/O


    Original     		PDF 288Mb 288Mb MT49H16M18C smd marking codes BA5

    H5PS1G

    Abstract: DDR2-533 DDR2-667 DDR2-800 RA13 256M DRAM
    Text: 240pin DDR2 VLP Registerd DIMMs based on 1Gb E version This Hynix DDR2 VLP Very Low Profile registered Dual In-Line Memory Module (DIMM) series consists of 1Gb E version DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb E version based VLP Registered DIMM series provide a high performance 8 byte interface in 133.35mm width form factor of


    Original     		PDF 240pin HMP112V7EFR8C-C4/Y5/S6 128Mbx72 HMP125V7EFR4C-C4/Y5/S6 256Mbx72 HMP351V7EMR4C-C4/Y5/S6 256Mx72 HMP41GV7EHR4C 1240pin H5PS1G DDR2-533 DDR2-667 DDR2-800 RA13 256M DRAM

    23/HMP125U7EFR8C-C4/Y5/S6/S5

    Abstract: No abstract text available
    Text: 240pin Registered DDR2 SDRAM DIMMs based on 1Gb version C This Hynix Registered Dual In-Line Memory Module DIMM series consists of 1Gb version C DDR2 SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb version C based Registered DDR2 DIMM series provide a high performance 8 byte interface in 5.25" width


    Original     		PDF 240pin 55max 1240pin HYMP31GP72CMP4, HYMP151P72CP8, HYMP125P72CP8 23/HMP125U7EFR8C-C4/Y5/S6/S5

    HYMP125P72CP8

    Abstract: HYMP151P72CP4 DDR2-400 DDR2-533 HYMP31G
    Text: 240pin Registered DDR2 SDRAM DIMMs based on 1Gb version C This Hynix Registered Dual In-Line Memory Module DIMM series consists of 1Gb version C DDR2 SDRAMs in Fine Ball Grid Array(FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb version C based Registered DDR2 DIMM series provide a high performance 8 byte interface in 5.25" width


    Original     		PDF 240pin 55max 1240pin HYMP31GP72CMP4, HYMP151P72CP8, HYMP125P72CP8 HYMP125P72CP8 HYMP151P72CP4 DDR2-400 DDR2-533 HYMP31G

    SMD d1c

    Abstract: SMD MARKING CODE ACY qkx capacitor smd codes marking A21 MT49H16M18C
    Text: ADVANCE‡ 16 MEG x 18, 32 MEG x 9 2.5V VEXT, 1.8V VDD, HSTL, SIO, RLDRAM II 288Mb SIO REDUCED LATENCY RLDRAM II MT49H16M18C MT49H32M9C FEATURES Figure 1 144-Ball FBGA • 288Mb • 400 MHz DDR operation (800 Mb/s/pin data rate) • Organization - 16 Meg x 18, 32 Meg x 9 Separate I/O


    Original     		PDF 288Mb 288Mb clo68-3900 MT49H16M18C SMD d1c SMD MARKING CODE ACY qkx capacitor smd codes marking A21

    MT49H16M18C

    Abstract: No abstract text available
    Text: 16 MEG x 18, 32 MEG x 9 2.5V VEXT, 1.8V VDD, HSTL, SIO, RLDRAM II 288Mb SIO REDUCED LATENCY RLDRAM II MT49H16M18C MT49H32M9C Features Figure 1: 144-Ball FBGA • 288Mb • 400 MHz DDR operation (800 Mb/s/pin data rate) • Organization • 16 Meg x 18, 32 Meg x 9 Separate I/O


    Original     		PDF 288Mb 288Mb 09005aef80a41b59/zip: 09005aef811ba111 MT49H8M18C MT49H16M18C

    4GB 2Rx8 DDR2 SDRAM MODULE

    Abstract: HYMP151
    Text: 240pin Registered DDR2 SDRAM DIMMs based on 1Gb version E This Hynix Registered Dual In-Line Memory Module DIMM series consists of 1Gb version E DDR2 SDRAMs in Fine Ball Grid Array (FBGA) packages on a 240pin glass-epoxy substrate. This Hynix 1Gb version E based Registered DDR2 DIMM series provide a high performance 8 byte interface in 5.25" width


    Original     		PDF 240pin HMP31GP7EMR4C 00MIN 55max 1240pin 4GB 2Rx8 DDR2 SDRAM MODULE HYMP151