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    Text: Datasheet PD48576109 μPD48576118 R10DS0064EJ0300 Rev.3.00 Oct 01, 2012 576M-BIT Low Latency DRAM Separate I/O Description The μPD48576109 is a 67,108,864-word by 9 bit and the μPD48576118 is a 33,554,432 word by 18 bit synchronous double data rate Low Latency RAM fabricated with advanced CMOS technology using one-transistor memory cell.


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    PDF PD48576109 PD48576118 576M-BIT 864-word PD48576118 R10DS0064EJ0300