PPAP
Abstract: 87c510 INCOMING PLASTIC PACKAGING FILM CHECKLIST INCOMING PLASTIC FILM CHECKLIST ATMEL Packing method PPAP flow MP8000AN Z428 atmel 823 AT83C5103
Text: AT83C5103 - AT87C5103 PPAP AT83C5103 / AT87C5103 C51 LPC 8-Bit Microcontroller ATMEL P/N : AT8xC5103xxx-IBRAL PPAP Submission Date: March 2003 Supplier: ATMEL-NANTES SA Address: La Chantrerie BP 70602 44306 NANTES Cedex 3 France Tel : 33 0 2 40 18 18 18 Fax : 33(0) 2 40 18 19 20
|
Original
|
PDF
|
AT83C5103
AT87C5103
AT87C5103
AT8xC5103xxx-IBRAL
PPAP
87c510
INCOMING PLASTIC PACKAGING FILM CHECKLIST
INCOMING PLASTIC FILM CHECKLIST
ATMEL Packing method
PPAP flow
MP8000AN
Z428
atmel 823
|
AT8C51
Abstract: 80C51 AT83C5103 AT87C5103 SSOP16 SSOP24
Text: Features • • • • • • • • • • • • • 80C51 Compatible CPU Core High-speed Architecture X2 Speed Improvement Capability 6 Clocks/Machine Cycle 16 MHz in Standard or X2 mode 256 Bytes RAM 256 Bytes XRAM 12K Bytes ROM/OTP Program Memory
|
Original
|
PDF
|
80C51
16-bit
-40oC
125oC)
SSOP16,
SSOP24
AT8xC5103
80C51ght
4134C
AT8C51
AT83C5103
AT87C5103
SSOP16
SSOP24
|
AT8C51
Abstract: No abstract text available
Text: Features • • • • • • • • • • • • • 80C51 Compatible CPU Core High-speed Architecture X2 Speed Improvement Capability 6 Clocks/Machine Cycle 16 MHz in Standard or X2 mode 256 Bytes RAM 256 Bytes XRAM 12K Bytes ROM/OTP Program Memory
|
Original
|
PDF
|
80C51
16-bit
-40oC
125oC)
SSOP16,
SSOP24
AT8xC5103
80C51,
4134B
AT8C51
|
0X00
Abstract: 80C51 AT83C5103 AT87C5103 SSOP16 SSOP24
Text: Features • • • • • • • • • • • • • 80C51-compatible CPU Core High-speed Architecture 16 MHz at 3.3V X2 Speed Improvement Capability 6 Clocks/Machine Cycle 256 Bytes RAM 256 Bytes XRAM 12 Kbytes ROM/OTP Program Memory Two 16-bit Timer/Counters T0, T1
|
Original
|
PDF
|
80C51-compatible
16-bit
-40oC
125oC)
SSOP16,
SSOP24
AT8xC5103
80C51
0X00
AT83C5103
AT87C5103
SSOP16
SSOP24
|
80C51
Abstract: AT83C5103 AT87C5103 SSOP16 SSOP24 AT8C51
Text: Features • • • • • • • • • • • • • 80C51 Compatible CPU Core High-speed Architecture X2 Speed Improvement Capability 6 Clocks/Machine Cycle 16 MHz in Standard or X2 mode 256 Bytes RAM 256 Bytes XRAM 12K Bytes ROM/OTP Program Memory
|
Original
|
PDF
|
80C51
16-bit
-40oC
125oC)
SSOP16,
SSOP24
AT8xC5103
80C51t,
4134D
AT83C5103
AT87C5103
SSOP16
SSOP24
AT8C51
|
AT8C51
Abstract: No abstract text available
Text: Features • • • • • • • • • • • • • 80C51 Compatible CPU Core High-speed Architecture X2 Speed Improvement Capability 6 Clocks/Machine Cycle 16 MHz in Standard or X2 mode 256 Bytes RAM 256 Bytes XRAM 12K Bytes ROM/OTP Program Memory
|
Original
|
PDF
|
80C51
16-bit
-40oC
125oC)
SSOP16,
SSOP24
AT87C5103
AT83C5103
AT8xC5103
AT8C51
|