Ks-7b
Abstract: No abstract text available
Text: TMS417800, TMS417800P 2 097152 WORD BY 8-BIT DYNAMIC RANDOM-ACCESS MEMORIES S M K S 7 8 0 -D E C E M B E R 1992 x 8 DE P AC K A G E t DZ P A C K AG E t TOP VIEW (TOP VIEW) * Performance Ranges: vcc[ 1o D Q 0[ 2 ACCESS ACCESS ACCESS READ TIME TIME TIME OR WRITE
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TMS417800,
TMS417800P
417800/P-60
417800/P-70
417800/P-80
TMS417800
Ks-7b
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Q67100-Q3018
Abstract: Q67100-Q3019
Text: SIEM EN S 8M X 36-Bit EDO-DRAM Module HYM 368035S/GS-60 Advanced Inform ation • 8 388 608 words by 36-Bit organization in 2 banks • Fast access and cycle time 60 ns RAS access time 15 ns CAS access tim e 104 ns cycle time • Hyper page mode EDO capability
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36-Bit
368035S/GS-60
L-SIM-72-17)
L-SIM-72-17
Q67100-Q3018
Q67100-Q3019
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DS24
Abstract: No abstract text available
Text: O K I Semiconductor MSC238361A-xxBS24/PS24 8,388,608-Word x 36-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI M SC238361A-xxBS24/ DS24 is a fully decoded 8,388,608-word x 36-bit CMOS Dynamic Random Access Memory Module composed of sixteen 16-Mb DRAMs 4M x 4 in SOJ packages
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MSC238361A-xxBS24/PS24
608-Word
36-Bit
MSC238361A-xxBS24/
16-Mb
72-pin
DS24
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Untitled
Abstract: No abstract text available
Text: •HYUNDAI H Y SEMICONDUCTOR 514100A S e rie s 4M x 1-bit CMOS DRAM DESCRIPTION The HY514100A is the new generation and fast dynamic RAM organized 4,194,304 x 1-bit. The HV514100A utilizes Hyundai’s CMOS silicon gate process technology as well as advanced circuit techniques to provide wide operating
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14100A
HY514100A
HV514100A
1AC06-20-APR93
4b75DÃ
HY514100AJ
HY514100AU
HY514100AT
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RAS 0510
Abstract: machine maintenance checklist
Text: O K I Semiconductor MSC23440A-XXBS10/DS10 4,194,304-Word x 40-Bit DRAM MODULE : FAST PAGE MODE TYPE DESCRIPTION The OKI MSC23440A-xxBS10/DS10 is a fully decoded 4,194,304-word x 40-bit CMOS Dynamic Random Access Memory Module composed of ten 16-Mb DRAMs 4M x 4 in SOJ packages
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MSC23440A-XXBS10/PS10
304-Word
40-Bit
MSC23440A-xxBS10/DS10
16-Mb
72-pin
RAS 0510
machine maintenance checklist
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microprocessor in ROBOT SYSTEMS
Abstract: RAM 2816 J24A N24A NMC9816A NMC9816A-20 NMC9816A-25 NMC9816A-35
Text: NM C 9816A 16,384-Bit 2k x 8 E2PROM General Description A n optional high voltage chip erase feature is provided for quick erasure of the m em ory data pattern in a single 9 m sec Chip Erase Cycle. T h e density, and level o f integrated control, m ake the
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NMC9816A
384-Bit
NMC98l6A
microprocessor in ROBOT SYSTEMS
RAM 2816
J24A
N24A
NMC9816A-20
NMC9816A-25
NMC9816A-35
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T02I
Abstract: 26-PIN ZIP20-P-400 514100B
Text: O K I Semiconductor MSM5 1 4 1 OOB/BL 4,194,304-Word x 1-Bit DYNAMIC RAM: FAST PAGE MODE TYPE DESCRIPTION The MSM514100B/BL is a new generation dynamic RAM organized as 4,194,304-word x 1-bit. The technology used to fabricate the MSM514100B/BL is OKI's CMOS silicon gate process technology.
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MSM514100B
MSM514100BL
304-Word
MSM514100B/BL
cycles/16ms,
cycles/128ms
2424G
T02I
26-PIN
ZIP20-P-400
514100B
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Untitled
Abstract: No abstract text available
Text: cP August 1996 Revision 1.0 FUJI' DATA SHEET - * SDC2U V7282- 67/84/100/125 T-S 16MByte (2M x 72) CMOS Synchronous DRAM Module - ECC General Description The SDC2UV7282-(67/84/100/125)T-S is a high performance, 16 megabtye synchronous, dynamic RAM module organized as
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V7282-
16MByte
SDC2UV7282-
168-pin,
1117822A-
16MByte
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Untitled
Abstract: No abstract text available
Text: cP July 1996 Revision 1.0 FUJI' DATA SHEET - * SDC4U V6442- 67/84/100/125 T-S 32MByte (4M x 64) CMOS Synchronous DRAM Module General Description The SDC4UV6442-(67/84/100/125)T-S is a high performance, 32 rriegabtyo synchronous, dynamic RAM module organized as
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V6442-
32MByte
SDC4UV6442-
168-pin,
1117422A
32MByte
125MHz)
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TEA 1020 sp
Abstract: M02S75 QD07
Text: @ LG Semicon. Co. LTD._ Description Features The GMM7408100BS/SG is an 8M x 40 bits D y n a m ic R A M M O D U L E w h ic h is assembled 20 pieces of 4M x 4 bit DRAMs in 24 26 pin SOJ package on both side the p rin te d c irc u it board w ith d e co u p lin g
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GMM7408100BS/SG
7408100BS/SG
GMM7408100BS
GMM7408100BSG
HDgfl757
TEA 1020 sp
M02S75
QD07
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Untitled
Abstract: No abstract text available
Text: cP IITSU April 1998 Revision 1.0 data sheet PDC2UL6484H- 102/103 T-S 16MByte (2Mx 64) CMOS, PC/100 Synchronous DRAM Module General Description The PDC2UL6484H-(102/103)T-S is a high performance, 16-megabyte synchronous, dynamic RAM module organized as 2M
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PDC2UL6484H-
16MByte
PC/100
16-megabyte
168-pin,
F16822D-
16MByte
PC/66)
100Mhz
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Untitled
Abstract: No abstract text available
Text: M I CR ON T E C H N O L O G Y INC 5SE ]> bl 1 1 S 4 e} OQOMfcjfl? 332 MICRON • 4 MEG TtCHNOLOGV INC DRAM MODULE X 8 IURN MT8D48 DRAM MODULE 4 MEG X 8 DRAM FAST PAGE MODE MT8D48 LOW POWER, EXTENDED REFRESH (MT8D48 L) FEATURES • Industry standard pinout in a 30-pin single-in-line
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MT8D48
MT8D48)
MT8D48
30-pin
800mW
024-cycle
128ms
A0-A10
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C1994
Abstract: No abstract text available
Text: ADVANCE M IC R O N I MT20D840 8 MEG X 40 DRAM MODULE 8 MEG X 40 DRAM DRAM MODULE FAST PAGE MODE FEATURES Industry-standard 72-pin single in-line package High-perform ance CMOS silicon-gate process Single 5V ±10% pow er supply All device pins are TTL-compatible
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MT20D840
72-pin
030mW
048-cycle
096-cycle
DE-16)
MT20D840G
T20DA40
blll541
C1994
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MT4C4M4
Abstract: No abstract text available
Text: 1» PRELIMINARY MICRON I 4 MEG SEIUCOMXJCTOA INC. X MT2D48 8 DRAM MODULE 4 MEG X 8 DRAM DRAM MODULE FAST PAGE MODE FEATURES • Industry-standard pinout in a 30-pin, single-in-line memory module • High-performance CMOS silicon-gate process • Single 5V ±10% power supply
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MT2D48
30-pin,
400mW
048-cycle
30-pin
MT2D48M-6
30PPiMIN)
A0-A10
pyTT2D48
MT4C4M4
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY MICRON » j! MT24D836 8 MEG X 36, 16 MEG x 18 DRAM MODULE 8 MEG x 36,16 MEG x18 DRAM MODULE FAST PAGE MODE FEATURES • Industry-standard pinout in a 72-pin single-in-line package • High-perform ance CMOS silicon-gate process • Single 5V ±10% pow er supply
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MT24D836
72-pin
536mW
048-cycle
DE-15)
MT24D836M/G
A0-A10
T24D836
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Untitled
Abstract: No abstract text available
Text: ADVANCED 4 MEG X 32 SDRAM DIMM |U |IC RO N SDRAM MODULE MT8LSD T 432U FEATURES PIN ASSIGNMENT (Front View) 100-Pin DIMM • JEDEC-standard pinout in a 100-pin, dual in-line memory module (DIMM) • 16MB (4 Meg x 32) • Utilizes 100 MHz SDRAM components • Single +3.3V ±0.3V power supply
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100-Pin
100-pin,
096-cycle
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8M DRAM
Abstract: VCCC1-C10
Text: Order this document by 5VEDOU36SQ/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4, 8M X 36 5 V, EDO, Unbuffered DRAM Single-In-Line Memory Module SIMM 4M x 36 (16MB), 8M x 36 (32MB) 72-LEAD LOW HEIGHT SIMM CASE 866-02 16 and 32 Megabyte • JEDEC-Standard 72-Lead Single-In-Line Memory Module (SIMM)
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5VEDOU36SQ/D
72-Lead
16MB/32MB:
MB3640J00TCSN60
MB3640J00TCSG60
MB3640J00MCSN60
MB364OJ0OMCSG6O
MB3680J00TCSN60
MB3680JOOTCSG60
8M DRAM
VCCC1-C10
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MC-428000F32
Abstract: No abstract text available
Text: DATA SHEET NEC / MOS INTEGRATED CIRCUIT MC-428000F32 8 M-WORD BY 32-BIT DYNAMIC RAM MODULE HYPER PAGE MODE EDO Description The MC-428000F32 is a 8,388,608 words by 32 bits dynamic RAM module on which 16 pieces of 16 M DRAM: /¿PD4217405 are assembled. This module provides high density and large quantities of memory in a small space without utilizing the surfacemounting technology on the printed circuit board.
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MC-428000F32
32-BIT
MC-428000F32
uPD4217405
72B-50A55
L427525
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Untitled
Abstract: No abstract text available
Text: HM5216808C Series HM5216408C Series 1,048,576-word x 8-bit x 2-bank Synchronous Dynamic RAM SSTL-3 2,097,152-word x 4-bit x 2-bank Synchronous Dynamic RAM (SSTL-3) HITACHI ADE-203-617 (Z) Preliminary Rev. 0.0 Jul. 10, 1996 Description A ll inputs and outputs are referred to the rising edge of the clock input. The HM5216808C Series,
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HM5216808C
HM5216408C
576-word
152-word
ADE-203-617
Hz/100
Hz/83
7777K\
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Untitled
Abstract: No abstract text available
Text: HB526C264EN-10IN, HB526C464EN-10IN 1.048.576-word x 64-bit x 2-bank Synchronous Dynamic RAM Module 1.048.576-word x 64-bit x 4-bank Synchronous Dynamic RAM Module HITACHI ADE-203-737A Z Rev. 1.0 Feb. 7, 1997 Description The HB526C264EN, HB526C464EN belong to 8-byte DIMM (Dual In-line Memory Module) family,
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HB526C264EN-10IN,
HB526C464EN-10IN
576-word
64-bit
ADE-203-737A
HB526C264EN,
HB526C464EN
HB526C264EN
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Untitled
Abstract: No abstract text available
Text: S A MS UN G E L E C T R O N I C S INC b?E ]> Bi 7 c3 b m M 5 KM44C4102 001b2tia Tb2 CMOS DRAM 4M x 4Bit CMOS Dynamic RAM with Static Column Mode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung KM44C4102 is a high speed CMOS 4 ,194,304x4 Dynamic Random Access Memory. Its
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KM44C4102
001b2tia
KM44C4102
304x4
KM44C4102-7
130ns
KM44C4102-8
150ns
KM44C4102-6
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Untitled
Abstract: No abstract text available
Text: PRELIMINARY DATA SHEET MOS INTEGRATED CIRCUIT MC-422LFB721 3.3 V OPERATION 2M-WORD BY 72-BIT DYNAMIC RAM MODULE UNBUFFERED TYPE, EDO Description The MC-422LFB721 is a 2,097,152 words by 72 bits dynamic RAM module on which 9 pieces of 16 M DRAM : ^¡PD4217805L are assembled.
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MC-422LFB721
72-BIT
MC-422LFB721
PD4217805L
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Untitled
Abstract: No abstract text available
Text: CMOS DRAM KM41C4000C/CL/CSL 4M x 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: tR A C tC A C tR C KM41C4000C/CL/CSL-5 50ns 13ns 90ns KM41C4000C/CL/CSL-6 60ns 15ns 110ns KM41C4000C/CL/CSL-7 70ns 20ns 130ns KM41C4000C/CL7CSL-8
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KM41C4000C/CL/CSL
KM41C4000C/CL/CSL-5
KM41C4000C/CL/CSL-6
110ns
KM41C4000C/CL/CSL-7
130ns
KM41C4000C/CL7CSL-8
150ns
KM41C4000C/CL/CSL
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Untitled
Abstract: No abstract text available
Text: KM41C4000C, KM41V4000C CMOS DRAM 4M x 1 Bit CMOS Dynamic RAM with Fast Page Mode DESCRIPTION This is a family of 4,194,304 x 1 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory cells within the same row. Power supply voltage +5.0V or +3.3V , access
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KM41C4000C,
KM41V4000C
1024cycles
00231fc
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